2 * arch/sh/drivers/pci/fixups-dreamcast.c
4 * PCI fixups for the Sega Dreamcast
6 * Copyright (C) 2001, 2002 M. R. Brown
7 * Copyright (C) 2002, 2003, 2006 Paul Mundt
9 * This file originally bore the message (with enclosed-$):
10 * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp
11 * Dreamcast PCI: Supports SEGA Broadband Adaptor only.
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/param.h>
21 #include <linux/interrupt.h>
22 #include <linux/init.h>
23 #include <linux/irq.h>
24 #include <linux/pci.h>
25 #include <linux/dma-mapping.h>
31 static void gapspci_fixup_resources(struct pci_dev
*dev
)
33 struct pci_channel
*p
= dev
->sysdata
;
35 struct pci_bus_region region
;
37 printk(KERN_NOTICE
"PCI: Fixing up device %s\n", pci_name(dev
));
39 switch (dev
->device
) {
40 case PCI_DEVICE_ID_SEGA_BBA
:
42 * We also assume that dev->devfn == 0
44 dev
->resource
[1].start
= p
->resources
[0].start
+ 0x100;
45 dev
->resource
[1].end
= dev
->resource
[1].start
+ 0x200 - 1;
48 * This is not a normal BAR, prevent any attempts to move
49 * the BAR, as this will result in a bus lock.
51 dev
->resource
[1].flags
|= IORESOURCE_PCI_FIXED
;
54 * Redirect dma memory allocations to special memory window.
56 * If this GAPSPCI region were mapped by a BAR, the CPU
57 * phys_addr_t would be pci_resource_start(), and the bus
58 * address would be pci_bus_address(pci_resource_start()).
59 * But apparently there's no BAR mapping it, so we just
60 * "know" its CPU address is GAPSPCI_DMA_BASE.
62 res
.start
= GAPSPCI_DMA_BASE
;
63 res
.end
= GAPSPCI_DMA_BASE
+ GAPSPCI_DMA_SIZE
- 1;
64 res
.flags
= IORESOURCE_MEM
;
65 pcibios_resource_to_bus(dev
->bus
, ®ion
, &res
);
66 BUG_ON(dma_declare_coherent_memory(&dev
->dev
,
70 DMA_MEMORY_EXCLUSIVE
));
73 printk("PCI: Failed resource fixup\n");
76 DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID
, PCI_ANY_ID
, gapspci_fixup_resources
);
78 int pcibios_map_platform_irq(const struct pci_dev
*dev
, u8 slot
, u8 pin
)
81 * The interrupt routing semantics here are quite trivial.
83 * We basically only support one interrupt, so we only bother
84 * updating a device's interrupt line with this single shared
85 * interrupt. Keeps routing quite simple, doesn't it?