4 * Copyright (c) 2004 - 2009 Paul Mundt
5 * Copyright (c) 2002 M. R. Brown
7 * Modelled after arch/mips/pci/pci.c:
8 * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
14 #include <linux/kernel.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/types.h>
19 #include <linux/dma-debug.h>
21 #include <linux/mutex.h>
22 #include <linux/spinlock.h>
23 #include <linux/export.h>
25 unsigned long PCIBIOS_MIN_IO
= 0x0000;
26 unsigned long PCIBIOS_MIN_MEM
= 0;
29 * The PCI controller list.
31 static struct pci_channel
*hose_head
, **hose_tail
= &hose_head
;
33 static int pci_initialized
;
35 static void pcibios_scanbus(struct pci_channel
*hose
)
37 static int next_busno
;
38 static int need_domain_info
;
41 resource_size_t offset
;
43 struct pci_host_bridge
*bridge
;
45 bridge
= pci_alloc_host_bridge(0);
49 for (i
= 0; i
< hose
->nr_resources
; i
++) {
50 res
= hose
->resources
+ i
;
52 if (res
->flags
& IORESOURCE_IO
)
53 offset
= hose
->io_offset
;
54 else if (res
->flags
& IORESOURCE_MEM
)
55 offset
= hose
->mem_offset
;
56 pci_add_resource_offset(&resources
, res
, offset
);
59 list_splice_init(&resources
, &bridge
->windows
);
60 bridge
->dev
.parent
= NULL
;
61 bridge
->sysdata
= hose
;
62 bridge
->busnr
= next_busno
;
63 bridge
->ops
= hose
->pci_ops
;
64 bridge
->swizzle_irq
= pci_common_swizzle
;
65 bridge
->map_irq
= pcibios_map_platform_irq
;
67 ret
= pci_scan_root_bus_bridge(bridge
);
69 pci_free_host_bridge(bridge
);
73 hose
->bus
= bridge
->bus
;
75 need_domain_info
= need_domain_info
|| hose
->index
;
76 hose
->need_domain_info
= need_domain_info
;
78 next_busno
= hose
->bus
->busn_res
.end
+ 1;
79 /* Don't allow 8-bit bus number overflow inside the hose -
80 reserve some space for bridges. */
81 if (next_busno
> 224) {
86 pci_bus_size_bridges(hose
->bus
);
87 pci_bus_assign_resources(hose
->bus
);
88 pci_bus_add_devices(hose
->bus
);
92 * This interrupt-safe spinlock protects all accesses to PCI
93 * configuration space.
95 DEFINE_RAW_SPINLOCK(pci_config_lock
);
96 static DEFINE_MUTEX(pci_scan_mutex
);
98 int register_pci_controller(struct pci_channel
*hose
)
102 for (i
= 0; i
< hose
->nr_resources
; i
++) {
103 struct resource
*res
= hose
->resources
+ i
;
105 if (res
->flags
& IORESOURCE_IO
) {
106 if (request_resource(&ioport_resource
, res
) < 0)
109 if (request_resource(&iomem_resource
, res
) < 0)
115 hose_tail
= &hose
->next
;
118 * Do not panic here but later - this might happen before console init.
120 if (!hose
->io_map_base
) {
122 "registering PCI controller with io_map_base unset\n");
126 * Setup the ERR/PERR and SERR timers, if available.
128 pcibios_enable_timers(hose
);
131 * Scan the bus if it is register after the PCI subsystem
134 if (pci_initialized
) {
135 mutex_lock(&pci_scan_mutex
);
136 pcibios_scanbus(hose
);
137 mutex_unlock(&pci_scan_mutex
);
143 for (--i
; i
>= 0; i
--)
144 release_resource(&hose
->resources
[i
]);
146 printk(KERN_WARNING
"Skipping PCI bus scan due to resource conflict\n");
150 static int __init
pcibios_init(void)
152 struct pci_channel
*hose
;
154 /* Scan all of the recorded PCI controllers. */
155 for (hose
= hose_head
; hose
; hose
= hose
->next
)
156 pcibios_scanbus(hose
);
158 dma_debug_add_bus(&pci_bus_type
);
164 subsys_initcall(pcibios_init
);
167 * We need to avoid collisions with `mirrored' VGA ports
168 * and other strange ISA hardware, so we always want the
169 * addresses to be allocated in the 0x000-0x0ff region
172 resource_size_t
pcibios_align_resource(void *data
, const struct resource
*res
,
173 resource_size_t size
, resource_size_t align
)
175 struct pci_dev
*dev
= data
;
176 struct pci_channel
*hose
= dev
->sysdata
;
177 resource_size_t start
= res
->start
;
179 if (res
->flags
& IORESOURCE_IO
) {
180 if (start
< PCIBIOS_MIN_IO
+ hose
->resources
[0].start
)
181 start
= PCIBIOS_MIN_IO
+ hose
->resources
[0].start
;
184 * Put everything into 0x00-0xff region modulo 0x400.
187 start
= (start
+ 0x3ff) & ~0x3ff;
194 pcibios_bus_report_status_early(struct pci_channel
*hose
,
195 int top_bus
, int current_bus
,
196 unsigned int status_mask
, int warn
)
198 unsigned int pci_devfn
;
202 for (pci_devfn
= 0; pci_devfn
< 0xff; pci_devfn
++) {
203 if (PCI_FUNC(pci_devfn
))
205 ret
= early_read_config_word(hose
, top_bus
, current_bus
,
206 pci_devfn
, PCI_STATUS
, &status
);
207 if (ret
!= PCIBIOS_SUCCESSFUL
)
209 if (status
== 0xffff)
212 early_write_config_word(hose
, top_bus
, current_bus
,
213 pci_devfn
, PCI_STATUS
,
214 status
& status_mask
);
216 printk("(%02x:%02x: %04X) ", current_bus
,
222 * We can't use pci_find_device() here since we are
223 * called from interrupt context.
226 pcibios_bus_report_status(struct pci_bus
*bus
, unsigned int status_mask
,
231 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
235 * ignore host bridge - we handle
238 if (dev
->bus
->number
== 0 && dev
->devfn
== 0)
241 pci_read_config_word(dev
, PCI_STATUS
, &status
);
242 if (status
== 0xffff)
245 if ((status
& status_mask
) == 0)
248 /* clear the status errors */
249 pci_write_config_word(dev
, PCI_STATUS
, status
& status_mask
);
252 printk("(%s: %04X) ", pci_name(dev
), status
);
255 list_for_each_entry(dev
, &bus
->devices
, bus_list
)
256 if (dev
->subordinate
)
257 pcibios_bus_report_status(dev
->subordinate
, status_mask
, warn
);
260 void __ref
pcibios_report_status(unsigned int status_mask
, int warn
)
262 struct pci_channel
*hose
;
264 for (hose
= hose_head
; hose
; hose
= hose
->next
) {
265 if (unlikely(!hose
->bus
))
266 pcibios_bus_report_status_early(hose
, hose_head
->index
,
267 hose
->index
, status_mask
, warn
);
269 pcibios_bus_report_status(hose
->bus
, status_mask
, warn
);
273 #ifndef CONFIG_GENERIC_IOMAP
275 void __iomem
*__pci_ioport_map(struct pci_dev
*dev
,
276 unsigned long port
, unsigned int nr
)
278 struct pci_channel
*chan
= dev
->sysdata
;
280 if (unlikely(!chan
->io_map_base
)) {
281 chan
->io_map_base
= sh_io_port_base
;
283 if (pci_domains_supported
)
284 panic("To avoid data corruption io_map_base MUST be "
285 "set with multiple PCI domains.");
288 return (void __iomem
*)(chan
->io_map_base
+ port
);
291 void pci_iounmap(struct pci_dev
*dev
, void __iomem
*addr
)
295 EXPORT_SYMBOL(pci_iounmap
);
297 #endif /* CONFIG_GENERIC_IOMAP */
299 EXPORT_SYMBOL(PCIBIOS_MIN_IO
);
300 EXPORT_SYMBOL(PCIBIOS_MIN_MEM
);