1 /* SPDX-License-Identifier: GPL-2.0 */
3 #ifndef _ASM_X86_NOSPEC_BRANCH_H_
4 #define _ASM_X86_NOSPEC_BRANCH_H_
6 #include <asm/alternative.h>
7 #include <asm/alternative-asm.h>
8 #include <asm/cpufeatures.h>
9 #include <asm/msr-index.h>
12 * Fill the CPU return stack buffer.
14 * Each entry in the RSB, if used for a speculative 'ret', contains an
15 * infinite 'pause; lfence; jmp' loop to capture speculative execution.
17 * This is required in various cases for retpoline and IBRS-based
18 * mitigations for the Spectre variant 2 vulnerability. Sometimes to
19 * eliminate potentially bogus entries from the RSB, and sometimes
20 * purely to ensure that it doesn't get empty, which on some CPUs would
21 * allow predictions from other (unwanted!) sources to be used.
23 * We define a CPP macro such that it can be used from both .S files and
24 * inline assembly. It's possible to do a .macro and then include that
25 * from C via asm(".include <asm/nospec-branch.h>") but let's not go there.
28 #define RSB_CLEAR_LOOPS 32 /* To forcibly overwrite all entries */
29 #define RSB_FILL_LOOPS 16 /* To avoid underflow */
32 * Google experimented with loop-unrolling and this turned out to be
33 * the optimal version — two calls, each with their own speculation
34 * trap should their return address end up getting used, in a loop.
36 #define __FILL_RETURN_BUFFER(reg, nr, sp) \
40 773: /* speculation trap */ \
46 775: /* speculation trap */ \
53 add $(BITS_PER_LONG/8) * nr, sp;
58 * This should be used immediately before a retpoline alternative. It tells
59 * objtool where the retpolines are so that it can make sense of the control
60 * flow by just reading the original instruction(s) and ignoring the
63 .macro ANNOTATE_NOSPEC_ALTERNATIVE
65 .pushsection
.discard
.nospec
66 .long .Lannotate_\@
- .
71 * This should be used immediately before an indirect jump/call. It tells
72 * objtool the subsequent indirect jump/call is vouched safe for retpoline
75 .macro ANNOTATE_RETPOLINE_SAFE
77 .pushsection
.discard
.retpoline_safe
78 _ASM_PTR
.Lannotate_\@
83 * These are the bare retpoline primitives for indirect jmp and call.
84 * Do not use these directly; they only exist to make the ALTERNATIVE
85 * invocation below less ugly.
87 .macro RETPOLINE_JMP reg
:req
99 * This is a wrapper around RETPOLINE_JMP so the called function in reg
100 * returns to the instruction after the macro.
102 .macro RETPOLINE_CALL reg
:req
104 .Ldo_retpoline_jmp_\@
:
107 call
.Ldo_retpoline_jmp_\@
111 * JMP_NOSPEC and CALL_NOSPEC macros can be used instead of a simple
112 * indirect jmp/call which may be susceptible to the Spectre variant 2
115 .macro JMP_NOSPEC reg
:req
116 #ifdef CONFIG_RETPOLINE
117 ANNOTATE_NOSPEC_ALTERNATIVE
118 ALTERNATIVE_2
__stringify(ANNOTATE_RETPOLINE_SAFE
; jmp
*\reg
), \
119 __stringify(RETPOLINE_JMP
\reg
), X86_FEATURE_RETPOLINE
, \
120 __stringify(lfence
; ANNOTATE_RETPOLINE_SAFE
; jmp
*\reg
), X86_FEATURE_RETPOLINE_AMD
126 .macro CALL_NOSPEC reg
:req
127 #ifdef CONFIG_RETPOLINE
128 ANNOTATE_NOSPEC_ALTERNATIVE
129 ALTERNATIVE_2
__stringify(ANNOTATE_RETPOLINE_SAFE
; call
*\reg
), \
130 __stringify(RETPOLINE_CALL
\reg
), X86_FEATURE_RETPOLINE
,\
131 __stringify(lfence
; ANNOTATE_RETPOLINE_SAFE
; call
*\reg
), X86_FEATURE_RETPOLINE_AMD
138 * A simpler FILL_RETURN_BUFFER macro. Don't make people use the CPP
139 * monstrosity above, manually.
141 .macro FILL_RETURN_BUFFER reg
:req nr
:req ftr
:req
142 #ifdef CONFIG_RETPOLINE
143 ANNOTATE_NOSPEC_ALTERNATIVE
144 ALTERNATIVE
"jmp .Lskip_rsb_\@", \
145 __stringify(__FILL_RETURN_BUFFER(\reg
,\nr
,%_ASM_SP
)) \
151 #else /* __ASSEMBLY__ */
153 #define ANNOTATE_NOSPEC_ALTERNATIVE \
155 ".pushsection .discard.nospec\n\t" \
156 ".long 999b - .\n\t" \
159 #define ANNOTATE_RETPOLINE_SAFE \
161 ".pushsection .discard.retpoline_safe\n\t" \
162 _ASM_PTR " 999b\n\t" \
165 #if defined(CONFIG_X86_64) && defined(RETPOLINE)
168 * Since the inline asm uses the %V modifier which is only in newer GCC,
169 * the 64-bit one is dependent on RETPOLINE not CONFIG_RETPOLINE.
171 # define CALL_NOSPEC \
172 ANNOTATE_NOSPEC_ALTERNATIVE \
174 ANNOTATE_RETPOLINE_SAFE \
175 "call *%[thunk_target]\n", \
176 "call __x86_indirect_thunk_%V[thunk_target]\n", \
177 X86_FEATURE_RETPOLINE)
178 # define THUNK_TARGET(addr) [thunk_target] "r" (addr)
180 #elif defined(CONFIG_X86_32) && defined(CONFIG_RETPOLINE)
182 * For i386 we use the original ret-equivalent retpoline, because
183 * otherwise we'll run out of registers. We don't care about CET
186 # define CALL_NOSPEC ALTERNATIVE("call *%[thunk_target]\n", \
189 "901: call 903f;\n" \
194 "903: addl $4, %%esp;\n" \
195 " pushl %[thunk_target];\n" \
198 "904: call 901b;\n", \
199 X86_FEATURE_RETPOLINE)
201 # define THUNK_TARGET(addr) [thunk_target] "rm" (addr)
202 #else /* No retpoline for C / inline asm */
203 # define CALL_NOSPEC "call *%[thunk_target]\n"
204 # define THUNK_TARGET(addr) [thunk_target] "rm" (addr)
207 /* The Spectre V2 mitigation variants */
208 enum spectre_v2_mitigation
{
210 SPECTRE_V2_RETPOLINE_MINIMAL
,
211 SPECTRE_V2_RETPOLINE_MINIMAL_AMD
,
212 SPECTRE_V2_RETPOLINE_GENERIC
,
213 SPECTRE_V2_RETPOLINE_AMD
,
217 extern char __indirect_thunk_start
[];
218 extern char __indirect_thunk_end
[];
221 * On VMEXIT we must ensure that no RSB predictions learned in the guest
222 * can be followed in the host, by overwriting the RSB completely. Both
223 * retpoline and IBRS mitigations for Spectre v2 need this; only on future
224 * CPUs with IBRS_ALL *might* it be avoided.
226 static inline void vmexit_fill_RSB(void)
228 #ifdef CONFIG_RETPOLINE
231 asm volatile (ANNOTATE_NOSPEC_ALTERNATIVE
232 ALTERNATIVE("jmp 910f",
233 __stringify(__FILL_RETURN_BUFFER(%0, RSB_CLEAR_LOOPS
, %1)),
234 X86_FEATURE_RETPOLINE
)
236 : "=r" (loops
), ASM_CALL_CONSTRAINT
241 #define alternative_msr_write(_msr, _val, _feature) \
242 asm volatile(ALTERNATIVE("", \
243 "movl %[msr], %%ecx\n\t" \
244 "movl %[val], %%eax\n\t" \
245 "movl $0, %%edx\n\t" \
248 : : [msr] "i" (_msr), [val] "i" (_val) \
249 : "eax", "ecx", "edx", "memory")
251 static inline void indirect_branch_prediction_barrier(void)
253 alternative_msr_write(MSR_IA32_PRED_CMD
, PRED_CMD_IBPB
,
254 X86_FEATURE_USE_IBPB
);
258 * With retpoline, we must use IBRS to restrict branch prediction
259 * before calling into firmware.
261 * (Implemented as CPP macros due to header hell.)
263 #define firmware_restrict_branch_speculation_start() \
266 alternative_msr_write(MSR_IA32_SPEC_CTRL, SPEC_CTRL_IBRS, \
267 X86_FEATURE_USE_IBRS_FW); \
270 #define firmware_restrict_branch_speculation_end() \
272 alternative_msr_write(MSR_IA32_SPEC_CTRL, 0, \
273 X86_FEATURE_USE_IBRS_FW); \
277 #endif /* __ASSEMBLY__ */
280 * Below is used in the eBPF JIT compiler and emits the byte sequence
281 * for the following assembly:
283 * With retpolines configured:
294 * Without retpolines configured:
298 #ifdef CONFIG_RETPOLINE
299 # define RETPOLINE_RAX_BPF_JIT_SIZE 17
300 # define RETPOLINE_RAX_BPF_JIT() \
301 EMIT1_off32(0xE8, 7); /* callq do_rop */ \
303 EMIT2(0xF3, 0x90); /* pause */ \
304 EMIT3(0x0F, 0xAE, 0xE8); /* lfence */ \
305 EMIT2(0xEB, 0xF9); /* jmp spec_trap */ \
307 EMIT4(0x48, 0x89, 0x04, 0x24); /* mov %rax,(%rsp) */ \
308 EMIT1(0xC3); /* retq */
310 # define RETPOLINE_RAX_BPF_JIT_SIZE 2
311 # define RETPOLINE_RAX_BPF_JIT() \
312 EMIT2(0xFF, 0xE0); /* jmp *%rax */
315 #endif /* _ASM_X86_NOSPEC_BRANCH_H_ */