1 /* SPDX-License-Identifier: GPL-2.0 */
3 * x86 TSC related functions
8 #include <asm/processor.h>
10 #define NS_SCALE 10 /* 2^10, carefully chosen */
11 #define US_SCALE 32 /* 2^32, arbitralrily chosen */
14 * Standard way to access the cycle counter.
16 typedef unsigned long long cycles_t
;
18 extern unsigned int cpu_khz
;
19 extern unsigned int tsc_khz
;
21 extern void disable_TSC(void);
23 static inline cycles_t
get_cycles(void)
25 #ifndef CONFIG_X86_TSC
26 if (!boot_cpu_has(X86_FEATURE_TSC
))
33 extern struct system_counterval_t
convert_art_to_tsc(u64 art
);
35 extern void tsc_early_delay_calibrate(void);
36 extern void tsc_init(void);
37 extern void mark_tsc_unstable(char *reason
);
38 extern int unsynchronized_tsc(void);
39 extern int check_tsc_unstable(void);
40 extern void mark_tsc_async_resets(char *reason
);
41 extern unsigned long native_calibrate_cpu(void);
42 extern unsigned long native_calibrate_tsc(void);
43 extern unsigned long long native_sched_clock_from_tsc(u64 tsc
);
45 extern int tsc_clocksource_reliable
;
47 extern bool tsc_async_resets
;
49 # define tsc_async_resets false
53 * Boot-time check whether the TSCs are synchronized across
57 extern bool tsc_store_and_check_tsc_adjust(bool bootcpu
);
58 extern void tsc_verify_tsc_adjust(bool resume
);
59 extern void check_tsc_sync_source(int cpu
);
60 extern void check_tsc_sync_target(void);
62 static inline bool tsc_store_and_check_tsc_adjust(bool bootcpu
) { return false; }
63 static inline void tsc_verify_tsc_adjust(bool resume
) { }
64 static inline void check_tsc_sync_source(int cpu
) { }
65 static inline void check_tsc_sync_target(void) { }
68 extern int notsc_setup(char *);
69 extern void tsc_save_sched_clock_state(void);
70 extern void tsc_restore_sched_clock_state(void);
72 unsigned long cpu_khz_from_msr(void);
74 #endif /* _ASM_X86_TSC_H */