arch/x86/um/asm/barrier.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_UM_BARRIER_H_
   3 #define _ASM_UM_BARRIER_H_
   4
   5 #include <asm/asm.h>
   6 #include <asm/segment.h>
   7 #include <asm/cpufeatures.h>
   8 #include <asm/cmpxchg.h>
   9 #include <asm/nops.h>
  10
  11 #include <linux/kernel.h>
  12 #include <linux/irqflags.h>
  13
  14 /*
  15  * Force strict CPU ordering.
  16  * And yes, this is required on UP too when we're talking
  17  * to devices.
  18  */
  19 #ifdef CONFIG_X86_32
  20
  21 #define mb()    alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
  22 #define rmb()   alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
  23 #define wmb()   alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
  24
  25 #else /* CONFIG_X86_32 */
  26
  27 #define mb()    asm volatile("mfence" : : : "memory")
  28 #define rmb()   asm volatile("lfence" : : : "memory")
  29 #define wmb()   asm volatile("sfence" : : : "memory")
  30
  31 #endif /* CONFIG_X86_32 */
  32
  33 #ifdef CONFIG_X86_PPRO_FENCE
  34 #define dma_rmb()       rmb()
  35 #else /* CONFIG_X86_PPRO_FENCE */
  36 #define dma_rmb()       barrier()
  37 #endif /* CONFIG_X86_PPRO_FENCE */
  38 #define dma_wmb()       barrier()
  39
  40 #include <asm-generic/barrier.h>
  41
  42 #endif