Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / cpufreq / powernv-cpufreq.c
blob29cdec198657b714174a4fa173ee1e5085e1cf10
1 /*
2 * POWERNV cpufreq driver for the IBM POWER processors
4 * (C) Copyright IBM 2014
6 * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
20 #define pr_fmt(fmt) "powernv-cpufreq: " fmt
22 #include <linux/kernel.h>
23 #include <linux/sysfs.h>
24 #include <linux/cpumask.h>
25 #include <linux/module.h>
26 #include <linux/cpufreq.h>
27 #include <linux/smp.h>
28 #include <linux/of.h>
29 #include <linux/reboot.h>
30 #include <linux/slab.h>
31 #include <linux/cpu.h>
32 #include <linux/hashtable.h>
33 #include <trace/events/power.h>
35 #include <asm/cputhreads.h>
36 #include <asm/firmware.h>
37 #include <asm/reg.h>
38 #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
39 #include <asm/opal.h>
40 #include <linux/timer.h>
42 #define POWERNV_MAX_PSTATES_ORDER 8
43 #define POWERNV_MAX_PSTATES (1UL << (POWERNV_MAX_PSTATES_ORDER))
44 #define PMSR_PSAFE_ENABLE (1UL << 30)
45 #define PMSR_SPR_EM_DISABLE (1UL << 31)
46 #define MAX_PSTATE_SHIFT 32
47 #define LPSTATE_SHIFT 48
48 #define GPSTATE_SHIFT 56
50 #define MAX_RAMP_DOWN_TIME 5120
52 * On an idle system we want the global pstate to ramp-down from max value to
53 * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
54 * then ramp-down rapidly later on.
56 * This gives a percentage rampdown for time elapsed in milliseconds.
57 * ramp_down_percentage = ((ms * ms) >> 18)
58 * ~= 3.8 * (sec * sec)
60 * At 0 ms ramp_down_percent = 0
61 * At 5120 ms ramp_down_percent = 100
63 #define ramp_down_percent(time) ((time * time) >> 18)
65 /* Interval after which the timer is queued to bring down global pstate */
66 #define GPSTATE_TIMER_INTERVAL 2000
68 /**
69 * struct global_pstate_info - Per policy data structure to maintain history of
70 * global pstates
71 * @highest_lpstate_idx: The local pstate index from which we are
72 * ramping down
73 * @elapsed_time: Time in ms spent in ramping down from
74 * highest_lpstate_idx
75 * @last_sampled_time: Time from boot in ms when global pstates were
76 * last set
77 * @last_lpstate_idx, Last set value of local pstate and global
78 * last_gpstate_idx pstate in terms of cpufreq table index
79 * @timer: Is used for ramping down if cpu goes idle for
80 * a long time with global pstate held high
81 * @gpstate_lock: A spinlock to maintain synchronization between
82 * routines called by the timer handler and
83 * governer's target_index calls
85 struct global_pstate_info {
86 int highest_lpstate_idx;
87 unsigned int elapsed_time;
88 unsigned int last_sampled_time;
89 int last_lpstate_idx;
90 int last_gpstate_idx;
91 spinlock_t gpstate_lock;
92 struct timer_list timer;
93 struct cpufreq_policy *policy;
96 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
98 DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER);
99 /**
100 * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap
101 * indexed by a function of pstate id.
103 * @pstate_id: pstate id for this entry.
105 * @cpufreq_table_idx: Index into the powernv_freqs
106 * cpufreq_frequency_table for frequency
107 * corresponding to pstate_id.
109 * @hentry: hlist_node that hooks this entry into the pstate_revmap
110 * hashtable
112 struct pstate_idx_revmap_data {
113 u8 pstate_id;
114 unsigned int cpufreq_table_idx;
115 struct hlist_node hentry;
118 static bool rebooting, throttled, occ_reset;
120 static const char * const throttle_reason[] = {
121 "No throttling",
122 "Power Cap",
123 "Processor Over Temperature",
124 "Power Supply Failure",
125 "Over Current",
126 "OCC Reset"
129 enum throttle_reason_type {
130 NO_THROTTLE = 0,
131 POWERCAP,
132 CPU_OVERTEMP,
133 POWER_SUPPLY_FAILURE,
134 OVERCURRENT,
135 OCC_RESET_THROTTLE,
136 OCC_MAX_REASON
139 static struct chip {
140 unsigned int id;
141 bool throttled;
142 bool restore;
143 u8 throttle_reason;
144 cpumask_t mask;
145 struct work_struct throttle;
146 int throttle_turbo;
147 int throttle_sub_turbo;
148 int reason[OCC_MAX_REASON];
149 } *chips;
151 static int nr_chips;
152 static DEFINE_PER_CPU(struct chip *, chip_info);
155 * Note:
156 * The set of pstates consists of contiguous integers.
157 * powernv_pstate_info stores the index of the frequency table for
158 * max, min and nominal frequencies. It also stores number of
159 * available frequencies.
161 * powernv_pstate_info.nominal indicates the index to the highest
162 * non-turbo frequency.
164 static struct powernv_pstate_info {
165 unsigned int min;
166 unsigned int max;
167 unsigned int nominal;
168 unsigned int nr_pstates;
169 bool wof_enabled;
170 } powernv_pstate_info;
172 static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift)
174 return ((pmsr_val >> shift) & 0xFF);
177 #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT)
178 #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT)
179 #define extract_max_pstate(x) extract_pstate(x, MAX_PSTATE_SHIFT)
181 /* Use following functions for conversions between pstate_id and index */
184 * idx_to_pstate : Returns the pstate id corresponding to the
185 * frequency in the cpufreq frequency table
186 * powernv_freqs indexed by @i.
188 * If @i is out of bound, this will return the pstate
189 * corresponding to the nominal frequency.
191 static inline u8 idx_to_pstate(unsigned int i)
193 if (unlikely(i >= powernv_pstate_info.nr_pstates)) {
194 pr_warn_once("idx_to_pstate: index %u is out of bound\n", i);
195 return powernv_freqs[powernv_pstate_info.nominal].driver_data;
198 return powernv_freqs[i].driver_data;
202 * pstate_to_idx : Returns the index in the cpufreq frequencytable
203 * powernv_freqs for the frequency whose corresponding
204 * pstate id is @pstate.
206 * If no frequency corresponding to @pstate is found,
207 * this will return the index of the nominal
208 * frequency.
210 static unsigned int pstate_to_idx(u8 pstate)
212 unsigned int key = pstate % POWERNV_MAX_PSTATES;
213 struct pstate_idx_revmap_data *revmap_data;
215 hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) {
216 if (revmap_data->pstate_id == pstate)
217 return revmap_data->cpufreq_table_idx;
220 pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate);
221 return powernv_pstate_info.nominal;
224 static inline void reset_gpstates(struct cpufreq_policy *policy)
226 struct global_pstate_info *gpstates = policy->driver_data;
228 gpstates->highest_lpstate_idx = 0;
229 gpstates->elapsed_time = 0;
230 gpstates->last_sampled_time = 0;
231 gpstates->last_lpstate_idx = 0;
232 gpstates->last_gpstate_idx = 0;
236 * Initialize the freq table based on data obtained
237 * from the firmware passed via device-tree
239 static int init_powernv_pstates(void)
241 struct device_node *power_mgt;
242 int i, nr_pstates = 0;
243 const __be32 *pstate_ids, *pstate_freqs;
244 u32 len_ids, len_freqs;
245 u32 pstate_min, pstate_max, pstate_nominal;
246 u32 pstate_turbo, pstate_ultra_turbo;
248 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
249 if (!power_mgt) {
250 pr_warn("power-mgt node not found\n");
251 return -ENODEV;
254 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
255 pr_warn("ibm,pstate-min node not found\n");
256 return -ENODEV;
259 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
260 pr_warn("ibm,pstate-max node not found\n");
261 return -ENODEV;
264 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
265 &pstate_nominal)) {
266 pr_warn("ibm,pstate-nominal not found\n");
267 return -ENODEV;
270 if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo",
271 &pstate_ultra_turbo)) {
272 powernv_pstate_info.wof_enabled = false;
273 goto next;
276 if (of_property_read_u32(power_mgt, "ibm,pstate-turbo",
277 &pstate_turbo)) {
278 powernv_pstate_info.wof_enabled = false;
279 goto next;
282 if (pstate_turbo == pstate_ultra_turbo)
283 powernv_pstate_info.wof_enabled = false;
284 else
285 powernv_pstate_info.wof_enabled = true;
287 next:
288 pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min,
289 pstate_nominal, pstate_max);
290 pr_info("Workload Optimized Frequency is %s in the platform\n",
291 (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled");
293 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
294 if (!pstate_ids) {
295 pr_warn("ibm,pstate-ids not found\n");
296 return -ENODEV;
299 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
300 &len_freqs);
301 if (!pstate_freqs) {
302 pr_warn("ibm,pstate-frequencies-mhz not found\n");
303 return -ENODEV;
306 if (len_ids != len_freqs) {
307 pr_warn("Entries in ibm,pstate-ids and "
308 "ibm,pstate-frequencies-mhz does not match\n");
311 nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
312 if (!nr_pstates) {
313 pr_warn("No PStates found\n");
314 return -ENODEV;
317 powernv_pstate_info.nr_pstates = nr_pstates;
318 pr_debug("NR PStates %d\n", nr_pstates);
320 for (i = 0; i < nr_pstates; i++) {
321 u32 id = be32_to_cpu(pstate_ids[i]);
322 u32 freq = be32_to_cpu(pstate_freqs[i]);
323 struct pstate_idx_revmap_data *revmap_data;
324 unsigned int key;
326 pr_debug("PState id %d freq %d MHz\n", id, freq);
327 powernv_freqs[i].frequency = freq * 1000; /* kHz */
328 powernv_freqs[i].driver_data = id & 0xFF;
330 revmap_data = (struct pstate_idx_revmap_data *)
331 kmalloc(sizeof(*revmap_data), GFP_KERNEL);
333 revmap_data->pstate_id = id & 0xFF;
334 revmap_data->cpufreq_table_idx = i;
335 key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES;
336 hash_add(pstate_revmap, &revmap_data->hentry, key);
338 if (id == pstate_max)
339 powernv_pstate_info.max = i;
340 if (id == pstate_nominal)
341 powernv_pstate_info.nominal = i;
342 if (id == pstate_min)
343 powernv_pstate_info.min = i;
345 if (powernv_pstate_info.wof_enabled && id == pstate_turbo) {
346 int j;
348 for (j = i - 1; j >= (int)powernv_pstate_info.max; j--)
349 powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ;
353 /* End of list marker entry */
354 powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
355 return 0;
358 /* Returns the CPU frequency corresponding to the pstate_id. */
359 static unsigned int pstate_id_to_freq(u8 pstate_id)
361 int i;
363 i = pstate_to_idx(pstate_id);
364 if (i >= powernv_pstate_info.nr_pstates || i < 0) {
365 pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n",
366 pstate_id, idx_to_pstate(powernv_pstate_info.nominal));
367 i = powernv_pstate_info.nominal;
370 return powernv_freqs[i].frequency;
374 * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
375 * the firmware
377 static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
378 char *buf)
380 return sprintf(buf, "%u\n",
381 powernv_freqs[powernv_pstate_info.nominal].frequency);
384 struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
385 __ATTR_RO(cpuinfo_nominal_freq);
387 #define SCALING_BOOST_FREQS_ATTR_INDEX 2
389 static struct freq_attr *powernv_cpu_freq_attr[] = {
390 &cpufreq_freq_attr_scaling_available_freqs,
391 &cpufreq_freq_attr_cpuinfo_nominal_freq,
392 &cpufreq_freq_attr_scaling_boost_freqs,
393 NULL,
396 #define throttle_attr(name, member) \
397 static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \
399 struct chip *chip = per_cpu(chip_info, policy->cpu); \
401 return sprintf(buf, "%u\n", chip->member); \
404 static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \
406 throttle_attr(unthrottle, reason[NO_THROTTLE]);
407 throttle_attr(powercap, reason[POWERCAP]);
408 throttle_attr(overtemp, reason[CPU_OVERTEMP]);
409 throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
410 throttle_attr(overcurrent, reason[OVERCURRENT]);
411 throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
412 throttle_attr(turbo_stat, throttle_turbo);
413 throttle_attr(sub_turbo_stat, throttle_sub_turbo);
415 static struct attribute *throttle_attrs[] = {
416 &throttle_attr_unthrottle.attr,
417 &throttle_attr_powercap.attr,
418 &throttle_attr_overtemp.attr,
419 &throttle_attr_supply_fault.attr,
420 &throttle_attr_overcurrent.attr,
421 &throttle_attr_occ_reset.attr,
422 &throttle_attr_turbo_stat.attr,
423 &throttle_attr_sub_turbo_stat.attr,
424 NULL,
427 static const struct attribute_group throttle_attr_grp = {
428 .name = "throttle_stats",
429 .attrs = throttle_attrs,
432 /* Helper routines */
434 /* Access helpers to power mgt SPR */
436 static inline unsigned long get_pmspr(unsigned long sprn)
438 switch (sprn) {
439 case SPRN_PMCR:
440 return mfspr(SPRN_PMCR);
442 case SPRN_PMICR:
443 return mfspr(SPRN_PMICR);
445 case SPRN_PMSR:
446 return mfspr(SPRN_PMSR);
448 BUG();
451 static inline void set_pmspr(unsigned long sprn, unsigned long val)
453 switch (sprn) {
454 case SPRN_PMCR:
455 mtspr(SPRN_PMCR, val);
456 return;
458 case SPRN_PMICR:
459 mtspr(SPRN_PMICR, val);
460 return;
462 BUG();
466 * Use objects of this type to query/update
467 * pstates on a remote CPU via smp_call_function.
469 struct powernv_smp_call_data {
470 unsigned int freq;
471 u8 pstate_id;
472 u8 gpstate_id;
476 * powernv_read_cpu_freq: Reads the current frequency on this CPU.
478 * Called via smp_call_function.
480 * Note: The caller of the smp_call_function should pass an argument of
481 * the type 'struct powernv_smp_call_data *' along with this function.
483 * The current frequency on this CPU will be returned via
484 * ((struct powernv_smp_call_data *)arg)->freq;
486 static void powernv_read_cpu_freq(void *arg)
488 unsigned long pmspr_val;
489 struct powernv_smp_call_data *freq_data = arg;
491 pmspr_val = get_pmspr(SPRN_PMSR);
492 freq_data->pstate_id = extract_local_pstate(pmspr_val);
493 freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
495 pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n",
496 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
497 freq_data->freq);
501 * powernv_cpufreq_get: Returns the CPU frequency as reported by the
502 * firmware for CPU 'cpu'. This value is reported through the sysfs
503 * file cpuinfo_cur_freq.
505 static unsigned int powernv_cpufreq_get(unsigned int cpu)
507 struct powernv_smp_call_data freq_data;
509 smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
510 &freq_data, 1);
512 return freq_data.freq;
516 * set_pstate: Sets the pstate on this CPU.
518 * This is called via an smp_call_function.
520 * The caller must ensure that freq_data is of the type
521 * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
522 * on this CPU should be present in freq_data->pstate_id.
524 static void set_pstate(void *data)
526 unsigned long val;
527 struct powernv_smp_call_data *freq_data = data;
528 unsigned long pstate_ul = freq_data->pstate_id;
529 unsigned long gpstate_ul = freq_data->gpstate_id;
531 val = get_pmspr(SPRN_PMCR);
532 val = val & 0x0000FFFFFFFFFFFFULL;
534 pstate_ul = pstate_ul & 0xFF;
535 gpstate_ul = gpstate_ul & 0xFF;
537 /* Set both global(bits 56..63) and local(bits 48..55) PStates */
538 val = val | (gpstate_ul << 56) | (pstate_ul << 48);
540 pr_debug("Setting cpu %d pmcr to %016lX\n",
541 raw_smp_processor_id(), val);
542 set_pmspr(SPRN_PMCR, val);
546 * get_nominal_index: Returns the index corresponding to the nominal
547 * pstate in the cpufreq table
549 static inline unsigned int get_nominal_index(void)
551 return powernv_pstate_info.nominal;
554 static void powernv_cpufreq_throttle_check(void *data)
556 struct chip *chip;
557 unsigned int cpu = smp_processor_id();
558 unsigned long pmsr;
559 u8 pmsr_pmax;
560 unsigned int pmsr_pmax_idx;
562 pmsr = get_pmspr(SPRN_PMSR);
563 chip = this_cpu_read(chip_info);
565 /* Check for Pmax Capping */
566 pmsr_pmax = extract_max_pstate(pmsr);
567 pmsr_pmax_idx = pstate_to_idx(pmsr_pmax);
568 if (pmsr_pmax_idx != powernv_pstate_info.max) {
569 if (chip->throttled)
570 goto next;
571 chip->throttled = true;
572 if (pmsr_pmax_idx > powernv_pstate_info.nominal) {
573 pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n",
574 cpu, chip->id, pmsr_pmax,
575 idx_to_pstate(powernv_pstate_info.nominal));
576 chip->throttle_sub_turbo++;
577 } else {
578 chip->throttle_turbo++;
580 trace_powernv_throttle(chip->id,
581 throttle_reason[chip->throttle_reason],
582 pmsr_pmax);
583 } else if (chip->throttled) {
584 chip->throttled = false;
585 trace_powernv_throttle(chip->id,
586 throttle_reason[chip->throttle_reason],
587 pmsr_pmax);
590 /* Check if Psafe_mode_active is set in PMSR. */
591 next:
592 if (pmsr & PMSR_PSAFE_ENABLE) {
593 throttled = true;
594 pr_info("Pstate set to safe frequency\n");
597 /* Check if SPR_EM_DISABLE is set in PMSR */
598 if (pmsr & PMSR_SPR_EM_DISABLE) {
599 throttled = true;
600 pr_info("Frequency Control disabled from OS\n");
603 if (throttled) {
604 pr_info("PMSR = %16lx\n", pmsr);
605 pr_warn("CPU Frequency could be throttled\n");
610 * calc_global_pstate - Calculate global pstate
611 * @elapsed_time: Elapsed time in milliseconds
612 * @local_pstate_idx: New local pstate
613 * @highest_lpstate_idx: pstate from which its ramping down
615 * Finds the appropriate global pstate based on the pstate from which its
616 * ramping down and the time elapsed in ramping down. It follows a quadratic
617 * equation which ensures that it reaches ramping down to pmin in 5sec.
619 static inline int calc_global_pstate(unsigned int elapsed_time,
620 int highest_lpstate_idx,
621 int local_pstate_idx)
623 int index_diff;
626 * Using ramp_down_percent we get the percentage of rampdown
627 * that we are expecting to be dropping. Difference between
628 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
629 * number of how many pstates we will drop eventually by the end of
630 * 5 seconds, then just scale it get the number pstates to be dropped.
632 index_diff = ((int)ramp_down_percent(elapsed_time) *
633 (powernv_pstate_info.min - highest_lpstate_idx)) / 100;
635 /* Ensure that global pstate is >= to local pstate */
636 if (highest_lpstate_idx + index_diff >= local_pstate_idx)
637 return local_pstate_idx;
638 else
639 return highest_lpstate_idx + index_diff;
642 static inline void queue_gpstate_timer(struct global_pstate_info *gpstates)
644 unsigned int timer_interval;
647 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
648 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
649 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
650 * seconds of ramp down time.
652 if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL)
653 > MAX_RAMP_DOWN_TIME)
654 timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time;
655 else
656 timer_interval = GPSTATE_TIMER_INTERVAL;
658 mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval));
662 * gpstate_timer_handler
664 * @data: pointer to cpufreq_policy on which timer was queued
666 * This handler brings down the global pstate closer to the local pstate
667 * according quadratic equation. Queues a new timer if it is still not equal
668 * to local pstate
670 void gpstate_timer_handler(struct timer_list *t)
672 struct global_pstate_info *gpstates = from_timer(gpstates, t, timer);
673 struct cpufreq_policy *policy = gpstates->policy;
674 int gpstate_idx, lpstate_idx;
675 unsigned long val;
676 unsigned int time_diff = jiffies_to_msecs(jiffies)
677 - gpstates->last_sampled_time;
678 struct powernv_smp_call_data freq_data;
680 if (!spin_trylock(&gpstates->gpstate_lock))
681 return;
684 * If PMCR was last updated was using fast_swtich then
685 * We may have wrong in gpstate->last_lpstate_idx
686 * value. Hence, read from PMCR to get correct data.
688 val = get_pmspr(SPRN_PMCR);
689 freq_data.gpstate_id = extract_global_pstate(val);
690 freq_data.pstate_id = extract_local_pstate(val);
691 if (freq_data.gpstate_id == freq_data.pstate_id) {
692 reset_gpstates(policy);
693 spin_unlock(&gpstates->gpstate_lock);
694 return;
697 gpstates->last_sampled_time += time_diff;
698 gpstates->elapsed_time += time_diff;
700 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
701 gpstate_idx = pstate_to_idx(freq_data.pstate_id);
702 lpstate_idx = gpstate_idx;
703 reset_gpstates(policy);
704 gpstates->highest_lpstate_idx = gpstate_idx;
705 } else {
706 lpstate_idx = pstate_to_idx(freq_data.pstate_id);
707 gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
708 gpstates->highest_lpstate_idx,
709 lpstate_idx);
711 freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
712 gpstates->last_gpstate_idx = gpstate_idx;
713 gpstates->last_lpstate_idx = lpstate_idx;
715 * If local pstate is equal to global pstate, rampdown is over
716 * So timer is not required to be queued.
718 if (gpstate_idx != gpstates->last_lpstate_idx)
719 queue_gpstate_timer(gpstates);
721 spin_unlock(&gpstates->gpstate_lock);
723 /* Timer may get migrated to a different cpu on cpu hot unplug */
724 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
728 * powernv_cpufreq_target_index: Sets the frequency corresponding to
729 * the cpufreq table entry indexed by new_index on the cpus in the
730 * mask policy->cpus
732 static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
733 unsigned int new_index)
735 struct powernv_smp_call_data freq_data;
736 unsigned int cur_msec, gpstate_idx;
737 struct global_pstate_info *gpstates = policy->driver_data;
739 if (unlikely(rebooting) && new_index != get_nominal_index())
740 return 0;
742 if (!throttled) {
743 /* we don't want to be preempted while
744 * checking if the CPU frequency has been throttled
746 preempt_disable();
747 powernv_cpufreq_throttle_check(NULL);
748 preempt_enable();
751 cur_msec = jiffies_to_msecs(get_jiffies_64());
753 spin_lock(&gpstates->gpstate_lock);
754 freq_data.pstate_id = idx_to_pstate(new_index);
756 if (!gpstates->last_sampled_time) {
757 gpstate_idx = new_index;
758 gpstates->highest_lpstate_idx = new_index;
759 goto gpstates_done;
762 if (gpstates->last_gpstate_idx < new_index) {
763 gpstates->elapsed_time += cur_msec -
764 gpstates->last_sampled_time;
767 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
768 * we should be resetting all global pstate related data. Set it
769 * equal to local pstate to start fresh.
771 if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
772 reset_gpstates(policy);
773 gpstates->highest_lpstate_idx = new_index;
774 gpstate_idx = new_index;
775 } else {
776 /* Elaspsed_time is less than 5 seconds, continue to rampdown */
777 gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
778 gpstates->highest_lpstate_idx,
779 new_index);
781 } else {
782 reset_gpstates(policy);
783 gpstates->highest_lpstate_idx = new_index;
784 gpstate_idx = new_index;
788 * If local pstate is equal to global pstate, rampdown is over
789 * So timer is not required to be queued.
791 if (gpstate_idx != new_index)
792 queue_gpstate_timer(gpstates);
793 else
794 del_timer_sync(&gpstates->timer);
796 gpstates_done:
797 freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
798 gpstates->last_sampled_time = cur_msec;
799 gpstates->last_gpstate_idx = gpstate_idx;
800 gpstates->last_lpstate_idx = new_index;
802 spin_unlock(&gpstates->gpstate_lock);
805 * Use smp_call_function to send IPI and execute the
806 * mtspr on target CPU. We could do that without IPI
807 * if current CPU is within policy->cpus (core)
809 smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
810 return 0;
813 static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
815 int base, i, ret;
816 struct kernfs_node *kn;
817 struct global_pstate_info *gpstates;
819 base = cpu_first_thread_sibling(policy->cpu);
821 for (i = 0; i < threads_per_core; i++)
822 cpumask_set_cpu(base + i, policy->cpus);
824 kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name);
825 if (!kn) {
826 int ret;
828 ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
829 if (ret) {
830 pr_info("Failed to create throttle stats directory for cpu %d\n",
831 policy->cpu);
832 return ret;
834 } else {
835 kernfs_put(kn);
838 gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL);
839 if (!gpstates)
840 return -ENOMEM;
842 policy->driver_data = gpstates;
844 /* initialize timer */
845 gpstates->policy = policy;
846 timer_setup(&gpstates->timer, gpstate_timer_handler,
847 TIMER_PINNED | TIMER_DEFERRABLE);
848 gpstates->timer.expires = jiffies +
849 msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
850 spin_lock_init(&gpstates->gpstate_lock);
851 ret = cpufreq_table_validate_and_show(policy, powernv_freqs);
853 if (ret < 0) {
854 kfree(policy->driver_data);
855 return ret;
858 policy->fast_switch_possible = true;
859 return ret;
862 static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy)
864 /* timer is deleted in cpufreq_cpu_stop() */
865 kfree(policy->driver_data);
867 return 0;
870 static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
871 unsigned long action, void *unused)
873 int cpu;
874 struct cpufreq_policy cpu_policy;
876 rebooting = true;
877 for_each_online_cpu(cpu) {
878 cpufreq_get_policy(&cpu_policy, cpu);
879 powernv_cpufreq_target_index(&cpu_policy, get_nominal_index());
882 return NOTIFY_DONE;
885 static struct notifier_block powernv_cpufreq_reboot_nb = {
886 .notifier_call = powernv_cpufreq_reboot_notifier,
889 void powernv_cpufreq_work_fn(struct work_struct *work)
891 struct chip *chip = container_of(work, struct chip, throttle);
892 unsigned int cpu;
893 cpumask_t mask;
895 get_online_cpus();
896 cpumask_and(&mask, &chip->mask, cpu_online_mask);
897 smp_call_function_any(&mask,
898 powernv_cpufreq_throttle_check, NULL, 0);
900 if (!chip->restore)
901 goto out;
903 chip->restore = false;
904 for_each_cpu(cpu, &mask) {
905 int index;
906 struct cpufreq_policy policy;
908 cpufreq_get_policy(&policy, cpu);
909 index = cpufreq_table_find_index_c(&policy, policy.cur);
910 powernv_cpufreq_target_index(&policy, index);
911 cpumask_andnot(&mask, &mask, policy.cpus);
913 out:
914 put_online_cpus();
917 static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
918 unsigned long msg_type, void *_msg)
920 struct opal_msg *msg = _msg;
921 struct opal_occ_msg omsg;
922 int i;
924 if (msg_type != OPAL_MSG_OCC)
925 return 0;
927 omsg.type = be64_to_cpu(msg->params[0]);
929 switch (omsg.type) {
930 case OCC_RESET:
931 occ_reset = true;
932 pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
934 * powernv_cpufreq_throttle_check() is called in
935 * target() callback which can detect the throttle state
936 * for governors like ondemand.
937 * But static governors will not call target() often thus
938 * report throttling here.
940 if (!throttled) {
941 throttled = true;
942 pr_warn("CPU frequency is throttled for duration\n");
945 break;
946 case OCC_LOAD:
947 pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
948 break;
949 case OCC_THROTTLE:
950 omsg.chip = be64_to_cpu(msg->params[1]);
951 omsg.throttle_status = be64_to_cpu(msg->params[2]);
953 if (occ_reset) {
954 occ_reset = false;
955 throttled = false;
956 pr_info("OCC Active, CPU frequency is no longer throttled\n");
958 for (i = 0; i < nr_chips; i++) {
959 chips[i].restore = true;
960 schedule_work(&chips[i].throttle);
963 return 0;
966 for (i = 0; i < nr_chips; i++)
967 if (chips[i].id == omsg.chip)
968 break;
970 if (omsg.throttle_status >= 0 &&
971 omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
972 chips[i].throttle_reason = omsg.throttle_status;
973 chips[i].reason[omsg.throttle_status]++;
976 if (!omsg.throttle_status)
977 chips[i].restore = true;
979 schedule_work(&chips[i].throttle);
981 return 0;
984 static struct notifier_block powernv_cpufreq_opal_nb = {
985 .notifier_call = powernv_cpufreq_occ_msg,
986 .next = NULL,
987 .priority = 0,
990 static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
992 struct powernv_smp_call_data freq_data;
993 struct global_pstate_info *gpstates = policy->driver_data;
995 freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min);
996 freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min);
997 smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
998 del_timer_sync(&gpstates->timer);
1001 static unsigned int powernv_fast_switch(struct cpufreq_policy *policy,
1002 unsigned int target_freq)
1004 int index;
1005 struct powernv_smp_call_data freq_data;
1007 index = cpufreq_table_find_index_dl(policy, target_freq);
1008 freq_data.pstate_id = powernv_freqs[index].driver_data;
1009 freq_data.gpstate_id = powernv_freqs[index].driver_data;
1010 set_pstate(&freq_data);
1012 return powernv_freqs[index].frequency;
1015 static struct cpufreq_driver powernv_cpufreq_driver = {
1016 .name = "powernv-cpufreq",
1017 .flags = CPUFREQ_CONST_LOOPS,
1018 .init = powernv_cpufreq_cpu_init,
1019 .exit = powernv_cpufreq_cpu_exit,
1020 .verify = cpufreq_generic_frequency_table_verify,
1021 .target_index = powernv_cpufreq_target_index,
1022 .fast_switch = powernv_fast_switch,
1023 .get = powernv_cpufreq_get,
1024 .stop_cpu = powernv_cpufreq_stop_cpu,
1025 .attr = powernv_cpu_freq_attr,
1028 static int init_chip_info(void)
1030 unsigned int chip[256];
1031 unsigned int cpu, i;
1032 unsigned int prev_chip_id = UINT_MAX;
1034 for_each_possible_cpu(cpu) {
1035 unsigned int id = cpu_to_chip_id(cpu);
1037 if (prev_chip_id != id) {
1038 prev_chip_id = id;
1039 chip[nr_chips++] = id;
1043 chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
1044 if (!chips)
1045 return -ENOMEM;
1047 for (i = 0; i < nr_chips; i++) {
1048 chips[i].id = chip[i];
1049 cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
1050 INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
1051 for_each_cpu(cpu, &chips[i].mask)
1052 per_cpu(chip_info, cpu) = &chips[i];
1055 return 0;
1058 static inline void clean_chip_info(void)
1060 kfree(chips);
1063 static inline void unregister_all_notifiers(void)
1065 opal_message_notifier_unregister(OPAL_MSG_OCC,
1066 &powernv_cpufreq_opal_nb);
1067 unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
1070 static int __init powernv_cpufreq_init(void)
1072 int rc = 0;
1074 /* Don't probe on pseries (guest) platforms */
1075 if (!firmware_has_feature(FW_FEATURE_OPAL))
1076 return -ENODEV;
1078 /* Discover pstates from device tree and init */
1079 rc = init_powernv_pstates();
1080 if (rc)
1081 goto out;
1083 /* Populate chip info */
1084 rc = init_chip_info();
1085 if (rc)
1086 goto out;
1088 register_reboot_notifier(&powernv_cpufreq_reboot_nb);
1089 opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
1091 if (powernv_pstate_info.wof_enabled)
1092 powernv_cpufreq_driver.boost_enabled = true;
1093 else
1094 powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL;
1096 rc = cpufreq_register_driver(&powernv_cpufreq_driver);
1097 if (rc) {
1098 pr_info("Failed to register the cpufreq driver (%d)\n", rc);
1099 goto cleanup_notifiers;
1102 if (powernv_pstate_info.wof_enabled)
1103 cpufreq_enable_boost_support();
1105 return 0;
1106 cleanup_notifiers:
1107 unregister_all_notifiers();
1108 clean_chip_info();
1109 out:
1110 pr_info("Platform driver disabled. System does not support PState control\n");
1111 return rc;
1113 module_init(powernv_cpufreq_init);
1115 static void __exit powernv_cpufreq_exit(void)
1117 cpufreq_unregister_driver(&powernv_cpufreq_driver);
1118 unregister_all_notifiers();
1119 clean_chip_info();
1121 module_exit(powernv_cpufreq_exit);
1123 MODULE_LICENSE("GPL");
1124 MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");