drivers/crypto/omap-aes.h

   1 /*
   2  * Cryptographic API.
   3  *
   4  * Support for OMAP AES HW ACCELERATOR defines
   5  *
   6  * Copyright (c) 2015 Texas Instruments Incorporated
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as published
  10  * by the Free Software Foundation.
  11  *
  12  */
  13 #ifndef __OMAP_AES_H__
  14 #define __OMAP_AES_H__
  15
  16 #define DST_MAXBURST                    4
  17 #define DMA_MIN                         (DST_MAXBURST * sizeof(u32))
  18
  19 #define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
  20
  21 /*
  22  * OMAP TRM gives bitfields as start:end, where start is the higher bit
  23  * number. For example 7:0
  24  */
  25 #define FLD_MASK(start, end)    (((1 << ((start) - (end) + 1)) - 1) << (end))
  26 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
  27
  28 #define AES_REG_KEY(dd, x)              ((dd)->pdata->key_ofs - \
  29                                                 (((x) ^ 0x01) * 0x04))
  30 #define AES_REG_IV(dd, x)               ((dd)->pdata->iv_ofs + ((x) * 0x04))
  31
  32 #define AES_REG_CTRL(dd)                ((dd)->pdata->ctrl_ofs)
  33 #define AES_REG_CTRL_CONTEXT_READY      BIT(31)
  34 #define AES_REG_CTRL_CTR_WIDTH_MASK     GENMASK(8, 7)
  35 #define AES_REG_CTRL_CTR_WIDTH_32       0
  36 #define AES_REG_CTRL_CTR_WIDTH_64       BIT(7)
  37 #define AES_REG_CTRL_CTR_WIDTH_96       BIT(8)
  38 #define AES_REG_CTRL_CTR_WIDTH_128      GENMASK(8, 7)
  39 #define AES_REG_CTRL_GCM                GENMASK(17, 16)
  40 #define AES_REG_CTRL_CTR                BIT(6)
  41 #define AES_REG_CTRL_CBC                BIT(5)
  42 #define AES_REG_CTRL_KEY_SIZE           GENMASK(4, 3)
  43 #define AES_REG_CTRL_DIRECTION          BIT(2)
  44 #define AES_REG_CTRL_INPUT_READY        BIT(1)
  45 #define AES_REG_CTRL_OUTPUT_READY       BIT(0)
  46 #define AES_REG_CTRL_MASK               GENMASK(24, 2)
  47
  48 #define AES_REG_C_LEN_0                 0x54
  49 #define AES_REG_C_LEN_1                 0x58
  50 #define AES_REG_A_LEN                   0x5C
  51
  52 #define AES_REG_DATA_N(dd, x)           ((dd)->pdata->data_ofs + ((x) * 0x04))
  53 #define AES_REG_TAG_N(dd, x)            (0x70 + ((x) * 0x04))
  54
  55 #define AES_REG_REV(dd)                 ((dd)->pdata->rev_ofs)
  56
  57 #define AES_REG_MASK(dd)                ((dd)->pdata->mask_ofs)
  58 #define AES_REG_MASK_SIDLE              BIT(6)
  59 #define AES_REG_MASK_START              BIT(5)
  60 #define AES_REG_MASK_DMA_OUT_EN         BIT(3)
  61 #define AES_REG_MASK_DMA_IN_EN          BIT(2)
  62 #define AES_REG_MASK_SOFTRESET          BIT(1)
  63 #define AES_REG_AUTOIDLE                BIT(0)
  64
  65 #define AES_REG_LENGTH_N(x)             (0x54 + ((x) * 0x04))
  66
  67 #define AES_REG_IRQ_STATUS(dd)         ((dd)->pdata->irq_status_ofs)
  68 #define AES_REG_IRQ_ENABLE(dd)         ((dd)->pdata->irq_enable_ofs)
  69 #define AES_REG_IRQ_DATA_IN            BIT(1)
  70 #define AES_REG_IRQ_DATA_OUT           BIT(2)
  71 #define DEFAULT_TIMEOUT         (5 * HZ)
  72
  73 #define DEFAULT_AUTOSUSPEND_DELAY       1000
  74
  75 #define FLAGS_MODE_MASK         0x001f
  76 #define FLAGS_ENCRYPT           BIT(0)
  77 #define FLAGS_CBC               BIT(1)
  78 #define FLAGS_CTR               BIT(2)
  79 #define FLAGS_GCM               BIT(3)
  80 #define FLAGS_RFC4106_GCM       BIT(4)
  81
  82 #define FLAGS_INIT              BIT(5)
  83 #define FLAGS_FAST              BIT(6)
  84 #define FLAGS_BUSY              BIT(7)
  85
  86 #define FLAGS_IN_DATA_ST_SHIFT  8
  87 #define FLAGS_OUT_DATA_ST_SHIFT 10
  88 #define FLAGS_ASSOC_DATA_ST_SHIFT       12
  89
  90 #define AES_BLOCK_WORDS         (AES_BLOCK_SIZE >> 2)
  91
  92 struct omap_aes_gcm_result {
  93         struct completion completion;
  94         int err;
  95 };
  96
  97 struct omap_aes_ctx {
  98         int             keylen;
  99         u32             key[AES_KEYSIZE_256 / sizeof(u32)];
 100         u8              nonce[4];
 101         struct crypto_skcipher  *fallback;
 102         struct crypto_skcipher  *ctr;
 103 };
 104
 105 struct omap_aes_reqctx {
 106         struct omap_aes_dev *dd;
 107         unsigned long mode;
 108         u8 iv[AES_BLOCK_SIZE];
 109         u32 auth_tag[AES_BLOCK_SIZE / sizeof(u32)];
 110 };
 111
 112 #define OMAP_AES_QUEUE_LENGTH   1
 113 #define OMAP_AES_CACHE_SIZE     0
 114
 115 struct omap_aes_algs_info {
 116         struct crypto_alg       *algs_list;
 117         unsigned int            size;
 118         unsigned int            registered;
 119 };
 120
 121 struct omap_aes_aead_algs {
 122         struct aead_alg *algs_list;
 123         unsigned int    size;
 124         unsigned int    registered;
 125 };
 126
 127 struct omap_aes_pdata {
 128         struct omap_aes_algs_info       *algs_info;
 129         unsigned int    algs_info_size;
 130         struct omap_aes_aead_algs       *aead_algs_info;
 131
 132         void            (*trigger)(struct omap_aes_dev *dd, int length);
 133
 134         u32             key_ofs;
 135         u32             iv_ofs;
 136         u32             ctrl_ofs;
 137         u32             data_ofs;
 138         u32             rev_ofs;
 139         u32             mask_ofs;
 140         u32             irq_enable_ofs;
 141         u32             irq_status_ofs;
 142
 143         u32             dma_enable_in;
 144         u32             dma_enable_out;
 145         u32             dma_start;
 146
 147         u32             major_mask;
 148         u32             major_shift;
 149         u32             minor_mask;
 150         u32             minor_shift;
 151 };
 152
 153 struct omap_aes_dev {
 154         struct list_head        list;
 155         unsigned long           phys_base;
 156         void __iomem            *io_base;
 157         struct omap_aes_ctx     *ctx;
 158         struct device           *dev;
 159         unsigned long           flags;
 160         int                     err;
 161
 162         struct tasklet_struct   done_task;
 163         struct aead_queue       aead_queue;
 164         spinlock_t              lock;
 165
 166         struct ablkcipher_request       *req;
 167         struct aead_request             *aead_req;
 168         struct crypto_engine            *engine;
 169
 170         /*
 171          * total is used by PIO mode for book keeping so introduce
 172          * variable total_save as need it to calc page_order
 173          */
 174         size_t                          total;
 175         size_t                          total_save;
 176         size_t                          assoc_len;
 177         size_t                          authsize;
 178
 179         struct scatterlist              *in_sg;
 180         struct scatterlist              *out_sg;
 181
 182         /* Buffers for copying for unaligned cases */
 183         struct scatterlist              in_sgl[2];
 184         struct scatterlist              out_sgl;
 185         struct scatterlist              *orig_out;
 186
 187         struct scatter_walk             in_walk;
 188         struct scatter_walk             out_walk;
 189         struct dma_chan         *dma_lch_in;
 190         struct dma_chan         *dma_lch_out;
 191         int                     in_sg_len;
 192         int                     out_sg_len;
 193         int                     pio_only;
 194         const struct omap_aes_pdata     *pdata;
 195 };
 196
 197 u32 omap_aes_read(struct omap_aes_dev *dd, u32 offset);
 198 void omap_aes_write(struct omap_aes_dev *dd, u32 offset, u32 value);
 199 struct omap_aes_dev *omap_aes_find_dev(struct omap_aes_reqctx *rctx);
 200 int omap_aes_gcm_setkey(struct crypto_aead *tfm, const u8 *key,
 201                         unsigned int keylen);
 202 int omap_aes_4106gcm_setkey(struct crypto_aead *tfm, const u8 *key,
 203                             unsigned int keylen);
 204 int omap_aes_gcm_encrypt(struct aead_request *req);
 205 int omap_aes_gcm_decrypt(struct aead_request *req);
 206 int omap_aes_4106gcm_encrypt(struct aead_request *req);
 207 int omap_aes_4106gcm_decrypt(struct aead_request *req);
 208 int omap_aes_write_ctrl(struct omap_aes_dev *dd);
 209 int omap_aes_crypt_dma_start(struct omap_aes_dev *dd);
 210 int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd);
 211 void omap_aes_gcm_dma_out_callback(void *data);
 212 void omap_aes_clear_copy_flags(struct omap_aes_dev *dd);
 213
 214 #endif