drivers/gpu/drm/nouveau/include/nvif/mmu.h

   1 #ifndef __NVIF_MMU_H__
   2 #define __NVIF_MMU_H__
   3 #include <nvif/object.h>
   4
   5 struct nvif_mmu {
   6         struct nvif_object object;
   7         u8  dmabits;
   8         u8  heap_nr;
   9         u8  type_nr;
  10         u16 kind_nr;
  11
  12         struct {
  13                 u64 size;
  14         } *heap;
  15
  16         struct {
  17 #define NVIF_MEM_VRAM                                                      0x01
  18 #define NVIF_MEM_HOST                                                      0x02
  19 #define NVIF_MEM_COMP                                                      0x04
  20 #define NVIF_MEM_DISP                                                      0x08
  21 #define NVIF_MEM_KIND                                                      0x10
  22 #define NVIF_MEM_MAPPABLE                                                  0x20
  23 #define NVIF_MEM_COHERENT                                                  0x40
  24 #define NVIF_MEM_UNCACHED                                                  0x80
  25                 u8 type;
  26                 u8 heap;
  27         } *type;
  28
  29         u8 *kind;
  30 };
  31
  32 int nvif_mmu_init(struct nvif_object *, s32 oclass, struct nvif_mmu *);
  33 void nvif_mmu_fini(struct nvif_mmu *);
  34
  35 static inline bool
  36 nvif_mmu_kind_valid(struct nvif_mmu *mmu, u8 kind)
  37 {
  38         const u8 invalid = mmu->kind_nr - 1;
  39         if (kind) {
  40                 if (kind >= mmu->kind_nr || mmu->kind[kind] == invalid)
  41                         return false;
  42         }
  43         return true;
  44 }
  45
  46 static inline int
  47 nvif_mmu_type(struct nvif_mmu *mmu, u8 mask)
  48 {
  49         int i;
  50         for (i = 0; i < mmu->type_nr; i++) {
  51                 if ((mmu->type[i].type & mask) == mask)
  52                         return i;
  53         }
  54         return -EINVAL;
  55 }
  56 #endif