Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / gpu / drm / nouveau / nvkm / engine / disp / dacnv50.c
blob85e692b122602956db896c85985a4cdf9fef16b3
1 /*
2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Ben Skeggs
24 #include "ior.h"
26 #include <subdev/timer.h>
28 static void
29 nv50_dac_clock(struct nvkm_ior *dac)
31 struct nvkm_device *device = dac->disp->engine.subdev.device;
32 const u32 doff = nv50_ior_base(dac);
33 nvkm_mask(device, 0x614280 + doff, 0x07070707, 0x00000000);
36 int
37 nv50_dac_sense(struct nvkm_ior *dac, u32 loadval)
39 struct nvkm_device *device = dac->disp->engine.subdev.device;
40 const u32 doff = nv50_ior_base(dac);
42 dac->func->power(dac, false, true, false, false, false);
44 nvkm_wr32(device, 0x61a00c + doff, 0x00100000 | loadval);
45 mdelay(9);
46 udelay(500);
47 loadval = nvkm_mask(device, 0x61a00c + doff, 0xffffffff, 0x00000000);
49 dac->func->power(dac, false, false, false, false, false);
50 if (!(loadval & 0x80000000))
51 return -ETIMEDOUT;
53 return (loadval & 0x38000000) >> 27;
56 static void
57 nv50_dac_power_wait(struct nvkm_device *device, const u32 doff)
59 nvkm_msec(device, 2000,
60 if (!(nvkm_rd32(device, 0x61a004 + doff) & 0x80000000))
61 break;
65 void
66 nv50_dac_power(struct nvkm_ior *dac, bool normal, bool pu,
67 bool data, bool vsync, bool hsync)
69 struct nvkm_device *device = dac->disp->engine.subdev.device;
70 const u32 doff = nv50_ior_base(dac);
71 const u32 shift = normal ? 0 : 16;
72 const u32 state = 0x80000000 | (0x00000040 * ! pu |
73 0x00000010 * ! data |
74 0x00000004 * ! vsync |
75 0x00000001 * ! hsync) << shift;
76 const u32 field = 0xc0000000 | (0x00000055 << shift);
78 nv50_dac_power_wait(device, doff);
79 nvkm_mask(device, 0x61a004 + doff, field, state);
80 nv50_dac_power_wait(device, doff);
83 static void
84 nv50_dac_state(struct nvkm_ior *dac, struct nvkm_ior_state *state)
86 struct nvkm_device *device = dac->disp->engine.subdev.device;
87 const u32 coff = dac->id * 8 + (state == &dac->arm) * 4;
88 u32 ctrl = nvkm_rd32(device, 0x610b58 + coff);
90 state->proto_evo = (ctrl & 0x00000f00) >> 8;
91 switch (state->proto_evo) {
92 case 0: state->proto = CRT; break;
93 default:
94 state->proto = UNKNOWN;
95 break;
98 state->head = ctrl & 0x00000003;
101 static const struct nvkm_ior_func
102 nv50_dac = {
103 .state = nv50_dac_state,
104 .power = nv50_dac_power,
105 .sense = nv50_dac_sense,
106 .clock = nv50_dac_clock,
110 nv50_dac_new(struct nvkm_disp *disp, int id)
112 struct nvkm_device *device = disp->engine.subdev.device;
113 if (!(nvkm_rd32(device, 0x610184) & (0x00100000 << id)))
114 return 0;
115 return nvkm_ior_new_(&nv50_dac, disp, DAC, id);