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1 /*
2 * Copyright 2013 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs <bskeggs@redhat.com>
23 */
25 #include "os.h"
27 #define GF100 0xc0
28 #define GF117 0xd7
29 #define GK100 0xe0
30 #define GK110 0xf0
31 #define GK208 0x108
32 #define GM107 0x117
34 #define NV_PGRAPH_TRAPPED_ADDR 0x400704
35 #define NV_PGRAPH_TRAPPED_DATA_LO 0x400708
36 #define NV_PGRAPH_TRAPPED_DATA_HI 0x40070c
38 #define NV_PGRAPH_FE_OBJECT_TABLE(n) ((n) * 4 + 0x400700)
40 #define NV_PGRAPH_FECS_INTR_ACK 0x409004
41 #define NV_PGRAPH_FECS_INTR 0x409008
42 #define NV_PGRAPH_FECS_INTR_FWMTHD 0x00000400
43 #define NV_PGRAPH_FECS_INTR_CHSW 0x00000100
44 #define NV_PGRAPH_FECS_INTR_FIFO 0x00000004
45 #define NV_PGRAPH_FECS_INTR_MODE 0x40900c
46 #define NV_PGRAPH_FECS_INTR_MODE_FIFO 0x00000004
47 #define NV_PGRAPH_FECS_INTR_MODE_FIFO_LEVEL 0x00000004
48 #define NV_PGRAPH_FECS_INTR_MODE_FIFO_EDGE 0x00000000
49 #define NV_PGRAPH_FECS_INTR_EN_SET 0x409010
50 #define NV_PGRAPH_FECS_INTR_EN_SET_FIFO 0x00000004
51 #define NV_PGRAPH_FECS_INTR_ROUTE 0x40901c
52 #define NV_PGRAPH_FECS_ACCESS 0x409048
53 #define NV_PGRAPH_FECS_ACCESS_FIFO 0x00000002
54 #define NV_PGRAPH_FECS_FIFO_DATA 0x409064
55 #define NV_PGRAPH_FECS_FIFO_CMD 0x409068
56 #define NV_PGRAPH_FECS_FIFO_ACK 0x409074
57 #define NV_PGRAPH_FECS_CAPS 0x409108
58 #define NV_PGRAPH_FECS_SIGNAL 0x409400
59 #define NV_PGRAPH_FECS_IROUTE 0x409404
60 #define NV_PGRAPH_FECS_BAR_MASK0 0x40940c
61 #define NV_PGRAPH_FECS_BAR_MASK1 0x409410
62 #define NV_PGRAPH_FECS_BAR 0x409414
63 #define NV_PGRAPH_FECS_BAR_SET 0x409418
64 #define NV_PGRAPH_FECS_RED_SWITCH 0x409614
65 #define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_ROP 0x00000400
66 #define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_GPC 0x00000200
67 #define NV_PGRAPH_FECS_RED_SWITCH_ENABLE_MAIN 0x00000100
68 #define NV_PGRAPH_FECS_RED_SWITCH_POWER_ROP 0x00000040
69 #define NV_PGRAPH_FECS_RED_SWITCH_POWER_GPC 0x00000020
70 #define NV_PGRAPH_FECS_RED_SWITCH_POWER_MAIN 0x00000010
71 #define NV_PGRAPH_FECS_RED_SWITCH_PAUSE_GPC 0x00000002
72 #define NV_PGRAPH_FECS_RED_SWITCH_PAUSE_MAIN 0x00000001
73 #define NV_PGRAPH_FECS_MMCTX_SAVE_SWBASE 0x409700
74 #define NV_PGRAPH_FECS_MMCTX_LOAD_SWBASE 0x409704
75 #define NV_PGRAPH_FECS_MMCTX_LOAD_COUNT 0x40974c
76 #define NV_PGRAPH_FECS_MMCTX_SAVE_SWBASE 0x409700
77 #define NV_PGRAPH_FECS_MMCTX_LOAD_SWBASE 0x409704
78 #define NV_PGRAPH_FECS_MMCTX_BASE 0x409710
79 #define NV_PGRAPH_FECS_MMCTX_CTRL 0x409714
80 #define NV_PGRAPH_FECS_MMCTX_MULTI_STRIDE 0x409718
81 #define NV_PGRAPH_FECS_MMCTX_MULTI_MASK 0x40971c
82 #define NV_PGRAPH_FECS_MMCTX_QUEUE 0x409720
83 #define NV_PGRAPH_FECS_MMIO_BASE 0x409724
84 #define NV_PGRAPH_FECS_MMIO_CTRL 0x409728
85 #define NV_PGRAPH_FECS_MMIO_CTRL_BASE_ENABLE 0x00000001
86 #define NV_PGRAPH_FECS_MMIO_RDVAL 0x40972c
87 #define NV_PGRAPH_FECS_MMIO_WRVAL 0x409730
88 #define NV_PGRAPH_FECS_MMCTX_LOAD_COUNT 0x40974c
89 #if CHIPSET < GK110
90 #define NV_PGRAPH_FECS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x409800)
91 #define NV_PGRAPH_FECS_CC_SCRATCH_SET(n) ((n) * 4 + 0x409820)
92 #define NV_PGRAPH_FECS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x409840)
93 #define NV_PGRAPH_FECS_UNK86C 0x40986c
94 #else
95 #define NV_PGRAPH_FECS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x409800)
96 #define NV_PGRAPH_FECS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x409840)
97 #define NV_PGRAPH_FECS_UNK86C 0x40988c
98 #define NV_PGRAPH_FECS_CC_SCRATCH_SET(n) ((n) * 4 + 0x4098c0)
99 #endif
100 #define NV_PGRAPH_FECS_STRANDS_CNT 0x409880
101 #define NV_PGRAPH_FECS_STRAND_SAVE_SWBASE 0x409908
102 #define NV_PGRAPH_FECS_STRAND_LOAD_SWBASE 0x40990c
103 #define NV_PGRAPH_FECS_STRAND_WORDS 0x409910
104 #define NV_PGRAPH_FECS_STRAND_DATA 0x409918
105 #define NV_PGRAPH_FECS_STRAND_SELECT 0x40991c
106 #define NV_PGRAPH_FECS_STRAND_CMD 0x409928
107 #define NV_PGRAPH_FECS_STRAND_CMD_SEEK 0x00000001
108 #define NV_PGRAPH_FECS_STRAND_CMD_GET_INFO 0x00000002
109 #define NV_PGRAPH_FECS_STRAND_CMD_SAVE 0x00000003
110 #define NV_PGRAPH_FECS_STRAND_CMD_LOAD 0x00000004
111 #define NV_PGRAPH_FECS_STRAND_CMD_ACTIVATE_FILTER 0x0000000a
112 #define NV_PGRAPH_FECS_STRAND_CMD_DEACTIVATE_FILTER 0x0000000b
113 #define NV_PGRAPH_FECS_STRAND_CMD_ENABLE 0x0000000c
114 #define NV_PGRAPH_FECS_STRAND_CMD_DISABLE 0x0000000d
115 #define NV_PGRAPH_FECS_STRAND_FILTER 0x40993c
116 #define NV_PGRAPH_FECS_MEM_BASE 0x409a04
117 #define NV_PGRAPH_FECS_MEM_CHAN 0x409a0c
118 #define NV_PGRAPH_FECS_MEM_CMD 0x409a10
119 #define NV_PGRAPH_FECS_MEM_CMD_LOAD_CHAN 0x00000007
120 #define NV_PGRAPH_FECS_MEM_TARGET 0x409a20
121 #define NV_PGRAPH_FECS_MEM_TARGET_UNK31 0x80000000
122 #define NV_PGRAPH_FECS_MEM_TARGET_AS 0x0000001f
123 #define NV_PGRAPH_FECS_MEM_TARGET_AS_VM 0x00000001
124 #define NV_PGRAPH_FECS_MEM_TARGET_AS_VRAM 0x00000002
125 #define NV_PGRAPH_FECS_CHAN_ADDR 0x409b00
126 #define NV_PGRAPH_FECS_CHAN_NEXT 0x409b04
127 #define NV_PGRAPH_FECS_CHSW 0x409b0c
128 #define NV_PGRAPH_FECS_CHSW_ACK 0x00000001
129 #define NV_PGRAPH_FECS_INTR_UP_SET 0x409c1c
130 #define NV_PGRAPH_FECS_INTR_UP_EN 0x409c24
132 #define NV_PGRAPH_GPCX_GPCCS_INTR_ACK 0x41a004
133 #define NV_PGRAPH_GPCX_GPCCS_INTR 0x41a008
134 #define NV_PGRAPH_GPCX_GPCCS_INTR_FIFO 0x00000004
135 #define NV_PGRAPH_GPCX_GPCCS_INTR_EN_SET 0x41a010
136 #define NV_PGRAPH_GPCX_GPCCS_INTR_EN_SET_FIFO 0x00000004
137 #define NV_PGRAPH_GPCX_GPCCS_INTR_ROUTE 0x41a01c
138 #define NV_PGRAPH_GPCX_GPCCS_ACCESS 0x41a048
139 #define NV_PGRAPH_GPCX_GPCCS_ACCESS_FIFO 0x00000002
140 #define NV_PGRAPH_GPCX_GPCCS_FIFO_DATA 0x41a064
141 #define NV_PGRAPH_GPCX_GPCCS_FIFO_CMD 0x41a068
142 #define NV_PGRAPH_GPCX_GPCCS_FIFO_ACK 0x41a074
143 #define NV_PGRAPH_GPCX_GPCCS_UNITS 0x41a608
144 #define NV_PGRAPH_GPCX_GPCCS_CAPS 0x41a108
145 #define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH 0x41a614
146 #define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_UNK11 0x00000800
147 #define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_ENABLE 0x00000200
148 #define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_POWER 0x00000020
149 #define NV_PGRAPH_GPCX_GPCCS_RED_SWITCH_PAUSE 0x00000002
150 #define NV_PGRAPH_GPCX_GPCCS_MYINDEX 0x41a618
151 #define NV_PGRAPH_GPCX_GPCCS_MMCTX_SAVE_SWBASE 0x41a700
152 #define NV_PGRAPH_GPCX_GPCCS_MMCTX_LOAD_SWBASE 0x41a704
153 #define NV_PGRAPH_GPCX_GPCCS_MMIO_BASE 0x41a724
154 #define NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL 0x41a728
155 #define NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL_BASE_ENABLE 0x00000001
156 #define NV_PGRAPH_GPCX_GPCCS_MMIO_RDVAL 0x41a72c
157 #define NV_PGRAPH_GPCX_GPCCS_MMIO_WRVAL 0x41a730
158 #define NV_PGRAPH_GPCX_GPCCS_MMCTX_LOAD_COUNT 0x41a74c
159 #if CHIPSET < GK110
160 #define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x41a800)
161 #define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(n) ((n) * 4 + 0x41a820)
162 #define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x41a840)
163 #define NV_PGRAPH_GPCX_GPCCS_UNK86C 0x41a86c
164 #else
165 #define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_VAL(n) ((n) * 4 + 0x41a800)
166 #define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_CLR(n) ((n) * 4 + 0x41a840)
167 #define NV_PGRAPH_GPCX_GPCCS_UNK86C 0x41a88c
168 #define NV_PGRAPH_GPCX_GPCCS_CC_SCRATCH_SET(n) ((n) * 4 + 0x41a8c0)
169 #endif
170 #define NV_PGRAPH_GPCX_GPCCS_STRAND_SELECT 0x41a91c
171 #define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD 0x41a928
172 #define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD_SAVE 0x00000003
173 #define NV_PGRAPH_GPCX_GPCCS_STRAND_CMD_LOAD 0x00000004
174 #define NV_PGRAPH_GPCX_GPCCS_MEM_BASE 0x41aa04
175 #define NV_PGRAPH_GPCX_GPCCS_TPC_STATUS 0x41acfc
177 #define NV_PGRAPH_GPC0_TPC0 0x504000
178 #define NV_PGRAPH_GPC0_TPC0__SIZE 0x000800
180 #define NV_PGRAPH_GPC0_TPCX_STRAND_INDEX 0x501d60
181 #define NV_PGRAPH_GPC0_TPCX_STRAND_INDEX_ALL 0x0000003f
182 #define NV_PGRAPH_GPC0_TPCX_STRAND_DATA 0x501d98
183 #define NV_PGRAPH_GPC0_TPCX_STRAND_SELECT 0x501d9c
184 #define NV_PGRAPH_GPC0_TPCX_STRAND_CMD 0x501da8
185 #define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_SEEK 0x00000001
186 #define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_GET_INFO 0x00000002
187 #define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_SAVE 0x00000003
188 #define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_LOAD 0x00000004
189 #define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_ENABLE 0x0000000c
190 #define NV_PGRAPH_GPC0_TPCX_STRAND_CMD_DISABLE 0x0000000d
191 #define NV_PGRAPH_GPC0_TPCX_STRAND_MEM_BASE 0x501dc4
193 #define NV_TPC_STRAND_INDEX 0x560
194 #define NV_TPC_STRAND_CNT 0x570
195 #define NV_TPC_STRAND_SAVE_SWBASE 0x588
196 #define NV_TPC_STRAND_LOAD_SWBASE 0x58c
197 #define NV_TPC_STRAND_WORDS 0x590
199 #define mmctx_data(r,c) .b32 (((c - 1) << 26) | r)
200 #define queue_init .skip 72 // (2 * 4) + ((8 * 4) * 2)
202 #define T_WAIT 0
203 #define T_MMCTX 1
204 #define T_STRWAIT 2
205 #define T_STRINIT 3
206 #define T_AUTO 4
207 #define T_CHAN 5
208 #define T_LOAD 6
209 #define T_SAVE 7
210 #define T_LCHAN 8
211 #define T_LCTXH 9
212 #define T_STRTPC 10
214 #if CHIPSET < GK208
215 #define imm32(reg,val) /*
216 */ movw reg ((val) & 0x0000ffff) /*
217 */ sethi reg ((val) & 0xffff0000)
218 #else
219 #define imm32(reg,val) /*
220 */ mov reg (val)
221 #endif
223 #define nv_mkio(rv,r,i) /*
224 */ imm32(rv, (((r) & 0xffc) << 6) | ((i) << 2))
226 #define hash #
227 #define fn(a) a
228 #if CHIPSET < GK208
229 #define call(a) call fn(hash)a
230 #else
231 #define call(a) lcall fn(hash)a
232 #endif
234 #define nv_iord(rv,r,i) /*
235 */ nv_mkio(rv,r,i) /*
236 */ iord rv I[rv]
238 #define nv_iowr(r,i,rv) /*
239 */ nv_mkio($r0,r,i) /*
240 */ iowr I[$r0] rv /*
241 */ clear b32 $r0
243 #define nv_rd32(reg,addr) /*
244 */ imm32($r14, addr) /*
245 */ call(nv_rd32) /*
246 */ mov b32 reg $r15
248 #define nv_wr32(addr,reg) /*
249 */ mov b32 $r15 reg /*
250 */ imm32($r14, addr) /*
251 */ call(nv_wr32)
253 #define trace_set(bit) /*
254 */ clear b32 $r9 /*
255 */ bset $r9 bit /*
256 */ nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_SET(7), 0, $r9)
258 #define trace_clr(bit) /*
259 */ clear b32 $r9 /*
260 */ bset $r9 bit /*
261 */ nv_iowr(NV_PGRAPH_FECS_CC_SCRATCH_CLR(7), 0, $r9)