drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110b.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs <bskeggs@redhat.com>
  23  */
  24 #include "gf100.h"
  25 #include "ctxgf100.h"
  26
  27 #include <nvif/class.h>
  28
  29 /*******************************************************************************
  30  * PGRAPH register lists
  31  ******************************************************************************/
  32
  33 static const struct gf100_gr_init
  34 gk110b_gr_init_l1c_0[] = {
  35         { 0x419c98,   1, 0x04, 0x00000000 },
  36         { 0x419ca8,   1, 0x04, 0x00000000 },
  37         { 0x419cb0,   1, 0x04, 0x09000000 },
  38         { 0x419cb4,   1, 0x04, 0x00000000 },
  39         { 0x419cb8,   1, 0x04, 0x00b08bea },
  40         { 0x419c84,   1, 0x04, 0x00010384 },
  41         { 0x419cbc,   1, 0x04, 0x281b3646 },
  42         { 0x419cc0,   2, 0x04, 0x00000000 },
  43         { 0x419c80,   1, 0x04, 0x00020230 },
  44         { 0x419ccc,   2, 0x04, 0x00000000 },
  45         {}
  46 };
  47
  48 static const struct gf100_gr_init
  49 gk110b_gr_init_sm_0[] = {
  50         { 0x419e00,   1, 0x04, 0x00000080 },
  51         { 0x419ea0,   1, 0x04, 0x00000000 },
  52         { 0x419ee4,   1, 0x04, 0x00000000 },
  53         { 0x419ea4,   1, 0x04, 0x00000100 },
  54         { 0x419ea8,   1, 0x04, 0x00000000 },
  55         { 0x419eb4,   1, 0x04, 0x00000000 },
  56         { 0x419ebc,   2, 0x04, 0x00000000 },
  57         { 0x419edc,   1, 0x04, 0x00000000 },
  58         { 0x419f00,   1, 0x04, 0x00000000 },
  59         { 0x419ed0,   1, 0x04, 0x00002616 },
  60         { 0x419f74,   1, 0x04, 0x00015555 },
  61         { 0x419f80,   4, 0x04, 0x00000000 },
  62         {}
  63 };
  64
  65 static const struct gf100_gr_pack
  66 gk110b_gr_pack_mmio[] = {
  67         { gk104_gr_init_main_0 },
  68         { gk110_gr_init_fe_0 },
  69         { gf100_gr_init_pri_0 },
  70         { gf100_gr_init_rstr2d_0 },
  71         { gf119_gr_init_pd_0 },
  72         { gk110_gr_init_ds_0 },
  73         { gf100_gr_init_scc_0 },
  74         { gk110_gr_init_sked_0 },
  75         { gk110_gr_init_cwd_0 },
  76         { gf119_gr_init_prop_0 },
  77         { gf108_gr_init_gpc_unk_0 },
  78         { gf100_gr_init_setup_0 },
  79         { gf100_gr_init_crstr_0 },
  80         { gf108_gr_init_setup_1 },
  81         { gf100_gr_init_zcull_0 },
  82         { gf119_gr_init_gpm_0 },
  83         { gk110_gr_init_gpc_unk_1 },
  84         { gf100_gr_init_gcc_0 },
  85         { gk104_gr_init_tpccs_0 },
  86         { gk110_gr_init_tex_0 },
  87         { gk104_gr_init_pe_0 },
  88         { gk110b_gr_init_l1c_0 },
  89         { gf100_gr_init_mpc_0 },
  90         { gk110b_gr_init_sm_0 },
  91         { gf117_gr_init_pes_0 },
  92         { gf117_gr_init_wwdx_0 },
  93         { gf117_gr_init_cbm_0 },
  94         { gk104_gr_init_be_0 },
  95         { gf100_gr_init_fe_1 },
  96         {}
  97 };
  98
  99 /*******************************************************************************
 100  * PGRAPH engine/subdev functions
 101  ******************************************************************************/
 102
 103 static const struct gf100_gr_func
 104 gk110b_gr = {
 105         .init = gk104_gr_init,
 106         .init_gpc_mmu = gf100_gr_init_gpc_mmu,
 107         .init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
 108         .init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
 109         .mmio = gk110b_gr_pack_mmio,
 110         .fecs.ucode = &gk110_gr_fecs_ucode,
 111         .gpccs.ucode = &gk110_gr_gpccs_ucode,
 112         .rops = gf100_gr_rops,
 113         .ppc_nr = 2,
 114         .grctx = &gk110b_grctx,
 115         .sclass = {
 116                 { -1, -1, FERMI_TWOD_A },
 117                 { -1, -1, KEPLER_INLINE_TO_MEMORY_B },
 118                 { -1, -1, KEPLER_B, &gf100_fermi },
 119                 { -1, -1, KEPLER_COMPUTE_B },
 120                 {}
 121         }
 122 };
 123
 124 int
 125 gk110b_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
 126 {
 127         return gf100_gr_new_(&gk110b_gr, device, index, pgr);
 128 }