2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #define nv44_mpeg(p) container_of((p), struct nv44_mpeg, engine)
27 #include <core/client.h>
28 #include <core/gpuobj.h>
29 #include <engine/fifo.h>
31 #include <nvif/class.h>
34 struct nvkm_engine engine
;
35 struct list_head chan
;
38 /*******************************************************************************
40 ******************************************************************************/
41 #define nv44_mpeg_chan(p) container_of((p), struct nv44_mpeg_chan, object)
43 struct nv44_mpeg_chan
{
44 struct nvkm_object object
;
45 struct nv44_mpeg
*mpeg
;
46 struct nvkm_fifo_chan
*fifo
;
47 struct list_head head
;
52 nv44_mpeg_chan_bind(struct nvkm_object
*object
, struct nvkm_gpuobj
*parent
,
53 int align
, struct nvkm_gpuobj
**pgpuobj
)
55 struct nv44_mpeg_chan
*chan
= nv44_mpeg_chan(object
);
56 int ret
= nvkm_gpuobj_new(chan
->object
.engine
->subdev
.device
, 264 * 4,
57 align
, true, parent
, pgpuobj
);
59 chan
->inst
= (*pgpuobj
)->addr
;
61 nvkm_wo32(*pgpuobj
, 0x78, 0x02001ec1);
68 nv44_mpeg_chan_fini(struct nvkm_object
*object
, bool suspend
)
71 struct nv44_mpeg_chan
*chan
= nv44_mpeg_chan(object
);
72 struct nv44_mpeg
*mpeg
= chan
->mpeg
;
73 struct nvkm_device
*device
= mpeg
->engine
.subdev
.device
;
74 u32 inst
= 0x80000000 | (chan
->inst
>> 4);
76 nvkm_mask(device
, 0x00b32c, 0x00000001, 0x00000000);
77 if (nvkm_rd32(device
, 0x00b318) == inst
)
78 nvkm_mask(device
, 0x00b318, 0x80000000, 0x00000000);
79 nvkm_mask(device
, 0x00b32c, 0x00000001, 0x00000001);
84 nv44_mpeg_chan_dtor(struct nvkm_object
*object
)
86 struct nv44_mpeg_chan
*chan
= nv44_mpeg_chan(object
);
87 struct nv44_mpeg
*mpeg
= chan
->mpeg
;
89 spin_lock_irqsave(&mpeg
->engine
.lock
, flags
);
90 list_del(&chan
->head
);
91 spin_unlock_irqrestore(&mpeg
->engine
.lock
, flags
);
95 static const struct nvkm_object_func
97 .dtor
= nv44_mpeg_chan_dtor
,
98 .fini
= nv44_mpeg_chan_fini
,
99 .bind
= nv44_mpeg_chan_bind
,
103 nv44_mpeg_chan_new(struct nvkm_fifo_chan
*fifoch
,
104 const struct nvkm_oclass
*oclass
,
105 struct nvkm_object
**pobject
)
107 struct nv44_mpeg
*mpeg
= nv44_mpeg(oclass
->engine
);
108 struct nv44_mpeg_chan
*chan
;
111 if (!(chan
= kzalloc(sizeof(*chan
), GFP_KERNEL
)))
113 nvkm_object_ctor(&nv44_mpeg_chan
, oclass
, &chan
->object
);
116 *pobject
= &chan
->object
;
118 spin_lock_irqsave(&mpeg
->engine
.lock
, flags
);
119 list_add(&chan
->head
, &mpeg
->chan
);
120 spin_unlock_irqrestore(&mpeg
->engine
.lock
, flags
);
124 /*******************************************************************************
125 * PMPEG engine/subdev functions
126 ******************************************************************************/
129 nv44_mpeg_mthd(struct nvkm_device
*device
, u32 mthd
, u32 data
)
135 return nv40_mpeg_mthd_dma(device
, mthd
, data
);
143 nv44_mpeg_intr(struct nvkm_engine
*engine
)
145 struct nv44_mpeg
*mpeg
= nv44_mpeg(engine
);
146 struct nvkm_subdev
*subdev
= &mpeg
->engine
.subdev
;
147 struct nvkm_device
*device
= subdev
->device
;
148 struct nv44_mpeg_chan
*temp
, *chan
= NULL
;
150 u32 inst
= nvkm_rd32(device
, 0x00b318) & 0x000fffff;
151 u32 stat
= nvkm_rd32(device
, 0x00b100);
152 u32 type
= nvkm_rd32(device
, 0x00b230);
153 u32 mthd
= nvkm_rd32(device
, 0x00b234);
154 u32 data
= nvkm_rd32(device
, 0x00b238);
157 spin_lock_irqsave(&mpeg
->engine
.lock
, flags
);
158 list_for_each_entry(temp
, &mpeg
->chan
, head
) {
159 if (temp
->inst
>> 4 == inst
) {
161 list_del(&chan
->head
);
162 list_add(&chan
->head
, &mpeg
->chan
);
167 if (stat
& 0x01000000) {
168 /* happens on initial binding of the object */
169 if (type
== 0x00000020 && mthd
== 0x0000) {
170 nvkm_mask(device
, 0x00b308, 0x00000000, 0x00000000);
174 if (type
== 0x00000010) {
175 if (nv44_mpeg_mthd(subdev
->device
, mthd
, data
))
180 nvkm_wr32(device
, 0x00b100, stat
);
181 nvkm_wr32(device
, 0x00b230, 0x00000001);
184 nvkm_error(subdev
, "ch %d [%08x %s] %08x %08x %08x %08x\n",
185 chan
? chan
->fifo
->chid
: -1, inst
<< 4,
186 chan
? chan
->object
.client
->name
: "unknown",
187 stat
, type
, mthd
, data
);
190 spin_unlock_irqrestore(&mpeg
->engine
.lock
, flags
);
193 static const struct nvkm_engine_func
195 .init
= nv31_mpeg_init
,
196 .intr
= nv44_mpeg_intr
,
197 .tile
= nv31_mpeg_tile
,
198 .fifo
.cclass
= nv44_mpeg_chan_new
,
200 { -1, -1, NV31_MPEG
, &nv31_mpeg_object
},
206 nv44_mpeg_new(struct nvkm_device
*device
, int index
, struct nvkm_engine
**pmpeg
)
208 struct nv44_mpeg
*mpeg
;
210 if (!(mpeg
= kzalloc(sizeof(*mpeg
), GFP_KERNEL
)))
212 INIT_LIST_HEAD(&mpeg
->chan
);
213 *pmpeg
= &mpeg
->engine
;
215 return nvkm_engine_ctor(&nv44_mpeg
, device
, index
, true, &mpeg
->engine
);