drivers/gpu/drm/radeon/radeon_drv.c

   1 /**
   2  * \file radeon_drv.c
   3  * ATI Radeon driver
   4  *
   5  * \author Gareth Hughes <gareth@valinux.com>
   6  */
   7
   8 /*
   9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  10  * All Rights Reserved.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a
  13  * copy of this software and associated documentation files (the "Software"),
  14  * to deal in the Software without restriction, including without limitation
  15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  16  * and/or sell copies of the Software, and to permit persons to whom the
  17  * Software is furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice (including the next
  20  * paragraph) shall be included in all copies or substantial portions of the
  21  * Software.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  29  * OTHER DEALINGS IN THE SOFTWARE.
  30  */
  31
  32 #include <drm/drmP.h>
  33 #include <drm/radeon_drm.h>
  34 #include "radeon_drv.h"
  35
  36 #include <drm/drm_pciids.h>
  37 #include <linux/console.h>
  38 #include <linux/module.h>
  39 #include <linux/pm_runtime.h>
  40 #include <linux/vga_switcheroo.h>
  41 #include <linux/compat.h>
  42 #include <drm/drm_gem.h>
  43 #include <drm/drm_fb_helper.h>
  44
  45 #include <drm/drm_crtc_helper.h>
  46
  47 /*
  48  * KMS wrapper.
  49  * - 2.0.0 - initial interface
  50  * - 2.1.0 - add square tiling interface
  51  * - 2.2.0 - add r6xx/r7xx const buffer support
  52  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  53  * - 2.4.0 - add crtc id query
  54  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  55  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  56  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  57  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  58  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  59  *   2.10.0 - fusion 2D tiling
  60  *   2.11.0 - backend map, initial compute support for the CS checker
  61  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
  62  *   2.13.0 - virtual memory support, streamout
  63  *   2.14.0 - add evergreen tiling informations
  64  *   2.15.0 - add max_pipes query
  65  *   2.16.0 - fix evergreen 2D tiled surface calculation
  66  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  67  *   2.18.0 - r600-eg: allow "invalid" DB formats
  68  *   2.19.0 - r600-eg: MSAA textures
  69  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  70  *   2.21.0 - r600-r700: FMASK and CMASK
  71  *   2.22.0 - r600 only: RESOLVE_BOX allowed
  72  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
  73  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
  74  *   2.25.0 - eg+: new info request for num SE and num SH
  75  *   2.26.0 - r600-eg: fix htile size computation
  76  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
  77  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
  78  *   2.29.0 - R500 FP16 color clear registers
  79  *   2.30.0 - fix for FMASK texturing
  80  *   2.31.0 - Add fastfb support for rs690
  81  *   2.32.0 - new info request for rings working
  82  *   2.33.0 - Add SI tiling mode array query
  83  *   2.34.0 - Add CIK tiling mode array query
  84  *   2.35.0 - Add CIK macrotile mode array query
  85  *   2.36.0 - Fix CIK DCE tiling setup
  86  *   2.37.0 - allow GS ring setup on r6xx/r7xx
  87  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
  88  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
  89  *   2.39.0 - Add INFO query for number of active CUs
  90  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
  91  *            CS to GPU on >= r600
  92  *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
  93  *   2.42.0 - Add VCE/VUI (Video Usability Information) support
  94  *   2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
  95  *   2.44.0 - SET_APPEND_CNT packet3 support
  96  *   2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI
  97  *   2.46.0 - Add PFP_SYNC_ME support on evergreen
  98  *   2.47.0 - Add UVD_NO_OP register support
  99  *   2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI
 100  *   2.49.0 - DRM_RADEON_GEM_INFO ioctl returns correct vram_size/visible values
 101  *   2.50.0 - Allows unaligned shader loads on CIK. (needed by OpenGL)
 102  */
 103 #define KMS_DRIVER_MAJOR        2
 104 #define KMS_DRIVER_MINOR        50
 105 #define KMS_DRIVER_PATCHLEVEL   0
 106 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 107 void radeon_driver_unload_kms(struct drm_device *dev);
 108 void radeon_driver_lastclose_kms(struct drm_device *dev);
 109 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
 110 void radeon_driver_postclose_kms(struct drm_device *dev,
 111                                  struct drm_file *file_priv);
 112 int radeon_suspend_kms(struct drm_device *dev, bool suspend,
 113                        bool fbcon, bool freeze);
 114 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
 115 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
 116 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
 117 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
 118 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
 119 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
 120 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
 121 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg);
 122 void radeon_gem_object_free(struct drm_gem_object *obj);
 123 int radeon_gem_object_open(struct drm_gem_object *obj,
 124                                 struct drm_file *file_priv);
 125 void radeon_gem_object_close(struct drm_gem_object *obj,
 126                                 struct drm_file *file_priv);
 127 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev,
 128                                         struct drm_gem_object *gobj,
 129                                         int flags);
 130 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
 131                                       unsigned int flags, int *vpos, int *hpos,
 132                                       ktime_t *stime, ktime_t *etime,
 133                                       const struct drm_display_mode *mode);
 134 extern bool radeon_is_px(struct drm_device *dev);
 135 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
 136 extern int radeon_max_kms_ioctl;
 137 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
 138 int radeon_mode_dumb_mmap(struct drm_file *filp,
 139                           struct drm_device *dev,
 140                           uint32_t handle, uint64_t *offset_p);
 141 int radeon_mode_dumb_create(struct drm_file *file_priv,
 142                             struct drm_device *dev,
 143                             struct drm_mode_create_dumb *args);
 144 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
 145 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
 146                                                         struct dma_buf_attachment *,
 147                                                         struct sg_table *sg);
 148 int radeon_gem_prime_pin(struct drm_gem_object *obj);
 149 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
 150 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *);
 151 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
 152 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 153
 154 /* atpx handler */
 155 #if defined(CONFIG_VGA_SWITCHEROO)
 156 void radeon_register_atpx_handler(void);
 157 void radeon_unregister_atpx_handler(void);
 158 bool radeon_has_atpx_dgpu_power_cntl(void);
 159 bool radeon_is_atpx_hybrid(void);
 160 #else
 161 static inline void radeon_register_atpx_handler(void) {}
 162 static inline void radeon_unregister_atpx_handler(void) {}
 163 static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; }
 164 static inline bool radeon_is_atpx_hybrid(void) { return false; }
 165 #endif
 166
 167 int radeon_no_wb;
 168 int radeon_modeset = -1;
 169 int radeon_dynclks = -1;
 170 int radeon_r4xx_atom = 0;
 171 int radeon_agpmode = 0;
 172 int radeon_vram_limit = 0;
 173 int radeon_gart_size = -1; /* auto */
 174 int radeon_benchmarking = 0;
 175 int radeon_testing = 0;
 176 int radeon_connector_table = 0;
 177 int radeon_tv = 1;
 178 int radeon_audio = -1;
 179 int radeon_disp_priority = 0;
 180 int radeon_hw_i2c = 0;
 181 int radeon_pcie_gen2 = -1;
 182 int radeon_msi = -1;
 183 int radeon_lockup_timeout = 10000;
 184 int radeon_fastfb = 0;
 185 int radeon_dpm = -1;
 186 int radeon_aspm = -1;
 187 int radeon_runtime_pm = -1;
 188 int radeon_hard_reset = 0;
 189 int radeon_vm_size = 8;
 190 int radeon_vm_block_size = -1;
 191 int radeon_deep_color = 0;
 192 int radeon_use_pflipirq = 2;
 193 int radeon_bapm = -1;
 194 int radeon_backlight = -1;
 195 int radeon_auxch = -1;
 196 int radeon_mst = 0;
 197 int radeon_uvd = 1;
 198 int radeon_vce = 1;
 199
 200 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 201 module_param_named(no_wb, radeon_no_wb, int, 0444);
 202
 203 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
 204 module_param_named(modeset, radeon_modeset, int, 0400);
 205
 206 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
 207 module_param_named(dynclks, radeon_dynclks, int, 0444);
 208
 209 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
 210 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
 211
 212 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 213 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
 214
 215 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
 216 module_param_named(agpmode, radeon_agpmode, int, 0444);
 217
 218 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
 219 module_param_named(gartsize, radeon_gart_size, int, 0600);
 220
 221 MODULE_PARM_DESC(benchmark, "Run benchmark");
 222 module_param_named(benchmark, radeon_benchmarking, int, 0444);
 223
 224 MODULE_PARM_DESC(test, "Run tests");
 225 module_param_named(test, radeon_testing, int, 0444);
 226
 227 MODULE_PARM_DESC(connector_table, "Force connector table");
 228 module_param_named(connector_table, radeon_connector_table, int, 0444);
 229
 230 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
 231 module_param_named(tv, radeon_tv, int, 0444);
 232
 233 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
 234 module_param_named(audio, radeon_audio, int, 0444);
 235
 236 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
 237 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
 238
 239 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
 240 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
 241
 242 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
 243 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
 244
 245 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
 246 module_param_named(msi, radeon_msi, int, 0444);
 247
 248 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)");
 249 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
 250
 251 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
 252 module_param_named(fastfb, radeon_fastfb, int, 0444);
 253
 254 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
 255 module_param_named(dpm, radeon_dpm, int, 0444);
 256
 257 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
 258 module_param_named(aspm, radeon_aspm, int, 0444);
 259
 260 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
 261 module_param_named(runpm, radeon_runtime_pm, int, 0444);
 262
 263 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
 264 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
 265
 266 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
 267 module_param_named(vm_size, radeon_vm_size, int, 0444);
 268
 269 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
 270 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
 271
 272 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
 273 module_param_named(deep_color, radeon_deep_color, int, 0444);
 274
 275 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
 276 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
 277
 278 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
 279 module_param_named(bapm, radeon_bapm, int, 0444);
 280
 281 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
 282 module_param_named(backlight, radeon_backlight, int, 0444);
 283
 284 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
 285 module_param_named(auxch, radeon_auxch, int, 0444);
 286
 287 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
 288 module_param_named(mst, radeon_mst, int, 0444);
 289
 290 MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
 291 module_param_named(uvd, radeon_uvd, int, 0444);
 292
 293 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
 294 module_param_named(vce, radeon_vce, int, 0444);
 295
 296 int radeon_si_support = 1;
 297 MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)");
 298 module_param_named(si_support, radeon_si_support, int, 0444);
 299
 300 int radeon_cik_support = 1;
 301 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)");
 302 module_param_named(cik_support, radeon_cik_support, int, 0444);
 303
 304 static struct pci_device_id pciidlist[] = {
 305         radeon_PCI_IDS
 306 };
 307
 308 MODULE_DEVICE_TABLE(pci, pciidlist);
 309
 310 static struct drm_driver kms_driver;
 311
 312 bool radeon_device_is_virtual(void);
 313
 314 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
 315 {
 316         struct apertures_struct *ap;
 317         bool primary = false;
 318
 319         ap = alloc_apertures(1);
 320         if (!ap)
 321                 return -ENOMEM;
 322
 323         ap->ranges[0].base = pci_resource_start(pdev, 0);
 324         ap->ranges[0].size = pci_resource_len(pdev, 0);
 325
 326 #ifdef CONFIG_X86
 327         primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
 328 #endif
 329         drm_fb_helper_remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
 330         kfree(ap);
 331
 332         return 0;
 333 }
 334
 335 static int radeon_pci_probe(struct pci_dev *pdev,
 336                             const struct pci_device_id *ent)
 337 {
 338         int ret;
 339
 340         if (vga_switcheroo_client_probe_defer(pdev))
 341                 return -EPROBE_DEFER;
 342
 343         /* Get rid of things like offb */
 344         ret = radeon_kick_out_firmware_fb(pdev);
 345         if (ret)
 346                 return ret;
 347
 348         return drm_get_pci_dev(pdev, ent, &kms_driver);
 349 }
 350
 351 static void
 352 radeon_pci_remove(struct pci_dev *pdev)
 353 {
 354         struct drm_device *dev = pci_get_drvdata(pdev);
 355
 356         drm_put_dev(dev);
 357 }
 358
 359 static void
 360 radeon_pci_shutdown(struct pci_dev *pdev)
 361 {
 362         /* if we are running in a VM, make sure the device
 363          * torn down properly on reboot/shutdown
 364          */
 365         if (radeon_device_is_virtual())
 366                 radeon_pci_remove(pdev);
 367 }
 368
 369 static int radeon_pmops_suspend(struct device *dev)
 370 {
 371         struct pci_dev *pdev = to_pci_dev(dev);
 372         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 373         return radeon_suspend_kms(drm_dev, true, true, false);
 374 }
 375
 376 static int radeon_pmops_resume(struct device *dev)
 377 {
 378         struct pci_dev *pdev = to_pci_dev(dev);
 379         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 380
 381         /* GPU comes up enabled by the bios on resume */
 382         if (radeon_is_px(drm_dev)) {
 383                 pm_runtime_disable(dev);
 384                 pm_runtime_set_active(dev);
 385                 pm_runtime_enable(dev);
 386         }
 387
 388         return radeon_resume_kms(drm_dev, true, true);
 389 }
 390
 391 static int radeon_pmops_freeze(struct device *dev)
 392 {
 393         struct pci_dev *pdev = to_pci_dev(dev);
 394         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 395         return radeon_suspend_kms(drm_dev, false, true, true);
 396 }
 397
 398 static int radeon_pmops_thaw(struct device *dev)
 399 {
 400         struct pci_dev *pdev = to_pci_dev(dev);
 401         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 402         return radeon_resume_kms(drm_dev, false, true);
 403 }
 404
 405 static int radeon_pmops_runtime_suspend(struct device *dev)
 406 {
 407         struct pci_dev *pdev = to_pci_dev(dev);
 408         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 409         int ret;
 410
 411         if (!radeon_is_px(drm_dev)) {
 412                 pm_runtime_forbid(dev);
 413                 return -EBUSY;
 414         }
 415
 416         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 417         drm_kms_helper_poll_disable(drm_dev);
 418         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
 419
 420         ret = radeon_suspend_kms(drm_dev, false, false, false);
 421         pci_save_state(pdev);
 422         pci_disable_device(pdev);
 423         pci_ignore_hotplug(pdev);
 424         if (radeon_is_atpx_hybrid())
 425                 pci_set_power_state(pdev, PCI_D3cold);
 426         else if (!radeon_has_atpx_dgpu_power_cntl())
 427                 pci_set_power_state(pdev, PCI_D3hot);
 428         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
 429
 430         return 0;
 431 }
 432
 433 static int radeon_pmops_runtime_resume(struct device *dev)
 434 {
 435         struct pci_dev *pdev = to_pci_dev(dev);
 436         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 437         int ret;
 438
 439         if (!radeon_is_px(drm_dev))
 440                 return -EINVAL;
 441
 442         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 443
 444         if (radeon_is_atpx_hybrid() ||
 445             !radeon_has_atpx_dgpu_power_cntl())
 446                 pci_set_power_state(pdev, PCI_D0);
 447         pci_restore_state(pdev);
 448         ret = pci_enable_device(pdev);
 449         if (ret)
 450                 return ret;
 451         pci_set_master(pdev);
 452
 453         ret = radeon_resume_kms(drm_dev, false, false);
 454         drm_kms_helper_poll_enable(drm_dev);
 455         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
 456         drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
 457         return 0;
 458 }
 459
 460 static int radeon_pmops_runtime_idle(struct device *dev)
 461 {
 462         struct pci_dev *pdev = to_pci_dev(dev);
 463         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 464         struct drm_crtc *crtc;
 465
 466         if (!radeon_is_px(drm_dev)) {
 467                 pm_runtime_forbid(dev);
 468                 return -EBUSY;
 469         }
 470
 471         list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
 472                 if (crtc->enabled) {
 473                         DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
 474                         return -EBUSY;
 475                 }
 476         }
 477
 478         pm_runtime_mark_last_busy(dev);
 479         pm_runtime_autosuspend(dev);
 480         /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
 481         return 1;
 482 }
 483
 484 long radeon_drm_ioctl(struct file *filp,
 485                       unsigned int cmd, unsigned long arg)
 486 {
 487         struct drm_file *file_priv = filp->private_data;
 488         struct drm_device *dev;
 489         long ret;
 490         dev = file_priv->minor->dev;
 491         ret = pm_runtime_get_sync(dev->dev);
 492         if (ret < 0)
 493                 return ret;
 494
 495         ret = drm_ioctl(filp, cmd, arg);
 496
 497         pm_runtime_mark_last_busy(dev->dev);
 498         pm_runtime_put_autosuspend(dev->dev);
 499         return ret;
 500 }
 501
 502 #ifdef CONFIG_COMPAT
 503 static long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
 504 {
 505         unsigned int nr = DRM_IOCTL_NR(cmd);
 506         int ret;
 507
 508         if (nr < DRM_COMMAND_BASE)
 509                 return drm_compat_ioctl(filp, cmd, arg);
 510
 511         ret = radeon_drm_ioctl(filp, cmd, arg);
 512
 513         return ret;
 514 }
 515 #endif
 516
 517 static const struct dev_pm_ops radeon_pm_ops = {
 518         .suspend = radeon_pmops_suspend,
 519         .resume = radeon_pmops_resume,
 520         .freeze = radeon_pmops_freeze,
 521         .thaw = radeon_pmops_thaw,
 522         .poweroff = radeon_pmops_freeze,
 523         .restore = radeon_pmops_resume,
 524         .runtime_suspend = radeon_pmops_runtime_suspend,
 525         .runtime_resume = radeon_pmops_runtime_resume,
 526         .runtime_idle = radeon_pmops_runtime_idle,
 527 };
 528
 529 static const struct file_operations radeon_driver_kms_fops = {
 530         .owner = THIS_MODULE,
 531         .open = drm_open,
 532         .release = drm_release,
 533         .unlocked_ioctl = radeon_drm_ioctl,
 534         .mmap = radeon_mmap,
 535         .poll = drm_poll,
 536         .read = drm_read,
 537 #ifdef CONFIG_COMPAT
 538         .compat_ioctl = radeon_kms_compat_ioctl,
 539 #endif
 540 };
 541
 542 static bool
 543 radeon_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe,
 544                                  bool in_vblank_irq, int *vpos, int *hpos,
 545                                  ktime_t *stime, ktime_t *etime,
 546                                  const struct drm_display_mode *mode)
 547 {
 548         return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos,
 549                                           stime, etime, mode);
 550 }
 551
 552 static struct drm_driver kms_driver = {
 553         .driver_features =
 554             DRIVER_USE_AGP |
 555             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
 556             DRIVER_PRIME | DRIVER_RENDER,
 557         .load = radeon_driver_load_kms,
 558         .open = radeon_driver_open_kms,
 559         .postclose = radeon_driver_postclose_kms,
 560         .lastclose = radeon_driver_lastclose_kms,
 561         .unload = radeon_driver_unload_kms,
 562         .get_vblank_counter = radeon_get_vblank_counter_kms,
 563         .enable_vblank = radeon_enable_vblank_kms,
 564         .disable_vblank = radeon_disable_vblank_kms,
 565         .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos,
 566         .get_scanout_position = radeon_get_crtc_scanout_position,
 567         .irq_preinstall = radeon_driver_irq_preinstall_kms,
 568         .irq_postinstall = radeon_driver_irq_postinstall_kms,
 569         .irq_uninstall = radeon_driver_irq_uninstall_kms,
 570         .irq_handler = radeon_driver_irq_handler_kms,
 571         .ioctls = radeon_ioctls_kms,
 572         .gem_free_object_unlocked = radeon_gem_object_free,
 573         .gem_open_object = radeon_gem_object_open,
 574         .gem_close_object = radeon_gem_object_close,
 575         .dumb_create = radeon_mode_dumb_create,
 576         .dumb_map_offset = radeon_mode_dumb_mmap,
 577         .fops = &radeon_driver_kms_fops,
 578
 579         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 580         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 581         .gem_prime_export = radeon_gem_prime_export,
 582         .gem_prime_import = drm_gem_prime_import,
 583         .gem_prime_pin = radeon_gem_prime_pin,
 584         .gem_prime_unpin = radeon_gem_prime_unpin,
 585         .gem_prime_res_obj = radeon_gem_prime_res_obj,
 586         .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
 587         .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
 588         .gem_prime_vmap = radeon_gem_prime_vmap,
 589         .gem_prime_vunmap = radeon_gem_prime_vunmap,
 590
 591         .name = DRIVER_NAME,
 592         .desc = DRIVER_DESC,
 593         .date = DRIVER_DATE,
 594         .major = KMS_DRIVER_MAJOR,
 595         .minor = KMS_DRIVER_MINOR,
 596         .patchlevel = KMS_DRIVER_PATCHLEVEL,
 597 };
 598
 599 static struct drm_driver *driver;
 600 static struct pci_driver *pdriver;
 601
 602 static struct pci_driver radeon_kms_pci_driver = {
 603         .name = DRIVER_NAME,
 604         .id_table = pciidlist,
 605         .probe = radeon_pci_probe,
 606         .remove = radeon_pci_remove,
 607         .shutdown = radeon_pci_shutdown,
 608         .driver.pm = &radeon_pm_ops,
 609 };
 610
 611 static int __init radeon_init(void)
 612 {
 613         if (vgacon_text_force() && radeon_modeset == -1) {
 614                 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
 615                 radeon_modeset = 0;
 616         }
 617         /* set to modesetting by default if not nomodeset */
 618         if (radeon_modeset == -1)
 619                 radeon_modeset = 1;
 620
 621         if (radeon_modeset == 1) {
 622                 DRM_INFO("radeon kernel modesetting enabled.\n");
 623                 driver = &kms_driver;
 624                 pdriver = &radeon_kms_pci_driver;
 625                 driver->driver_features |= DRIVER_MODESET;
 626                 driver->num_ioctls = radeon_max_kms_ioctl;
 627                 radeon_register_atpx_handler();
 628
 629         } else {
 630                 DRM_ERROR("No UMS support in radeon module!\n");
 631                 return -EINVAL;
 632         }
 633
 634         return pci_register_driver(pdriver);
 635 }
 636
 637 static void __exit radeon_exit(void)
 638 {
 639         pci_unregister_driver(pdriver);
 640         radeon_unregister_atpx_handler();
 641 }
 642
 643 module_init(radeon_init);
 644 module_exit(radeon_exit);
 645
 646 MODULE_AUTHOR(DRIVER_AUTHOR);
 647 MODULE_DESCRIPTION(DRIVER_DESC);
 648 MODULE_LICENSE("GPL and additional rights");