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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / gpu / drm / tegra / drm.c
blobd50bddb2e4474e456b8105d6b90b47488ff21263
1 /*
2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/bitops.h>
11 #include <linux/host1x.h>
12 #include <linux/idr.h>
13 #include <linux/iommu.h>
14
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
17
18 #include "drm.h"
19 #include "gem.h"
20
21 #define DRIVER_NAME "tegra"
22 #define DRIVER_DESC "NVIDIA Tegra graphics"
23 #define DRIVER_DATE "20120330"
24 #define DRIVER_MAJOR 0
25 #define DRIVER_MINOR 0
26 #define DRIVER_PATCHLEVEL 0
27
28 #define CARVEOUT_SZ SZ_64M
29 #define CDMA_GATHER_FETCHES_MAX_NB 16383
30
31 struct tegra_drm_file {
32 struct idr contexts;
33 struct mutex lock;
34 };
35
36 static int tegra_atomic_check(struct drm_device *drm,
37 struct drm_atomic_state *state)
38 {
39 int err;
40
41 err = drm_atomic_helper_check_modeset(drm, state);
42 if (err < 0)
43 return err;
44
45 err = drm_atomic_normalize_zpos(drm, state);
46 if (err < 0)
47 return err;
48
49 err = drm_atomic_helper_check_planes(drm, state);
50 if (err < 0)
51 return err;
52
53 if (state->legacy_cursor_update)
54 state->async_update = !drm_atomic_helper_async_check(drm, state);
55
56 return 0;
57 }
58
59 static struct drm_atomic_state *
60 tegra_atomic_state_alloc(struct drm_device *drm)
61 {
62 struct tegra_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
63
64 if (!state || drm_atomic_state_init(drm, &state->base) < 0) {
65 kfree(state);
66 return NULL;
67 }
68
69 return &state->base;
70 }
71
72 static void tegra_atomic_state_clear(struct drm_atomic_state *state)
73 {
74 struct tegra_atomic_state *tegra = to_tegra_atomic_state(state);
75
76 drm_atomic_state_default_clear(state);
77 tegra->clk_disp = NULL;
78 tegra->dc = NULL;
79 tegra->rate = 0;
80 }
81
82 static void tegra_atomic_state_free(struct drm_atomic_state *state)
83 {
84 drm_atomic_state_default_release(state);
85 kfree(state);
86 }
87
88 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
89 .fb_create = tegra_fb_create,
90 #ifdef CONFIG_DRM_FBDEV_EMULATION
91 .output_poll_changed = drm_fb_helper_output_poll_changed,
92 #endif
93 .atomic_check = tegra_atomic_check,
94 .atomic_commit = drm_atomic_helper_commit,
95 .atomic_state_alloc = tegra_atomic_state_alloc,
96 .atomic_state_clear = tegra_atomic_state_clear,
97 .atomic_state_free = tegra_atomic_state_free,
98 };
99
100 static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
101 {
102 struct drm_device *drm = old_state->dev;
103 struct tegra_drm *tegra = drm->dev_private;
104
105 if (tegra->hub) {
106 drm_atomic_helper_commit_modeset_disables(drm, old_state);
107 tegra_display_hub_atomic_commit(drm, old_state);
108 drm_atomic_helper_commit_planes(drm, old_state, 0);
109 drm_atomic_helper_commit_modeset_enables(drm, old_state);
110 drm_atomic_helper_commit_hw_done(old_state);
111 drm_atomic_helper_wait_for_vblanks(drm, old_state);
112 drm_atomic_helper_cleanup_planes(drm, old_state);
113 } else {
114 drm_atomic_helper_commit_tail_rpm(old_state);
115 }
116 }
117
118 static const struct drm_mode_config_helper_funcs
119 tegra_drm_mode_config_helpers = {
120 .atomic_commit_tail = tegra_atomic_commit_tail,
121 };
122
123 static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
124 {
125 struct host1x_device *device = to_host1x_device(drm->dev);
126 struct tegra_drm *tegra;
127 int err;
128
129 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
130 if (!tegra)
131 return -ENOMEM;
132
133 if (iommu_present(&platform_bus_type)) {
134 u64 carveout_start, carveout_end, gem_start, gem_end;
135 struct iommu_domain_geometry *geometry;
136 unsigned long order;
137
138 tegra->domain = iommu_domain_alloc(&platform_bus_type);
139 if (!tegra->domain) {
140 err = -ENOMEM;
141 goto free;
142 }
143
144 geometry = &tegra->domain->geometry;
145 gem_start = geometry->aperture_start;
146 gem_end = geometry->aperture_end - CARVEOUT_SZ;
147 carveout_start = gem_end + 1;
148 carveout_end = geometry->aperture_end;
149
150 order = __ffs(tegra->domain->pgsize_bitmap);
151 init_iova_domain(&tegra->carveout.domain, 1UL << order,
152 carveout_start >> order);
153
154 tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
155 tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
156
157 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
158 mutex_init(&tegra->mm_lock);
159
160 DRM_DEBUG("IOMMU apertures:\n");
161 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
162 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
163 carveout_end);
164 }
165
166 mutex_init(&tegra->clients_lock);
167 INIT_LIST_HEAD(&tegra->clients);
168
169 drm->dev_private = tegra;
170 tegra->drm = drm;
171
172 drm_mode_config_init(drm);
173
174 drm->mode_config.min_width = 0;
175 drm->mode_config.min_height = 0;
176
177 drm->mode_config.max_width = 4096;
178 drm->mode_config.max_height = 4096;
179
180 drm->mode_config.allow_fb_modifiers = true;
181
182 drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
183 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
184
185 err = tegra_drm_fb_prepare(drm);
186 if (err < 0)
187 goto config;
188
189 drm_kms_helper_poll_init(drm);
190
191 err = host1x_device_init(device);
192 if (err < 0)
193 goto fbdev;
194
195 if (tegra->hub) {
196 err = tegra_display_hub_prepare(tegra->hub);
197 if (err < 0)
198 goto device;
199 }
200
201 /*
202 * We don't use the drm_irq_install() helpers provided by the DRM
203 * core, so we need to set this manually in order to allow the
204 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
205 */
206 drm->irq_enabled = true;
207
208 /* syncpoints are used for full 32-bit hardware VBLANK counters */
209 drm->max_vblank_count = 0xffffffff;
210
211 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
212 if (err < 0)
213 goto hub;
214
215 drm_mode_config_reset(drm);
216
217 err = tegra_drm_fb_init(drm);
218 if (err < 0)
219 goto hub;
220
221 return 0;
222
223 hub:
224 if (tegra->hub)
225 tegra_display_hub_cleanup(tegra->hub);
226 device:
227 host1x_device_exit(device);
228 fbdev:
229 drm_kms_helper_poll_fini(drm);
230 tegra_drm_fb_free(drm);
231 config:
232 drm_mode_config_cleanup(drm);
233
234 if (tegra->domain) {
235 iommu_domain_free(tegra->domain);
236 drm_mm_takedown(&tegra->mm);
237 mutex_destroy(&tegra->mm_lock);
238 put_iova_domain(&tegra->carveout.domain);
239 }
240 free:
241 kfree(tegra);
242 return err;
243 }
244
245 static void tegra_drm_unload(struct drm_device *drm)
246 {
247 struct host1x_device *device = to_host1x_device(drm->dev);
248 struct tegra_drm *tegra = drm->dev_private;
249 int err;
250
251 drm_kms_helper_poll_fini(drm);
252 tegra_drm_fb_exit(drm);
253 drm_mode_config_cleanup(drm);
254
255 err = host1x_device_exit(device);
256 if (err < 0)
257 return;
258
259 if (tegra->domain) {
260 iommu_domain_free(tegra->domain);
261 drm_mm_takedown(&tegra->mm);
262 mutex_destroy(&tegra->mm_lock);
263 put_iova_domain(&tegra->carveout.domain);
264 }
265
266 kfree(tegra);
267 }
268
269 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
270 {
271 struct tegra_drm_file *fpriv;
272
273 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
274 if (!fpriv)
275 return -ENOMEM;
276
277 idr_init(&fpriv->contexts);
278 mutex_init(&fpriv->lock);
279 filp->driver_priv = fpriv;
280
281 return 0;
282 }
283
284 static void tegra_drm_context_free(struct tegra_drm_context *context)
285 {
286 context->client->ops->close_channel(context);
287 kfree(context);
288 }
289
290 static struct host1x_bo *
291 host1x_bo_lookup(struct drm_file *file, u32 handle)
292 {
293 struct drm_gem_object *gem;
294 struct tegra_bo *bo;
295
296 gem = drm_gem_object_lookup(file, handle);
297 if (!gem)
298 return NULL;
299
300 bo = to_tegra_bo(gem);
301 return &bo->base;
302 }
303
304 static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
305 struct drm_tegra_reloc __user *src,
306 struct drm_device *drm,
307 struct drm_file *file)
308 {
309 u32 cmdbuf, target;
310 int err;
311
312 err = get_user(cmdbuf, &src->cmdbuf.handle);
313 if (err < 0)
314 return err;
315
316 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
317 if (err < 0)
318 return err;
319
320 err = get_user(target, &src->target.handle);
321 if (err < 0)
322 return err;
323
324 err = get_user(dest->target.offset, &src->target.offset);
325 if (err < 0)
326 return err;
327
328 err = get_user(dest->shift, &src->shift);
329 if (err < 0)
330 return err;
331
332 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
333 if (!dest->cmdbuf.bo)
334 return -ENOENT;
335
336 dest->target.bo = host1x_bo_lookup(file, target);
337 if (!dest->target.bo)
338 return -ENOENT;
339
340 return 0;
341 }
342
343 static int host1x_waitchk_copy_from_user(struct host1x_waitchk *dest,
344 struct drm_tegra_waitchk __user *src,
345 struct drm_file *file)
346 {
347 u32 cmdbuf;
348 int err;
349
350 err = get_user(cmdbuf, &src->handle);
351 if (err < 0)
352 return err;
353
354 err = get_user(dest->offset, &src->offset);
355 if (err < 0)
356 return err;
357
358 err = get_user(dest->syncpt_id, &src->syncpt);
359 if (err < 0)
360 return err;
361
362 err = get_user(dest->thresh, &src->thresh);
363 if (err < 0)
364 return err;
365
366 dest->bo = host1x_bo_lookup(file, cmdbuf);
367 if (!dest->bo)
368 return -ENOENT;
369
370 return 0;
371 }
372
373 int tegra_drm_submit(struct tegra_drm_context *context,
374 struct drm_tegra_submit *args, struct drm_device *drm,
375 struct drm_file *file)
376 {
377 unsigned int num_cmdbufs = args->num_cmdbufs;
378 unsigned int num_relocs = args->num_relocs;
379 unsigned int num_waitchks = args->num_waitchks;
380 struct drm_tegra_cmdbuf __user *user_cmdbufs;
381 struct drm_tegra_reloc __user *user_relocs;
382 struct drm_tegra_waitchk __user *user_waitchks;
383 struct drm_tegra_syncpt __user *user_syncpt;
384 struct drm_tegra_syncpt syncpt;
385 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
386 struct drm_gem_object **refs;
387 struct host1x_syncpt *sp;
388 struct host1x_job *job;
389 unsigned int num_refs;
390 int err;
391
392 user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
393 user_relocs = u64_to_user_ptr(args->relocs);
394 user_waitchks = u64_to_user_ptr(args->waitchks);
395 user_syncpt = u64_to_user_ptr(args->syncpts);
396
397 /* We don't yet support other than one syncpt_incr struct per submit */
398 if (args->num_syncpts != 1)
399 return -EINVAL;
400
401 /* We don't yet support waitchks */
402 if (args->num_waitchks != 0)
403 return -EINVAL;
404
405 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
406 args->num_relocs, args->num_waitchks);
407 if (!job)
408 return -ENOMEM;
409
410 job->num_relocs = args->num_relocs;
411 job->num_waitchk = args->num_waitchks;
412 job->client = (u32)args->context;
413 job->class = context->client->base.class;
414 job->serialize = true;
415
416 /*
417 * Track referenced BOs so that they can be unreferenced after the
418 * submission is complete.
419 */
420 num_refs = num_cmdbufs + num_relocs * 2 + num_waitchks;
421
422 refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
423 if (!refs) {
424 err = -ENOMEM;
425 goto put;
426 }
427
428 /* reuse as an iterator later */
429 num_refs = 0;
430
431 while (num_cmdbufs) {
432 struct drm_tegra_cmdbuf cmdbuf;
433 struct host1x_bo *bo;
434 struct tegra_bo *obj;
435 u64 offset;
436
437 if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
438 err = -EFAULT;
439 goto fail;
440 }
441
442 /*
443 * The maximum number of CDMA gather fetches is 16383, a higher
444 * value means the words count is malformed.
445 */
446 if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
447 err = -EINVAL;
448 goto fail;
449 }
450
451 bo = host1x_bo_lookup(file, cmdbuf.handle);
452 if (!bo) {
453 err = -ENOENT;
454 goto fail;
455 }
456
457 offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
458 obj = host1x_to_tegra_bo(bo);
459 refs[num_refs++] = &obj->gem;
460
461 /*
462 * Gather buffer base address must be 4-bytes aligned,
463 * unaligned offset is malformed and cause commands stream
464 * corruption on the buffer address relocation.
465 */
466 if (offset & 3 || offset >= obj->gem.size) {
467 err = -EINVAL;
468 goto fail;
469 }
470
471 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
472 num_cmdbufs--;
473 user_cmdbufs++;
474 }
475
476 /* copy and resolve relocations from submit */
477 while (num_relocs--) {
478 struct host1x_reloc *reloc;
479 struct tegra_bo *obj;
480
481 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
482 &user_relocs[num_relocs], drm,
483 file);
484 if (err < 0)
485 goto fail;
486
487 reloc = &job->relocarray[num_relocs];
488 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
489 refs[num_refs++] = &obj->gem;
490
491 /*
492 * The unaligned cmdbuf offset will cause an unaligned write
493 * during of the relocations patching, corrupting the commands
494 * stream.
495 */
496 if (reloc->cmdbuf.offset & 3 ||
497 reloc->cmdbuf.offset >= obj->gem.size) {
498 err = -EINVAL;
499 goto fail;
500 }
501
502 obj = host1x_to_tegra_bo(reloc->target.bo);
503 refs[num_refs++] = &obj->gem;
504
505 if (reloc->target.offset >= obj->gem.size) {
506 err = -EINVAL;
507 goto fail;
508 }
509 }
510
511 /* copy and resolve waitchks from submit */
512 while (num_waitchks--) {
513 struct host1x_waitchk *wait = &job->waitchk[num_waitchks];
514 struct tegra_bo *obj;
515
516 err = host1x_waitchk_copy_from_user(
517 wait, &user_waitchks[num_waitchks], file);
518 if (err < 0)
519 goto fail;
520
521 obj = host1x_to_tegra_bo(wait->bo);
522 refs[num_refs++] = &obj->gem;
523
524 /*
525 * The unaligned offset will cause an unaligned write during
526 * of the waitchks patching, corrupting the commands stream.
527 */
528 if (wait->offset & 3 ||
529 wait->offset >= obj->gem.size) {
530 err = -EINVAL;
531 goto fail;
532 }
533 }
534
535 if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
536 err = -EFAULT;
537 goto fail;
538 }
539
540 /* check whether syncpoint ID is valid */
541 sp = host1x_syncpt_get(host1x, syncpt.id);
542 if (!sp) {
543 err = -ENOENT;
544 goto fail;
545 }
546
547 job->is_addr_reg = context->client->ops->is_addr_reg;
548 job->is_valid_class = context->client->ops->is_valid_class;
549 job->syncpt_incrs = syncpt.incrs;
550 job->syncpt_id = syncpt.id;
551 job->timeout = 10000;
552
553 if (args->timeout && args->timeout < 10000)
554 job->timeout = args->timeout;
555
556 err = host1x_job_pin(job, context->client->base.dev);
557 if (err)
558 goto fail;
559
560 err = host1x_job_submit(job);
561 if (err) {
562 host1x_job_unpin(job);
563 goto fail;
564 }
565
566 args->fence = job->syncpt_end;
567
568 fail:
569 while (num_refs--)
570 drm_gem_object_put_unlocked(refs[num_refs]);
571
572 kfree(refs);
573
574 put:
575 host1x_job_put(job);
576 return err;
577 }
578
579
580 #ifdef CONFIG_DRM_TEGRA_STAGING
581 static int tegra_gem_create(struct drm_device *drm, void *data,
582 struct drm_file *file)
583 {
584 struct drm_tegra_gem_create *args = data;
585 struct tegra_bo *bo;
586
587 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
588 &args->handle);
589 if (IS_ERR(bo))
590 return PTR_ERR(bo);
591
592 return 0;
593 }
594
595 static int tegra_gem_mmap(struct drm_device *drm, void *data,
596 struct drm_file *file)
597 {
598 struct drm_tegra_gem_mmap *args = data;
599 struct drm_gem_object *gem;
600 struct tegra_bo *bo;
601
602 gem = drm_gem_object_lookup(file, args->handle);
603 if (!gem)
604 return -EINVAL;
605
606 bo = to_tegra_bo(gem);
607
608 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
609
610 drm_gem_object_put_unlocked(gem);
611
612 return 0;
613 }
614
615 static int tegra_syncpt_read(struct drm_device *drm, void *data,
616 struct drm_file *file)
617 {
618 struct host1x *host = dev_get_drvdata(drm->dev->parent);
619 struct drm_tegra_syncpt_read *args = data;
620 struct host1x_syncpt *sp;
621
622 sp = host1x_syncpt_get(host, args->id);
623 if (!sp)
624 return -EINVAL;
625
626 args->value = host1x_syncpt_read_min(sp);
627 return 0;
628 }
629
630 static int tegra_syncpt_incr(struct drm_device *drm, void *data,
631 struct drm_file *file)
632 {
633 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
634 struct drm_tegra_syncpt_incr *args = data;
635 struct host1x_syncpt *sp;
636
637 sp = host1x_syncpt_get(host1x, args->id);
638 if (!sp)
639 return -EINVAL;
640
641 return host1x_syncpt_incr(sp);
642 }
643
644 static int tegra_syncpt_wait(struct drm_device *drm, void *data,
645 struct drm_file *file)
646 {
647 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
648 struct drm_tegra_syncpt_wait *args = data;
649 struct host1x_syncpt *sp;
650
651 sp = host1x_syncpt_get(host1x, args->id);
652 if (!sp)
653 return -EINVAL;
654
655 return host1x_syncpt_wait(sp, args->thresh,
656 msecs_to_jiffies(args->timeout),
657 &args->value);
658 }
659
660 static int tegra_client_open(struct tegra_drm_file *fpriv,
661 struct tegra_drm_client *client,
662 struct tegra_drm_context *context)
663 {
664 int err;
665
666 err = client->ops->open_channel(client, context);
667 if (err < 0)
668 return err;
669
670 err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
671 if (err < 0) {
672 client->ops->close_channel(context);
673 return err;
674 }
675
676 context->client = client;
677 context->id = err;
678
679 return 0;
680 }
681
682 static int tegra_open_channel(struct drm_device *drm, void *data,
683 struct drm_file *file)
684 {
685 struct tegra_drm_file *fpriv = file->driver_priv;
686 struct tegra_drm *tegra = drm->dev_private;
687 struct drm_tegra_open_channel *args = data;
688 struct tegra_drm_context *context;
689 struct tegra_drm_client *client;
690 int err = -ENODEV;
691
692 context = kzalloc(sizeof(*context), GFP_KERNEL);
693 if (!context)
694 return -ENOMEM;
695
696 mutex_lock(&fpriv->lock);
697
698 list_for_each_entry(client, &tegra->clients, list)
699 if (client->base.class == args->client) {
700 err = tegra_client_open(fpriv, client, context);
701 if (err < 0)
702 break;
703
704 args->context = context->id;
705 break;
706 }
707
708 if (err < 0)
709 kfree(context);
710
711 mutex_unlock(&fpriv->lock);
712 return err;
713 }
714
715 static int tegra_close_channel(struct drm_device *drm, void *data,
716 struct drm_file *file)
717 {
718 struct tegra_drm_file *fpriv = file->driver_priv;
719 struct drm_tegra_close_channel *args = data;
720 struct tegra_drm_context *context;
721 int err = 0;
722
723 mutex_lock(&fpriv->lock);
724
725 context = idr_find(&fpriv->contexts, args->context);
726 if (!context) {
727 err = -EINVAL;
728 goto unlock;
729 }
730
731 idr_remove(&fpriv->contexts, context->id);
732 tegra_drm_context_free(context);
733
734 unlock:
735 mutex_unlock(&fpriv->lock);
736 return err;
737 }
738
739 static int tegra_get_syncpt(struct drm_device *drm, void *data,
740 struct drm_file *file)
741 {
742 struct tegra_drm_file *fpriv = file->driver_priv;
743 struct drm_tegra_get_syncpt *args = data;
744 struct tegra_drm_context *context;
745 struct host1x_syncpt *syncpt;
746 int err = 0;
747
748 mutex_lock(&fpriv->lock);
749
750 context = idr_find(&fpriv->contexts, args->context);
751 if (!context) {
752 err = -ENODEV;
753 goto unlock;
754 }
755
756 if (args->index >= context->client->base.num_syncpts) {
757 err = -EINVAL;
758 goto unlock;
759 }
760
761 syncpt = context->client->base.syncpts[args->index];
762 args->id = host1x_syncpt_id(syncpt);
763
764 unlock:
765 mutex_unlock(&fpriv->lock);
766 return err;
767 }
768
769 static int tegra_submit(struct drm_device *drm, void *data,
770 struct drm_file *file)
771 {
772 struct tegra_drm_file *fpriv = file->driver_priv;
773 struct drm_tegra_submit *args = data;
774 struct tegra_drm_context *context;
775 int err;
776
777 mutex_lock(&fpriv->lock);
778
779 context = idr_find(&fpriv->contexts, args->context);
780 if (!context) {
781 err = -ENODEV;
782 goto unlock;
783 }
784
785 err = context->client->ops->submit(context, args, drm, file);
786
787 unlock:
788 mutex_unlock(&fpriv->lock);
789 return err;
790 }
791
792 static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
793 struct drm_file *file)
794 {
795 struct tegra_drm_file *fpriv = file->driver_priv;
796 struct drm_tegra_get_syncpt_base *args = data;
797 struct tegra_drm_context *context;
798 struct host1x_syncpt_base *base;
799 struct host1x_syncpt *syncpt;
800 int err = 0;
801
802 mutex_lock(&fpriv->lock);
803
804 context = idr_find(&fpriv->contexts, args->context);
805 if (!context) {
806 err = -ENODEV;
807 goto unlock;
808 }
809
810 if (args->syncpt >= context->client->base.num_syncpts) {
811 err = -EINVAL;
812 goto unlock;
813 }
814
815 syncpt = context->client->base.syncpts[args->syncpt];
816
817 base = host1x_syncpt_get_base(syncpt);
818 if (!base) {
819 err = -ENXIO;
820 goto unlock;
821 }
822
823 args->id = host1x_syncpt_base_id(base);
824
825 unlock:
826 mutex_unlock(&fpriv->lock);
827 return err;
828 }
829
830 static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
831 struct drm_file *file)
832 {
833 struct drm_tegra_gem_set_tiling *args = data;
834 enum tegra_bo_tiling_mode mode;
835 struct drm_gem_object *gem;
836 unsigned long value = 0;
837 struct tegra_bo *bo;
838
839 switch (args->mode) {
840 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
841 mode = TEGRA_BO_TILING_MODE_PITCH;
842
843 if (args->value != 0)
844 return -EINVAL;
845
846 break;
847
848 case DRM_TEGRA_GEM_TILING_MODE_TILED:
849 mode = TEGRA_BO_TILING_MODE_TILED;
850
851 if (args->value != 0)
852 return -EINVAL;
853
854 break;
855
856 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
857 mode = TEGRA_BO_TILING_MODE_BLOCK;
858
859 if (args->value > 5)
860 return -EINVAL;
861
862 value = args->value;
863 break;
864
865 default:
866 return -EINVAL;
867 }
868
869 gem = drm_gem_object_lookup(file, args->handle);
870 if (!gem)
871 return -ENOENT;
872
873 bo = to_tegra_bo(gem);
874
875 bo->tiling.mode = mode;
876 bo->tiling.value = value;
877
878 drm_gem_object_put_unlocked(gem);
879
880 return 0;
881 }
882
883 static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
884 struct drm_file *file)
885 {
886 struct drm_tegra_gem_get_tiling *args = data;
887 struct drm_gem_object *gem;
888 struct tegra_bo *bo;
889 int err = 0;
890
891 gem = drm_gem_object_lookup(file, args->handle);
892 if (!gem)
893 return -ENOENT;
894
895 bo = to_tegra_bo(gem);
896
897 switch (bo->tiling.mode) {
898 case TEGRA_BO_TILING_MODE_PITCH:
899 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
900 args->value = 0;
901 break;
902
903 case TEGRA_BO_TILING_MODE_TILED:
904 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
905 args->value = 0;
906 break;
907
908 case TEGRA_BO_TILING_MODE_BLOCK:
909 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
910 args->value = bo->tiling.value;
911 break;
912
913 default:
914 err = -EINVAL;
915 break;
916 }
917
918 drm_gem_object_put_unlocked(gem);
919
920 return err;
921 }
922
923 static int tegra_gem_set_flags(struct drm_device *drm, void *data,
924 struct drm_file *file)
925 {
926 struct drm_tegra_gem_set_flags *args = data;
927 struct drm_gem_object *gem;
928 struct tegra_bo *bo;
929
930 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
931 return -EINVAL;
932
933 gem = drm_gem_object_lookup(file, args->handle);
934 if (!gem)
935 return -ENOENT;
936
937 bo = to_tegra_bo(gem);
938 bo->flags = 0;
939
940 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
941 bo->flags |= TEGRA_BO_BOTTOM_UP;
942
943 drm_gem_object_put_unlocked(gem);
944
945 return 0;
946 }
947
948 static int tegra_gem_get_flags(struct drm_device *drm, void *data,
949 struct drm_file *file)
950 {
951 struct drm_tegra_gem_get_flags *args = data;
952 struct drm_gem_object *gem;
953 struct tegra_bo *bo;
954
955 gem = drm_gem_object_lookup(file, args->handle);
956 if (!gem)
957 return -ENOENT;
958
959 bo = to_tegra_bo(gem);
960 args->flags = 0;
961
962 if (bo->flags & TEGRA_BO_BOTTOM_UP)
963 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
964
965 drm_gem_object_put_unlocked(gem);
966
967 return 0;
968 }
969 #endif
970
971 static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
972 #ifdef CONFIG_DRM_TEGRA_STAGING
973 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
974 DRM_UNLOCKED | DRM_RENDER_ALLOW),
975 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
976 DRM_UNLOCKED | DRM_RENDER_ALLOW),
977 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
978 DRM_UNLOCKED | DRM_RENDER_ALLOW),
979 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
980 DRM_UNLOCKED | DRM_RENDER_ALLOW),
981 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
982 DRM_UNLOCKED | DRM_RENDER_ALLOW),
983 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
984 DRM_UNLOCKED | DRM_RENDER_ALLOW),
985 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
986 DRM_UNLOCKED | DRM_RENDER_ALLOW),
987 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
988 DRM_UNLOCKED | DRM_RENDER_ALLOW),
989 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
990 DRM_UNLOCKED | DRM_RENDER_ALLOW),
991 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
992 DRM_UNLOCKED | DRM_RENDER_ALLOW),
993 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
994 DRM_UNLOCKED | DRM_RENDER_ALLOW),
995 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
996 DRM_UNLOCKED | DRM_RENDER_ALLOW),
997 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
998 DRM_UNLOCKED | DRM_RENDER_ALLOW),
999 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
1000 DRM_UNLOCKED | DRM_RENDER_ALLOW),
1001 #endif
1002 };
1003
1004 static const struct file_operations tegra_drm_fops = {
1005 .owner = THIS_MODULE,
1006 .open = drm_open,
1007 .release = drm_release,
1008 .unlocked_ioctl = drm_ioctl,
1009 .mmap = tegra_drm_mmap,
1010 .poll = drm_poll,
1011 .read = drm_read,
1012 .compat_ioctl = drm_compat_ioctl,
1013 .llseek = noop_llseek,
1014 };
1015
1016 static int tegra_drm_context_cleanup(int id, void *p, void *data)
1017 {
1018 struct tegra_drm_context *context = p;
1019
1020 tegra_drm_context_free(context);
1021
1022 return 0;
1023 }
1024
1025 static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
1026 {
1027 struct tegra_drm_file *fpriv = file->driver_priv;
1028
1029 mutex_lock(&fpriv->lock);
1030 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
1031 mutex_unlock(&fpriv->lock);
1032
1033 idr_destroy(&fpriv->contexts);
1034 mutex_destroy(&fpriv->lock);
1035 kfree(fpriv);
1036 }
1037
1038 #ifdef CONFIG_DEBUG_FS
1039 static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
1040 {
1041 struct drm_info_node *node = (struct drm_info_node *)s->private;
1042 struct drm_device *drm = node->minor->dev;
1043 struct drm_framebuffer *fb;
1044
1045 mutex_lock(&drm->mode_config.fb_lock);
1046
1047 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
1048 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
1049 fb->base.id, fb->width, fb->height,
1050 fb->format->depth,
1051 fb->format->cpp[0] * 8,
1052 drm_framebuffer_read_refcount(fb));
1053 }
1054
1055 mutex_unlock(&drm->mode_config.fb_lock);
1056
1057 return 0;
1058 }
1059
1060 static int tegra_debugfs_iova(struct seq_file *s, void *data)
1061 {
1062 struct drm_info_node *node = (struct drm_info_node *)s->private;
1063 struct drm_device *drm = node->minor->dev;
1064 struct tegra_drm *tegra = drm->dev_private;
1065 struct drm_printer p = drm_seq_file_printer(s);
1066
1067 if (tegra->domain) {
1068 mutex_lock(&tegra->mm_lock);
1069 drm_mm_print(&tegra->mm, &p);
1070 mutex_unlock(&tegra->mm_lock);
1071 }
1072
1073 return 0;
1074 }
1075
1076 static struct drm_info_list tegra_debugfs_list[] = {
1077 { "framebuffers", tegra_debugfs_framebuffers, 0 },
1078 { "iova", tegra_debugfs_iova, 0 },
1079 };
1080
1081 static int tegra_debugfs_init(struct drm_minor *minor)
1082 {
1083 return drm_debugfs_create_files(tegra_debugfs_list,
1084 ARRAY_SIZE(tegra_debugfs_list),
1085 minor->debugfs_root, minor);
1086 }
1087 #endif
1088
1089 static struct drm_driver tegra_drm_driver = {
1090 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
1091 DRIVER_ATOMIC | DRIVER_RENDER,
1092 .load = tegra_drm_load,
1093 .unload = tegra_drm_unload,
1094 .open = tegra_drm_open,
1095 .postclose = tegra_drm_postclose,
1096 .lastclose = drm_fb_helper_lastclose,
1097
1098 #if defined(CONFIG_DEBUG_FS)
1099 .debugfs_init = tegra_debugfs_init,
1100 #endif
1101
1102 .gem_free_object_unlocked = tegra_bo_free_object,
1103 .gem_vm_ops = &tegra_bo_vm_ops,
1104
1105 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1106 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1107 .gem_prime_export = tegra_gem_prime_export,
1108 .gem_prime_import = tegra_gem_prime_import,
1109
1110 .dumb_create = tegra_bo_dumb_create,
1111
1112 .ioctls = tegra_drm_ioctls,
1113 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
1114 .fops = &tegra_drm_fops,
1115
1116 .name = DRIVER_NAME,
1117 .desc = DRIVER_DESC,
1118 .date = DRIVER_DATE,
1119 .major = DRIVER_MAJOR,
1120 .minor = DRIVER_MINOR,
1121 .patchlevel = DRIVER_PATCHLEVEL,
1122 };
1123
1124 int tegra_drm_register_client(struct tegra_drm *tegra,
1125 struct tegra_drm_client *client)
1126 {
1127 mutex_lock(&tegra->clients_lock);
1128 list_add_tail(&client->list, &tegra->clients);
1129 mutex_unlock(&tegra->clients_lock);
1130
1131 return 0;
1132 }
1133
1134 int tegra_drm_unregister_client(struct tegra_drm *tegra,
1135 struct tegra_drm_client *client)
1136 {
1137 mutex_lock(&tegra->clients_lock);
1138 list_del_init(&client->list);
1139 mutex_unlock(&tegra->clients_lock);
1140
1141 return 0;
1142 }
1143
1144 void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
1145 {
1146 struct iova *alloc;
1147 void *virt;
1148 gfp_t gfp;
1149 int err;
1150
1151 if (tegra->domain)
1152 size = iova_align(&tegra->carveout.domain, size);
1153 else
1154 size = PAGE_ALIGN(size);
1155
1156 gfp = GFP_KERNEL | __GFP_ZERO;
1157 if (!tegra->domain) {
1158 /*
1159 * Many units only support 32-bit addresses, even on 64-bit
1160 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1161 * virtual address space, force allocations to be in the
1162 * lower 32-bit range.
1163 */
1164 gfp |= GFP_DMA;
1165 }
1166
1167 virt = (void *)__get_free_pages(gfp, get_order(size));
1168 if (!virt)
1169 return ERR_PTR(-ENOMEM);
1170
1171 if (!tegra->domain) {
1172 /*
1173 * If IOMMU is disabled, devices address physical memory
1174 * directly.
1175 */
1176 *dma = virt_to_phys(virt);
1177 return virt;
1178 }
1179
1180 alloc = alloc_iova(&tegra->carveout.domain,
1181 size >> tegra->carveout.shift,
1182 tegra->carveout.limit, true);
1183 if (!alloc) {
1184 err = -EBUSY;
1185 goto free_pages;
1186 }
1187
1188 *dma = iova_dma_addr(&tegra->carveout.domain, alloc);
1189 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
1190 size, IOMMU_READ | IOMMU_WRITE);
1191 if (err < 0)
1192 goto free_iova;
1193
1194 return virt;
1195
1196 free_iova:
1197 __free_iova(&tegra->carveout.domain, alloc);
1198 free_pages:
1199 free_pages((unsigned long)virt, get_order(size));
1200
1201 return ERR_PTR(err);
1202 }
1203
1204 void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
1205 dma_addr_t dma)
1206 {
1207 if (tegra->domain)
1208 size = iova_align(&tegra->carveout.domain, size);
1209 else
1210 size = PAGE_ALIGN(size);
1211
1212 if (tegra->domain) {
1213 iommu_unmap(tegra->domain, dma, size);
1214 free_iova(&tegra->carveout.domain,
1215 iova_pfn(&tegra->carveout.domain, dma));
1216 }
1217
1218 free_pages((unsigned long)virt, get_order(size));
1219 }
1220
1221 static int host1x_drm_probe(struct host1x_device *dev)
1222 {
1223 struct drm_driver *driver = &tegra_drm_driver;
1224 struct drm_device *drm;
1225 int err;
1226
1227 drm = drm_dev_alloc(driver, &dev->dev);
1228 if (IS_ERR(drm))
1229 return PTR_ERR(drm);
1230
1231 dev_set_drvdata(&dev->dev, drm);
1232
1233 err = drm_dev_register(drm, 0);
1234 if (err < 0)
1235 goto unref;
1236
1237 return 0;
1238
1239 unref:
1240 drm_dev_unref(drm);
1241 return err;
1242 }
1243
1244 static int host1x_drm_remove(struct host1x_device *dev)
1245 {
1246 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1247
1248 drm_dev_unregister(drm);
1249 drm_dev_unref(drm);
1250
1251 return 0;
1252 }
1253
1254 #ifdef CONFIG_PM_SLEEP
1255 static int host1x_drm_suspend(struct device *dev)
1256 {
1257 struct drm_device *drm = dev_get_drvdata(dev);
1258 struct tegra_drm *tegra = drm->dev_private;
1259
1260 drm_kms_helper_poll_disable(drm);
1261 tegra_drm_fb_suspend(drm);
1262
1263 tegra->state = drm_atomic_helper_suspend(drm);
1264 if (IS_ERR(tegra->state)) {
1265 tegra_drm_fb_resume(drm);
1266 drm_kms_helper_poll_enable(drm);
1267 return PTR_ERR(tegra->state);
1268 }
1269
1270 return 0;
1271 }
1272
1273 static int host1x_drm_resume(struct device *dev)
1274 {
1275 struct drm_device *drm = dev_get_drvdata(dev);
1276 struct tegra_drm *tegra = drm->dev_private;
1277
1278 drm_atomic_helper_resume(drm, tegra->state);
1279 tegra_drm_fb_resume(drm);
1280 drm_kms_helper_poll_enable(drm);
1281
1282 return 0;
1283 }
1284 #endif
1285
1286 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1287 host1x_drm_resume);
1288
1289 static const struct of_device_id host1x_drm_subdevs[] = {
1290 { .compatible = "nvidia,tegra20-dc", },
1291 { .compatible = "nvidia,tegra20-hdmi", },
1292 { .compatible = "nvidia,tegra20-gr2d", },
1293 { .compatible = "nvidia,tegra20-gr3d", },
1294 { .compatible = "nvidia,tegra30-dc", },
1295 { .compatible = "nvidia,tegra30-hdmi", },
1296 { .compatible = "nvidia,tegra30-gr2d", },
1297 { .compatible = "nvidia,tegra30-gr3d", },
1298 { .compatible = "nvidia,tegra114-dsi", },
1299 { .compatible = "nvidia,tegra114-hdmi", },
1300 { .compatible = "nvidia,tegra114-gr3d", },
1301 { .compatible = "nvidia,tegra124-dc", },
1302 { .compatible = "nvidia,tegra124-sor", },
1303 { .compatible = "nvidia,tegra124-hdmi", },
1304 { .compatible = "nvidia,tegra124-dsi", },
1305 { .compatible = "nvidia,tegra124-vic", },
1306 { .compatible = "nvidia,tegra132-dsi", },
1307 { .compatible = "nvidia,tegra210-dc", },
1308 { .compatible = "nvidia,tegra210-dsi", },
1309 { .compatible = "nvidia,tegra210-sor", },
1310 { .compatible = "nvidia,tegra210-sor1", },
1311 { .compatible = "nvidia,tegra210-vic", },
1312 { .compatible = "nvidia,tegra186-display", },
1313 { .compatible = "nvidia,tegra186-dc", },
1314 { .compatible = "nvidia,tegra186-sor", },
1315 { .compatible = "nvidia,tegra186-sor1", },
1316 { .compatible = "nvidia,tegra186-vic", },
1317 { /* sentinel */ }
1318 };
1319
1320 static struct host1x_driver host1x_drm_driver = {
1321 .driver = {
1322 .name = "drm",
1323 .pm = &host1x_drm_pm_ops,
1324 },
1325 .probe = host1x_drm_probe,
1326 .remove = host1x_drm_remove,
1327 .subdevs = host1x_drm_subdevs,
1328 };
1329
1330 static struct platform_driver * const drivers[] = {
1331 &tegra_display_hub_driver,
1332 &tegra_dc_driver,
1333 &tegra_hdmi_driver,
1334 &tegra_dsi_driver,
1335 &tegra_dpaux_driver,
1336 &tegra_sor_driver,
1337 &tegra_gr2d_driver,
1338 &tegra_gr3d_driver,
1339 &tegra_vic_driver,
1340 };
1341
1342 static int __init host1x_drm_init(void)
1343 {
1344 int err;
1345
1346 err = host1x_driver_register(&host1x_drm_driver);
1347 if (err < 0)
1348 return err;
1349
1350 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
1351 if (err < 0)
1352 goto unregister_host1x;
1353
1354 return 0;
1355
1356 unregister_host1x:
1357 host1x_driver_unregister(&host1x_drm_driver);
1358 return err;
1359 }
1360 module_init(host1x_drm_init);
1361
1362 static void __exit host1x_drm_exit(void)
1363 {
1364 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
1365 host1x_driver_unregister(&host1x_drm_driver);
1366 }
1367 module_exit(host1x_drm_exit);
1368
1369 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1370 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1371 MODULE_LICENSE("GPL v2");
CRIS linux kernel tree