drivers/gpu/drm/virtio/virtgpu_ioctl.c

   1 /*
   2  * Copyright (C) 2015 Red Hat, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Authors:
   6  *    Dave Airlie
   7  *    Alon Levy
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included in
  17  * all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25  * OTHER DEALINGS IN THE SOFTWARE.
  26  */
  27
  28 #include <drm/drmP.h>
  29 #include <drm/virtgpu_drm.h>
  30 #include <drm/ttm/ttm_execbuf_util.h>
  31
  32 #include "virtgpu_drv.h"
  33
  34 static void convert_to_hw_box(struct virtio_gpu_box *dst,
  35                               const struct drm_virtgpu_3d_box *src)
  36 {
  37         dst->x = cpu_to_le32(src->x);
  38         dst->y = cpu_to_le32(src->y);
  39         dst->z = cpu_to_le32(src->z);
  40         dst->w = cpu_to_le32(src->w);
  41         dst->h = cpu_to_le32(src->h);
  42         dst->d = cpu_to_le32(src->d);
  43 }
  44
  45 static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
  46                                 struct drm_file *file_priv)
  47 {
  48         struct virtio_gpu_device *vgdev = dev->dev_private;
  49         struct drm_virtgpu_map *virtio_gpu_map = data;
  50
  51         return virtio_gpu_mode_dumb_mmap(file_priv, vgdev->ddev,
  52                                          virtio_gpu_map->handle,
  53                                          &virtio_gpu_map->offset);
  54 }
  55
  56 static int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
  57                                            struct list_head *head)
  58 {
  59         struct ttm_operation_ctx ctx = { false, false };
  60         struct ttm_validate_buffer *buf;
  61         struct ttm_buffer_object *bo;
  62         struct virtio_gpu_object *qobj;
  63         int ret;
  64
  65         ret = ttm_eu_reserve_buffers(ticket, head, true, NULL);
  66         if (ret != 0)
  67                 return ret;
  68
  69         list_for_each_entry(buf, head, head) {
  70                 bo = buf->bo;
  71                 qobj = container_of(bo, struct virtio_gpu_object, tbo);
  72                 ret = ttm_bo_validate(bo, &qobj->placement, &ctx);
  73                 if (ret) {
  74                         ttm_eu_backoff_reservation(ticket, head);
  75                         return ret;
  76                 }
  77         }
  78         return 0;
  79 }
  80
  81 static void virtio_gpu_unref_list(struct list_head *head)
  82 {
  83         struct ttm_validate_buffer *buf;
  84         struct ttm_buffer_object *bo;
  85         struct virtio_gpu_object *qobj;
  86         list_for_each_entry(buf, head, head) {
  87                 bo = buf->bo;
  88                 qobj = container_of(bo, struct virtio_gpu_object, tbo);
  89
  90                 drm_gem_object_put_unlocked(&qobj->gem_base);
  91         }
  92 }
  93
  94 /*
  95  * Usage of execbuffer:
  96  * Relocations need to take into account the full VIRTIO_GPUDrawable size.
  97  * However, the command as passed from user space must *not* contain the initial
  98  * VIRTIO_GPUReleaseInfo struct (first XXX bytes)
  99  */
 100 static int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data,
 101                                  struct drm_file *drm_file)
 102 {
 103         struct drm_virtgpu_execbuffer *exbuf = data;
 104         struct virtio_gpu_device *vgdev = dev->dev_private;
 105         struct virtio_gpu_fpriv *vfpriv = drm_file->driver_priv;
 106         struct drm_gem_object *gobj;
 107         struct virtio_gpu_fence *fence;
 108         struct virtio_gpu_object *qobj;
 109         int ret;
 110         uint32_t *bo_handles = NULL;
 111         void __user *user_bo_handles = NULL;
 112         struct list_head validate_list;
 113         struct ttm_validate_buffer *buflist = NULL;
 114         int i;
 115         struct ww_acquire_ctx ticket;
 116         void *buf;
 117
 118         if (vgdev->has_virgl_3d == false)
 119                 return -ENOSYS;
 120
 121         INIT_LIST_HEAD(&validate_list);
 122         if (exbuf->num_bo_handles) {
 123
 124                 bo_handles = kvmalloc_array(exbuf->num_bo_handles,
 125                                            sizeof(uint32_t), GFP_KERNEL);
 126                 buflist = kvmalloc_array(exbuf->num_bo_handles,
 127                                            sizeof(struct ttm_validate_buffer),
 128                                            GFP_KERNEL | __GFP_ZERO);
 129                 if (!bo_handles || !buflist) {
 130                         kvfree(bo_handles);
 131                         kvfree(buflist);
 132                         return -ENOMEM;
 133                 }
 134
 135                 user_bo_handles = (void __user *)(uintptr_t)exbuf->bo_handles;
 136                 if (copy_from_user(bo_handles, user_bo_handles,
 137                                    exbuf->num_bo_handles * sizeof(uint32_t))) {
 138                         ret = -EFAULT;
 139                         kvfree(bo_handles);
 140                         kvfree(buflist);
 141                         return ret;
 142                 }
 143
 144                 for (i = 0; i < exbuf->num_bo_handles; i++) {
 145                         gobj = drm_gem_object_lookup(drm_file, bo_handles[i]);
 146                         if (!gobj) {
 147                                 kvfree(bo_handles);
 148                                 kvfree(buflist);
 149                                 return -ENOENT;
 150                         }
 151
 152                         qobj = gem_to_virtio_gpu_obj(gobj);
 153                         buflist[i].bo = &qobj->tbo;
 154
 155                         list_add(&buflist[i].head, &validate_list);
 156                 }
 157                 kvfree(bo_handles);
 158         }
 159
 160         ret = virtio_gpu_object_list_validate(&ticket, &validate_list);
 161         if (ret)
 162                 goto out_free;
 163
 164         buf = memdup_user((void __user *)(uintptr_t)exbuf->command,
 165                           exbuf->size);
 166         if (IS_ERR(buf)) {
 167                 ret = PTR_ERR(buf);
 168                 goto out_unresv;
 169         }
 170         virtio_gpu_cmd_submit(vgdev, buf, exbuf->size,
 171                               vfpriv->ctx_id, &fence);
 172
 173         ttm_eu_fence_buffer_objects(&ticket, &validate_list, &fence->f);
 174
 175         /* fence the command bo */
 176         virtio_gpu_unref_list(&validate_list);
 177         kvfree(buflist);
 178         dma_fence_put(&fence->f);
 179         return 0;
 180
 181 out_unresv:
 182         ttm_eu_backoff_reservation(&ticket, &validate_list);
 183 out_free:
 184         virtio_gpu_unref_list(&validate_list);
 185         kvfree(buflist);
 186         return ret;
 187 }
 188
 189 static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data,
 190                                      struct drm_file *file_priv)
 191 {
 192         struct virtio_gpu_device *vgdev = dev->dev_private;
 193         struct drm_virtgpu_getparam *param = data;
 194         int value;
 195
 196         switch (param->param) {
 197         case VIRTGPU_PARAM_3D_FEATURES:
 198                 value = vgdev->has_virgl_3d == true ? 1 : 0;
 199                 break;
 200         case VIRTGPU_PARAM_CAPSET_QUERY_FIX:
 201                 value = 1;
 202                 break;
 203         default:
 204                 return -EINVAL;
 205         }
 206         if (copy_to_user((void __user *)(unsigned long)param->value,
 207                          &value, sizeof(int))) {
 208                 return -EFAULT;
 209         }
 210         return 0;
 211 }
 212
 213 static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data,
 214                                             struct drm_file *file_priv)
 215 {
 216         struct virtio_gpu_device *vgdev = dev->dev_private;
 217         struct drm_virtgpu_resource_create *rc = data;
 218         int ret;
 219         uint32_t res_id;
 220         struct virtio_gpu_object *qobj;
 221         struct drm_gem_object *obj;
 222         uint32_t handle = 0;
 223         uint32_t size;
 224         struct list_head validate_list;
 225         struct ttm_validate_buffer mainbuf;
 226         struct virtio_gpu_fence *fence = NULL;
 227         struct ww_acquire_ctx ticket;
 228         struct virtio_gpu_resource_create_3d rc_3d;
 229
 230         if (vgdev->has_virgl_3d == false) {
 231                 if (rc->depth > 1)
 232                         return -EINVAL;
 233                 if (rc->nr_samples > 1)
 234                         return -EINVAL;
 235                 if (rc->last_level > 1)
 236                         return -EINVAL;
 237                 if (rc->target != 2)
 238                         return -EINVAL;
 239                 if (rc->array_size > 1)
 240                         return -EINVAL;
 241         }
 242
 243         INIT_LIST_HEAD(&validate_list);
 244         memset(&mainbuf, 0, sizeof(struct ttm_validate_buffer));
 245
 246         virtio_gpu_resource_id_get(vgdev, &res_id);
 247
 248         size = rc->size;
 249
 250         /* allocate a single page size object */
 251         if (size == 0)
 252                 size = PAGE_SIZE;
 253
 254         qobj = virtio_gpu_alloc_object(dev, size, false, false);
 255         if (IS_ERR(qobj)) {
 256                 ret = PTR_ERR(qobj);
 257                 goto fail_id;
 258         }
 259         obj = &qobj->gem_base;
 260
 261         if (!vgdev->has_virgl_3d) {
 262                 virtio_gpu_cmd_create_resource(vgdev, res_id, rc->format,
 263                                                rc->width, rc->height);
 264
 265                 ret = virtio_gpu_object_attach(vgdev, qobj, res_id, NULL);
 266         } else {
 267                 /* use a gem reference since unref list undoes them */
 268                 drm_gem_object_get(&qobj->gem_base);
 269                 mainbuf.bo = &qobj->tbo;
 270                 list_add(&mainbuf.head, &validate_list);
 271
 272                 ret = virtio_gpu_object_list_validate(&ticket, &validate_list);
 273                 if (ret) {
 274                         DRM_DEBUG("failed to validate\n");
 275                         goto fail_unref;
 276                 }
 277
 278                 rc_3d.resource_id = cpu_to_le32(res_id);
 279                 rc_3d.target = cpu_to_le32(rc->target);
 280                 rc_3d.format = cpu_to_le32(rc->format);
 281                 rc_3d.bind = cpu_to_le32(rc->bind);
 282                 rc_3d.width = cpu_to_le32(rc->width);
 283                 rc_3d.height = cpu_to_le32(rc->height);
 284                 rc_3d.depth = cpu_to_le32(rc->depth);
 285                 rc_3d.array_size = cpu_to_le32(rc->array_size);
 286                 rc_3d.last_level = cpu_to_le32(rc->last_level);
 287                 rc_3d.nr_samples = cpu_to_le32(rc->nr_samples);
 288                 rc_3d.flags = cpu_to_le32(rc->flags);
 289
 290                 virtio_gpu_cmd_resource_create_3d(vgdev, &rc_3d, NULL);
 291                 ret = virtio_gpu_object_attach(vgdev, qobj, res_id, &fence);
 292                 if (ret) {
 293                         ttm_eu_backoff_reservation(&ticket, &validate_list);
 294                         goto fail_unref;
 295                 }
 296                 ttm_eu_fence_buffer_objects(&ticket, &validate_list, &fence->f);
 297         }
 298
 299         qobj->hw_res_handle = res_id;
 300
 301         ret = drm_gem_handle_create(file_priv, obj, &handle);
 302         if (ret) {
 303
 304                 drm_gem_object_release(obj);
 305                 if (vgdev->has_virgl_3d) {
 306                         virtio_gpu_unref_list(&validate_list);
 307                         dma_fence_put(&fence->f);
 308                 }
 309                 return ret;
 310         }
 311         drm_gem_object_put_unlocked(obj);
 312
 313         rc->res_handle = res_id; /* similiar to a VM address */
 314         rc->bo_handle = handle;
 315
 316         if (vgdev->has_virgl_3d) {
 317                 virtio_gpu_unref_list(&validate_list);
 318                 dma_fence_put(&fence->f);
 319         }
 320         return 0;
 321 fail_unref:
 322         if (vgdev->has_virgl_3d) {
 323                 virtio_gpu_unref_list(&validate_list);
 324                 dma_fence_put(&fence->f);
 325         }
 326 //fail_obj:
 327 //      drm_gem_object_handle_unreference_unlocked(obj);
 328 fail_id:
 329         virtio_gpu_resource_id_put(vgdev, res_id);
 330         return ret;
 331 }
 332
 333 static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data,
 334                                           struct drm_file *file_priv)
 335 {
 336         struct drm_virtgpu_resource_info *ri = data;
 337         struct drm_gem_object *gobj = NULL;
 338         struct virtio_gpu_object *qobj = NULL;
 339
 340         gobj = drm_gem_object_lookup(file_priv, ri->bo_handle);
 341         if (gobj == NULL)
 342                 return -ENOENT;
 343
 344         qobj = gem_to_virtio_gpu_obj(gobj);
 345
 346         ri->size = qobj->gem_base.size;
 347         ri->res_handle = qobj->hw_res_handle;
 348         drm_gem_object_put_unlocked(gobj);
 349         return 0;
 350 }
 351
 352 static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev,
 353                                                void *data,
 354                                                struct drm_file *file)
 355 {
 356         struct virtio_gpu_device *vgdev = dev->dev_private;
 357         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 358         struct drm_virtgpu_3d_transfer_from_host *args = data;
 359         struct ttm_operation_ctx ctx = { true, false };
 360         struct drm_gem_object *gobj = NULL;
 361         struct virtio_gpu_object *qobj = NULL;
 362         struct virtio_gpu_fence *fence;
 363         int ret;
 364         u32 offset = args->offset;
 365         struct virtio_gpu_box box;
 366
 367         if (vgdev->has_virgl_3d == false)
 368                 return -ENOSYS;
 369
 370         gobj = drm_gem_object_lookup(file, args->bo_handle);
 371         if (gobj == NULL)
 372                 return -ENOENT;
 373
 374         qobj = gem_to_virtio_gpu_obj(gobj);
 375
 376         ret = virtio_gpu_object_reserve(qobj, false);
 377         if (ret)
 378                 goto out;
 379
 380         ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
 381         if (unlikely(ret))
 382                 goto out_unres;
 383
 384         convert_to_hw_box(&box, &args->box);
 385         virtio_gpu_cmd_transfer_from_host_3d
 386                 (vgdev, qobj->hw_res_handle,
 387                  vfpriv->ctx_id, offset, args->level,
 388                  &box, &fence);
 389         reservation_object_add_excl_fence(qobj->tbo.resv,
 390                                           &fence->f);
 391
 392         dma_fence_put(&fence->f);
 393 out_unres:
 394         virtio_gpu_object_unreserve(qobj);
 395 out:
 396         drm_gem_object_put_unlocked(gobj);
 397         return ret;
 398 }
 399
 400 static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data,
 401                                              struct drm_file *file)
 402 {
 403         struct virtio_gpu_device *vgdev = dev->dev_private;
 404         struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 405         struct drm_virtgpu_3d_transfer_to_host *args = data;
 406         struct ttm_operation_ctx ctx = { true, false };
 407         struct drm_gem_object *gobj = NULL;
 408         struct virtio_gpu_object *qobj = NULL;
 409         struct virtio_gpu_fence *fence;
 410         struct virtio_gpu_box box;
 411         int ret;
 412         u32 offset = args->offset;
 413
 414         gobj = drm_gem_object_lookup(file, args->bo_handle);
 415         if (gobj == NULL)
 416                 return -ENOENT;
 417
 418         qobj = gem_to_virtio_gpu_obj(gobj);
 419
 420         ret = virtio_gpu_object_reserve(qobj, false);
 421         if (ret)
 422                 goto out;
 423
 424         ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
 425         if (unlikely(ret))
 426                 goto out_unres;
 427
 428         convert_to_hw_box(&box, &args->box);
 429         if (!vgdev->has_virgl_3d) {
 430                 virtio_gpu_cmd_transfer_to_host_2d
 431                         (vgdev, qobj->hw_res_handle, offset,
 432                          box.w, box.h, box.x, box.y, NULL);
 433         } else {
 434                 virtio_gpu_cmd_transfer_to_host_3d
 435                         (vgdev, qobj->hw_res_handle,
 436                          vfpriv ? vfpriv->ctx_id : 0, offset,
 437                          args->level, &box, &fence);
 438                 reservation_object_add_excl_fence(qobj->tbo.resv,
 439                                                   &fence->f);
 440                 dma_fence_put(&fence->f);
 441         }
 442
 443 out_unres:
 444         virtio_gpu_object_unreserve(qobj);
 445 out:
 446         drm_gem_object_put_unlocked(gobj);
 447         return ret;
 448 }
 449
 450 static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data,
 451                             struct drm_file *file)
 452 {
 453         struct drm_virtgpu_3d_wait *args = data;
 454         struct drm_gem_object *gobj = NULL;
 455         struct virtio_gpu_object *qobj = NULL;
 456         int ret;
 457         bool nowait = false;
 458
 459         gobj = drm_gem_object_lookup(file, args->handle);
 460         if (gobj == NULL)
 461                 return -ENOENT;
 462
 463         qobj = gem_to_virtio_gpu_obj(gobj);
 464
 465         if (args->flags & VIRTGPU_WAIT_NOWAIT)
 466                 nowait = true;
 467         ret = virtio_gpu_object_wait(qobj, nowait);
 468
 469         drm_gem_object_put_unlocked(gobj);
 470         return ret;
 471 }
 472
 473 static int virtio_gpu_get_caps_ioctl(struct drm_device *dev,
 474                                 void *data, struct drm_file *file)
 475 {
 476         struct virtio_gpu_device *vgdev = dev->dev_private;
 477         struct drm_virtgpu_get_caps *args = data;
 478         unsigned size, host_caps_size;
 479         int i;
 480         int found_valid = -1;
 481         int ret;
 482         struct virtio_gpu_drv_cap_cache *cache_ent;
 483         void *ptr;
 484         if (vgdev->num_capsets == 0)
 485                 return -ENOSYS;
 486
 487         /* don't allow userspace to pass 0 */
 488         if (args->size == 0)
 489                 return -EINVAL;
 490
 491         spin_lock(&vgdev->display_info_lock);
 492         for (i = 0; i < vgdev->num_capsets; i++) {
 493                 if (vgdev->capsets[i].id == args->cap_set_id) {
 494                         if (vgdev->capsets[i].max_version >= args->cap_set_ver) {
 495                                 found_valid = i;
 496                                 break;
 497                         }
 498                 }
 499         }
 500
 501         if (found_valid == -1) {
 502                 spin_unlock(&vgdev->display_info_lock);
 503                 return -EINVAL;
 504         }
 505
 506         host_caps_size = vgdev->capsets[found_valid].max_size;
 507         /* only copy to user the minimum of the host caps size or the guest caps size */
 508         size = min(args->size, host_caps_size);
 509
 510         list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
 511                 if (cache_ent->id == args->cap_set_id &&
 512                     cache_ent->version == args->cap_set_ver) {
 513                         ptr = cache_ent->caps_cache;
 514                         spin_unlock(&vgdev->display_info_lock);
 515                         goto copy_exit;
 516                 }
 517         }
 518         spin_unlock(&vgdev->display_info_lock);
 519
 520         /* not in cache - need to talk to hw */
 521         virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
 522                                   &cache_ent);
 523
 524         ret = wait_event_timeout(vgdev->resp_wq,
 525                                  atomic_read(&cache_ent->is_valid), 5 * HZ);
 526
 527         ptr = cache_ent->caps_cache;
 528
 529 copy_exit:
 530         if (copy_to_user((void __user *)(unsigned long)args->addr, ptr, size))
 531                 return -EFAULT;
 532
 533         return 0;
 534 }
 535
 536 struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = {
 537         DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl,
 538                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 539
 540         DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl,
 541                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 542
 543         DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl,
 544                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 545
 546         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE,
 547                           virtio_gpu_resource_create_ioctl,
 548                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 549
 550         DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl,
 551                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 552
 553         /* make transfer async to the main ring? - no sure, can we
 554            thread these in the underlying GL */
 555         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST,
 556                           virtio_gpu_transfer_from_host_ioctl,
 557                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 558         DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST,
 559                           virtio_gpu_transfer_to_host_ioctl,
 560                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 561
 562         DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl,
 563                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 564
 565         DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl,
 566                           DRM_AUTH|DRM_UNLOCKED|DRM_RENDER_ALLOW),
 567 };