drivers/infiniband/hw/nes/nes.h

   1 /*
   2  * Copyright (c) 2006 - 2011 Intel Corporation.  All rights reserved.
   3  * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #ifndef __NES_H
  35 #define __NES_H
  36
  37 #include <linux/netdevice.h>
  38 #include <linux/inetdevice.h>
  39 #include <linux/interrupt.h>
  40 #include <linux/spinlock.h>
  41 #include <linux/kernel.h>
  42 #include <linux/delay.h>
  43 #include <linux/pci.h>
  44 #include <linux/dma-mapping.h>
  45 #include <linux/workqueue.h>
  46 #include <linux/slab.h>
  47 #include <asm/io.h>
  48 #include <linux/crc32c.h>
  49
  50 #include <rdma/ib_smi.h>
  51 #include <rdma/ib_verbs.h>
  52 #include <rdma/ib_pack.h>
  53 #include <rdma/rdma_cm.h>
  54 #include <rdma/iw_cm.h>
  55 #include <rdma/rdma_netlink.h>
  56 #include <rdma/iw_portmap.h>
  57
  58 #define NES_SEND_FIRST_WRITE
  59
  60 #define QUEUE_DISCONNECTS
  61
  62 #define DRV_NAME    "iw_nes"
  63 #define DRV_VERSION "1.5.0.1"
  64 #define PFX         DRV_NAME ": "
  65
  66 /*
  67  * NetEffect PCI vendor id and NE010 PCI device id.
  68  */
  69 #ifndef PCI_VENDOR_ID_NETEFFECT /* not in pci.ids yet */
  70 #define PCI_VENDOR_ID_NETEFFECT          0x1678
  71 #define PCI_DEVICE_ID_NETEFFECT_NE020    0x0100
  72 #define PCI_DEVICE_ID_NETEFFECT_NE020_KR 0x0110
  73 #endif
  74
  75 #define NE020_REV   4
  76 #define NE020_REV1  5
  77
  78 #define BAR_0       0
  79 #define BAR_1       2
  80
  81 #define RX_BUF_SIZE             (1536 + 8)
  82 #define NES_REG0_SIZE           (4 * 1024)
  83 #define NES_TX_TIMEOUT          (6*HZ)
  84 #define NES_FIRST_QPN           64
  85 #define NES_SW_CONTEXT_ALIGN    1024
  86
  87 #define NES_MAX_MTU             9000
  88
  89 #define NES_NIC_MAX_NICS        16
  90 #define NES_MAX_ARP_TABLE_SIZE  4096
  91
  92 #define NES_NIC_CEQ_SIZE        8
  93 /* NICs will be on a separate CQ */
  94 #define NES_CCEQ_SIZE ((nesadapter->max_cq / nesadapter->port_count) - 32)
  95
  96 #define NES_MAX_PORT_COUNT 4
  97
  98 #define MAX_DPC_ITERATIONS               128
  99
 100 #define NES_DRV_OPT_ENABLE_MPA_VER_0     0x00000001
 101 #define NES_DRV_OPT_DISABLE_MPA_CRC      0x00000002
 102 #define NES_DRV_OPT_DISABLE_FIRST_WRITE  0x00000004
 103 #define NES_DRV_OPT_DISABLE_INTF         0x00000008
 104 #define NES_DRV_OPT_ENABLE_MSI           0x00000010
 105 #define NES_DRV_OPT_DUAL_LOGICAL_PORT    0x00000020
 106 #define NES_DRV_OPT_SUPRESS_OPTION_BC    0x00000040
 107 #define NES_DRV_OPT_NO_INLINE_DATA       0x00000080
 108 #define NES_DRV_OPT_DISABLE_INT_MOD      0x00000100
 109 #define NES_DRV_OPT_DISABLE_VIRT_WQ      0x00000200
 110 #define NES_DRV_OPT_ENABLE_PAU           0x00000400
 111
 112 #define NES_AEQ_EVENT_TIMEOUT         2500
 113 #define NES_DISCONNECT_EVENT_TIMEOUT  2000
 114
 115 /* debug levels */
 116 /* must match userspace */
 117 #define NES_DBG_HW          0x00000001
 118 #define NES_DBG_INIT        0x00000002
 119 #define NES_DBG_ISR         0x00000004
 120 #define NES_DBG_PHY         0x00000008
 121 #define NES_DBG_NETDEV      0x00000010
 122 #define NES_DBG_CM          0x00000020
 123 #define NES_DBG_CM1         0x00000040
 124 #define NES_DBG_NIC_RX      0x00000080
 125 #define NES_DBG_NIC_TX      0x00000100
 126 #define NES_DBG_CQP         0x00000200
 127 #define NES_DBG_MMAP        0x00000400
 128 #define NES_DBG_MR          0x00000800
 129 #define NES_DBG_PD          0x00001000
 130 #define NES_DBG_CQ          0x00002000
 131 #define NES_DBG_QP          0x00004000
 132 #define NES_DBG_MOD_QP      0x00008000
 133 #define NES_DBG_AEQ         0x00010000
 134 #define NES_DBG_IW_RX       0x00020000
 135 #define NES_DBG_IW_TX       0x00040000
 136 #define NES_DBG_SHUTDOWN    0x00080000
 137 #define NES_DBG_PAU         0x00100000
 138 #define NES_DBG_NLMSG       0x00200000
 139 #define NES_DBG_RSVD1       0x10000000
 140 #define NES_DBG_RSVD2       0x20000000
 141 #define NES_DBG_RSVD3       0x40000000
 142 #define NES_DBG_RSVD4       0x80000000
 143 #define NES_DBG_ALL         0xffffffff
 144
 145 #ifdef CONFIG_INFINIBAND_NES_DEBUG
 146 #define nes_debug(level, fmt, args...) \
 147 do { \
 148         if (level & nes_debug_level) \
 149                 printk(KERN_ERR PFX "%s[%u]: " fmt, __func__, __LINE__, ##args); \
 150 } while (0)
 151
 152 #define assert(expr) \
 153 do { \
 154         if (!(expr)) { \
 155                 printk(KERN_ERR PFX "Assertion failed! %s, %s, %s, line %d\n", \
 156                            #expr, __FILE__, __func__, __LINE__); \
 157         } \
 158 } while (0)
 159
 160 #define NES_EVENT_TIMEOUT   1200000
 161 #else
 162 #define nes_debug(level, fmt, args...)
 163 #define assert(expr)          do {} while (0)
 164
 165 #define NES_EVENT_TIMEOUT   100000
 166 #endif
 167
 168 #include "nes_hw.h"
 169 #include "nes_verbs.h"
 170 #include "nes_context.h"
 171 #include <rdma/nes-abi.h>
 172 #include "nes_cm.h"
 173 #include "nes_mgt.h"
 174
 175 extern int interrupt_mod_interval;
 176 extern int nes_if_count;
 177 extern int mpa_version;
 178 extern int disable_mpa_crc;
 179 extern unsigned int nes_drv_opt;
 180 extern unsigned int nes_debug_level;
 181 extern unsigned int wqm_quanta;
 182 extern struct list_head nes_adapter_list;
 183
 184 extern atomic_t cm_connects;
 185 extern atomic_t cm_accepts;
 186 extern atomic_t cm_disconnects;
 187 extern atomic_t cm_closes;
 188 extern atomic_t cm_connecteds;
 189 extern atomic_t cm_connect_reqs;
 190 extern atomic_t cm_rejects;
 191 extern atomic_t mod_qp_timouts;
 192 extern atomic_t qps_created;
 193 extern atomic_t qps_destroyed;
 194 extern atomic_t sw_qps_destroyed;
 195 extern u32 mh_detected;
 196 extern u32 mh_pauses_sent;
 197 extern u32 cm_packets_sent;
 198 extern u32 cm_packets_bounced;
 199 extern u32 cm_packets_created;
 200 extern u32 cm_packets_received;
 201 extern u32 cm_packets_dropped;
 202 extern u32 cm_packets_retrans;
 203 extern atomic_t cm_listens_created;
 204 extern atomic_t cm_listens_destroyed;
 205 extern u32 cm_backlog_drops;
 206 extern atomic_t cm_loopbacks;
 207 extern atomic_t cm_nodes_created;
 208 extern atomic_t cm_nodes_destroyed;
 209 extern atomic_t cm_accel_dropped_pkts;
 210 extern atomic_t cm_resets_recvd;
 211 extern atomic_t pau_qps_created;
 212 extern atomic_t pau_qps_destroyed;
 213
 214 extern u32 int_mod_timer_init;
 215 extern u32 int_mod_cq_depth_256;
 216 extern u32 int_mod_cq_depth_128;
 217 extern u32 int_mod_cq_depth_32;
 218 extern u32 int_mod_cq_depth_24;
 219 extern u32 int_mod_cq_depth_16;
 220 extern u32 int_mod_cq_depth_4;
 221 extern u32 int_mod_cq_depth_1;
 222
 223 struct nes_device {
 224         struct nes_adapter         *nesadapter;
 225         void __iomem           *regs;
 226         void __iomem           *index_reg;
 227         struct pci_dev         *pcidev;
 228         struct net_device      *netdev[NES_NIC_MAX_NICS];
 229         u64                    link_status_interrupts;
 230         struct tasklet_struct  dpc_tasklet;
 231         spinlock_t             indexed_regs_lock;
 232         unsigned long          csr_start;
 233         unsigned long          doorbell_region;
 234         unsigned long          doorbell_start;
 235         unsigned long          mac_tx_errors;
 236         unsigned long          mac_pause_frames_sent;
 237         unsigned long          mac_pause_frames_received;
 238         unsigned long          mac_rx_errors;
 239         unsigned long          mac_rx_crc_errors;
 240         unsigned long          mac_rx_symbol_err_frames;
 241         unsigned long          mac_rx_jabber_frames;
 242         unsigned long          mac_rx_oversized_frames;
 243         unsigned long          mac_rx_short_frames;
 244         unsigned long          port_rx_discards;
 245         unsigned long          port_tx_discards;
 246         unsigned int           mac_index;
 247         unsigned int           nes_stack_start;
 248
 249         /* Control Structures */
 250         void                   *cqp_vbase;
 251         dma_addr_t             cqp_pbase;
 252         u32                    cqp_mem_size;
 253         u8                     ceq_index;
 254         u8                     nic_ceq_index;
 255         struct nes_hw_cqp      cqp;
 256         struct nes_hw_cq       ccq;
 257         struct list_head       cqp_avail_reqs;
 258         struct list_head       cqp_pending_reqs;
 259         struct nes_cqp_request *nes_cqp_requests;
 260
 261         u32                    int_req;
 262         u32                    int_stat;
 263         u32                    timer_int_req;
 264         u32                    timer_only_int_count;
 265         u32                    intf_int_req;
 266         u32                    last_mac_tx_pauses;
 267         u32                    last_used_chunks_tx;
 268         struct list_head       list;
 269
 270         u16                    base_doorbell_index;
 271         u16                    currcq_count;
 272         u16                    deepcq_count;
 273         u8                     iw_status;
 274         u8                     msi_enabled;
 275         u8                     netdev_count;
 276         u8                     napi_isr_ran;
 277         u8                     disable_rx_flow_control;
 278         u8                     disable_tx_flow_control;
 279
 280         struct delayed_work    work;
 281         u8                     link_recheck;
 282 };
 283
 284 /* Receive skb private area - must fit in skb->cb area */
 285 struct nes_rskb_cb {
 286         u64                    busaddr;
 287         u32                    maplen;
 288         u32                    seqnum;
 289         u8                     *data_start;
 290         struct nes_qp          *nesqp;
 291 };
 292
 293 static inline __le32 get_crc_value(struct nes_v4_quad *nes_quad)
 294 {
 295         u32 crc_value;
 296         crc_value = crc32c(~0, (void *)nes_quad, sizeof (struct nes_v4_quad));
 297
 298         /*
 299          * With commit ef19454b ("[LIB] crc32c: Keep intermediate crc
 300          * state in cpu order"), behavior of crc32c changes on
 301          * big-endian platforms.  Our algorithm expects the previous
 302          * behavior; otherwise we have RDMA connection establishment
 303          * issue on big-endian.
 304          */
 305         return cpu_to_le32(crc_value);
 306 }
 307
 308 static inline void
 309 set_wqe_64bit_value(__le32 *wqe_words, u32 index, u64 value)
 310 {
 311         wqe_words[index]     = cpu_to_le32((u32) value);
 312         wqe_words[index + 1] = cpu_to_le32(upper_32_bits(value));
 313 }
 314
 315 static inline void
 316 set_wqe_32bit_value(__le32 *wqe_words, u32 index, u32 value)
 317 {
 318         wqe_words[index] = cpu_to_le32(value);
 319 }
 320
 321 static inline void
 322 nes_fill_init_cqp_wqe(struct nes_hw_cqp_wqe *cqp_wqe, struct nes_device *nesdev)
 323 {
 324         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_LOW_IDX]       = 0;
 325         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_HIGH_IDX]      = 0;
 326         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]   = 0;
 327         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]  = 0;
 328         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 0;
 329         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_LEN_IDX]       = 0;
 330         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_LOW_IDX]       = 0;
 331         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_LOW_IDX]        = 0;
 332         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_HIGH_IDX]       = 0;
 333 }
 334
 335 static inline void
 336 nes_fill_init_qp_wqe(struct nes_hw_qp_wqe *wqe, struct nes_qp *nesqp, u32 head)
 337 {
 338         u32 value;
 339         value = ((u32)((unsigned long) nesqp)) | head;
 340         set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_HIGH_IDX,
 341                         (u32)(upper_32_bits((unsigned long)(nesqp))));
 342         set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, value);
 343 }
 344
 345 /* Read from memory-mapped device */
 346 static inline u32 nes_read_indexed(struct nes_device *nesdev, u32 reg_index)
 347 {
 348         unsigned long flags;
 349         void __iomem *addr = nesdev->index_reg;
 350         u32 value;
 351
 352         spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
 353
 354         writel(reg_index, addr);
 355         value = readl((void __iomem *)addr + 4);
 356
 357         spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
 358         return value;
 359 }
 360
 361 static inline u32 nes_read32(const void __iomem *addr)
 362 {
 363         return readl(addr);
 364 }
 365
 366 static inline u16 nes_read16(const void __iomem *addr)
 367 {
 368         return readw(addr);
 369 }
 370
 371 static inline u8 nes_read8(const void __iomem *addr)
 372 {
 373         return readb(addr);
 374 }
 375
 376 /* Write to memory-mapped device */
 377 static inline void nes_write_indexed(struct nes_device *nesdev, u32 reg_index, u32 val)
 378 {
 379         unsigned long flags;
 380         void __iomem *addr = nesdev->index_reg;
 381
 382         spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
 383
 384         writel(reg_index, addr);
 385         writel(val, (void __iomem *)addr + 4);
 386
 387         spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
 388 }
 389
 390 static inline void nes_write32(void __iomem *addr, u32 val)
 391 {
 392         writel(val, addr);
 393 }
 394
 395 static inline void nes_write16(void __iomem *addr, u16 val)
 396 {
 397         writew(val, addr);
 398 }
 399
 400 static inline void nes_write8(void __iomem *addr, u8 val)
 401 {
 402         writeb(val, addr);
 403 }
 404
 405 enum nes_resource {
 406         NES_RESOURCE_MW = 1,
 407         NES_RESOURCE_FAST_MR,
 408         NES_RESOURCE_PHYS_MR,
 409         NES_RESOURCE_USER_MR,
 410         NES_RESOURCE_PD,
 411         NES_RESOURCE_QP,
 412         NES_RESOURCE_CQ,
 413         NES_RESOURCE_ARP
 414 };
 415
 416 static inline int nes_alloc_resource(struct nes_adapter *nesadapter,
 417                 unsigned long *resource_array, u32 max_resources,
 418                 u32 *req_resource_num, u32 *next, enum nes_resource resource_type)
 419 {
 420         unsigned long flags;
 421         u32 resource_num;
 422
 423         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 424
 425         resource_num = find_next_zero_bit(resource_array, max_resources, *next);
 426         if (resource_num >= max_resources) {
 427                 resource_num = find_first_zero_bit(resource_array, max_resources);
 428                 if (resource_num >= max_resources) {
 429                         printk(KERN_ERR PFX "%s: No available resources [type=%u].\n", __func__, resource_type);
 430                         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 431                         return -EMFILE;
 432                 }
 433         }
 434         set_bit(resource_num, resource_array);
 435         *next = resource_num+1;
 436         if (*next == max_resources) {
 437                 *next = 0;
 438         }
 439         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 440         *req_resource_num = resource_num;
 441
 442         return 0;
 443 }
 444
 445 static inline int nes_is_resource_allocated(struct nes_adapter *nesadapter,
 446                 unsigned long *resource_array, u32 resource_num)
 447 {
 448         unsigned long flags;
 449         int bit_is_set;
 450
 451         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 452
 453         bit_is_set = test_bit(resource_num, resource_array);
 454         nes_debug(NES_DBG_HW, "resource_num %u is%s allocated.\n",
 455                         resource_num, (bit_is_set ? "": " not"));
 456         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 457
 458         return bit_is_set;
 459 }
 460
 461 static inline void nes_free_resource(struct nes_adapter *nesadapter,
 462                 unsigned long *resource_array, u32 resource_num)
 463 {
 464         unsigned long flags;
 465
 466         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 467         clear_bit(resource_num, resource_array);
 468         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 469 }
 470
 471 static inline struct nes_vnic *to_nesvnic(struct ib_device *ibdev)
 472 {
 473         return container_of(ibdev, struct nes_ib_device, ibdev)->nesvnic;
 474 }
 475
 476 static inline struct nes_pd *to_nespd(struct ib_pd *ibpd)
 477 {
 478         return container_of(ibpd, struct nes_pd, ibpd);
 479 }
 480
 481 static inline struct nes_ucontext *to_nesucontext(struct ib_ucontext *ibucontext)
 482 {
 483         return container_of(ibucontext, struct nes_ucontext, ibucontext);
 484 }
 485
 486 static inline struct nes_mr *to_nesmr(struct ib_mr *ibmr)
 487 {
 488         return container_of(ibmr, struct nes_mr, ibmr);
 489 }
 490
 491 static inline struct nes_mr *to_nesmr_from_ibfmr(struct ib_fmr *ibfmr)
 492 {
 493         return container_of(ibfmr, struct nes_mr, ibfmr);
 494 }
 495
 496 static inline struct nes_mr *to_nesmw(struct ib_mw *ibmw)
 497 {
 498         return container_of(ibmw, struct nes_mr, ibmw);
 499 }
 500
 501 static inline struct nes_fmr *to_nesfmr(struct nes_mr *nesmr)
 502 {
 503         return container_of(nesmr, struct nes_fmr, nesmr);
 504 }
 505
 506 static inline struct nes_cq *to_nescq(struct ib_cq *ibcq)
 507 {
 508         return container_of(ibcq, struct nes_cq, ibcq);
 509 }
 510
 511 static inline struct nes_qp *to_nesqp(struct ib_qp *ibqp)
 512 {
 513         return container_of(ibqp, struct nes_qp, ibqp);
 514 }
 515
 516
 517
 518 /* nes.c */
 519 void nes_add_ref(struct ib_qp *);
 520 void nes_rem_ref(struct ib_qp *);
 521 struct ib_qp *nes_get_qp(struct ib_device *, int);
 522
 523
 524 /* nes_hw.c */
 525 struct nes_adapter *nes_init_adapter(struct nes_device *, u8);
 526 void  nes_nic_init_timer_defaults(struct nes_device *, u8);
 527 void nes_destroy_adapter(struct nes_adapter *);
 528 int nes_init_cqp(struct nes_device *);
 529 int nes_init_phy(struct nes_device *);
 530 int nes_init_nic_qp(struct nes_device *, struct net_device *);
 531 void nes_destroy_nic_qp(struct nes_vnic *);
 532 int nes_napi_isr(struct nes_device *);
 533 void nes_dpc(unsigned long);
 534 void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
 535 void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *);
 536 int nes_destroy_cqp(struct nes_device *);
 537 int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
 538 void nes_recheck_link_status(struct work_struct *work);
 539 void nes_terminate_timeout(struct timer_list *t);
 540
 541 /* nes_nic.c */
 542 struct net_device *nes_netdev_init(struct nes_device *, void __iomem *);
 543 void nes_netdev_destroy(struct net_device *);
 544 int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
 545
 546 /* nes_cm.c */
 547 void *nes_cm_create(struct net_device *);
 548 int nes_cm_recv(struct sk_buff *, struct net_device *);
 549 void nes_update_arp(unsigned char *, u32, u32, u16, u16);
 550 void nes_manage_arp_cache(struct net_device *, unsigned char *, u32, u32);
 551 void nes_sock_release(struct nes_qp *, unsigned long *);
 552 void flush_wqes(struct nes_device *nesdev, struct nes_qp *, u32, u32);
 553 int nes_manage_apbvt(struct nes_vnic *, u32, u32, u32);
 554 int nes_cm_disconn(struct nes_qp *);
 555 void nes_cm_disconn_worker(void *);
 556
 557 /* nes_verbs.c */
 558 int nes_hw_modify_qp(struct nes_device *, struct nes_qp *, u32, u32, u32);
 559 int nes_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
 560 struct nes_ib_device *nes_init_ofa_device(struct net_device *);
 561 void  nes_port_ibevent(struct nes_vnic *nesvnic);
 562 void nes_destroy_ofa_device(struct nes_ib_device *);
 563 int nes_register_ofa_device(struct nes_ib_device *);
 564
 565 /* nes_util.c */
 566 int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *);
 567 void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16);
 568 void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *);
 569 void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16, u16);
 570 void nes_read_10G_phy_reg(struct nes_device *, u8, u8, u16);
 571 struct nes_cqp_request *nes_get_cqp_request(struct nes_device *);
 572 void nes_free_cqp_request(struct nes_device *nesdev,
 573                           struct nes_cqp_request *cqp_request);
 574 void nes_put_cqp_request(struct nes_device *nesdev,
 575                          struct nes_cqp_request *cqp_request);
 576 void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *);
 577 int nes_arp_table(struct nes_device *, u32, u8 *, u32);
 578 void nes_mh_fix(struct timer_list *t);
 579 void nes_clc(struct timer_list *t);
 580 void nes_dump_mem(unsigned int, void *, int);
 581 u32 nes_crc32(u32, u32, u32, u32, u8 *, u32, u32, u32);
 582
 583 #endif  /* __NES_H */