2 bool "Mailbox Hardware Support"
4 Mailbox is a framework to control hardware communication between
5 on-chip processors through queued messages and interrupt driven
6 signals. Say Y if your platform supports hardware mailboxes.
11 tristate "ARM MHU Mailbox"
14 Say Y here if you want to build the ARM MHU controller driver.
15 The controller has 3 mailbox channels, the last of which can be
16 used in Secure mode only.
19 tristate "Platform MHU Mailbox"
23 Say Y here if you want to build a platform specific variant MHU
25 The controller has a maximum of 3 mailbox channels, the last of
26 which can be used in Secure mode only.
29 bool "ARM PL320 Mailbox"
32 An implementation of the ARM PL320 Interprocessor Communication
33 Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
34 send short messages between Highbank's A9 cores and the EnergyCore
35 Management Engine, primarily for cpufreq. Say Y here if you want
36 to use the PL320 IPCM support.
39 tristate "OMAP2+ Mailbox framework support"
40 depends on ARCH_OMAP2PLUS
42 Mailbox implementation for OMAP family chips with hardware for
43 interprocessor communication involving DSP, IVA1.0 and IVA2 in
44 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
45 want to use OMAP2+ Mailbox framework support.
47 config OMAP_MBOX_KFIFO_SIZE
48 int "Mailbox kfifo default buffer size (bytes)"
49 depends on OMAP2PLUS_MBOX
52 Specify the default size of mailbox's kfifo buffers (bytes).
53 This can also be changed at runtime (via the mbox_kfifo_size
57 bool "Rockchip Soc Intergrated Mailbox Support"
58 depends on ARCH_ROCKCHIP || COMPILE_TEST
60 This driver provides support for inter-processor communication
61 between CPU cores and MCU processor on Some Rockchip SOCs.
62 Please check it that the Soc you use have Mailbox hardware.
63 Say Y here if you want to use the Rockchip Mailbox support.
66 bool "Platform Communication Channel Driver"
70 ACPI 5.0+ spec defines a generic mode of communication
71 between the OS and a platform such as the BMC. This medium
72 (PCC) is typically used by CPPC (ACPI CPU Performance management),
73 RAS (ACPI reliability protocol) and MPST (ACPI Memory power
74 states). Select this driver if your platform implements the
75 PCC clients mentioned above.
78 tristate "Altera Mailbox"
81 An implementation of the Altera Mailbox soft core. It is used
82 to send message between processors. Say Y here if you want to use the
83 Altera mailbox support.
86 tristate "BCM2835 Mailbox"
87 depends on ARCH_BCM2835
89 An implementation of the BCM2385 Mailbox. It is used to invoke
90 the services of the Videocore. Say Y here if you want to use the
94 tristate "STI Mailbox framework support"
95 depends on ARCH_STI && OF
97 Mailbox implementation for STMicroelectonics family chips with
98 hardware for interprocessor communication.
100 config TI_MESSAGE_MANAGER
101 tristate "Texas Instruments Message Manager Driver"
102 depends on ARCH_KEYSTONE
104 An implementation of Message Manager slave driver for Keystone
105 architecture SoCs from Texas Instruments. Message Manager is a
106 communication entity found on few of Texas Instrument's keystone
107 architecture SoCs. These may be used for communication between
108 multiple processors within the SoC. Select this driver if your
109 platform has support for the hardware block.
112 tristate "Hi6220 Mailbox"
115 An implementation of the hi6220 mailbox. It is used to send message
116 between application processors and MCU. Say Y here if you want to
117 build Hi6220 mailbox controller driver.
120 tristate "Mailbox Test Client"
124 Test client to help with testing new Controller driver
128 tristate "Qualcomm APCS IPC driver"
129 depends on ARCH_QCOM || COMPILE_TEST
131 Say y here to enable support for the APCS IPC mailbox driver,
132 providing an interface for invoking the inter-process communication
133 signals from the application processor to other masters.
135 config TEGRA_HSP_MBOX
136 bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
137 depends on ARCH_TEGRA_186_SOC
139 The Tegra HSP driver is used for the interprocessor communication
140 between different remote processors and host processors on Tegra186
141 and later SoCs. Say Y here if you want to have this support.
144 config XGENE_SLIMPRO_MBOX
145 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
146 depends on ARCH_XGENE
148 An implementation of the APM X-Gene Interprocessor Communication
149 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
150 It is used to send short messages between ARM64-bit cores and
151 the SLIMpro Management Engine, primarily for PM. Say Y here if you
152 want to use the APM X-Gene SLIMpro IPCM support.
155 tristate "Broadcom FlexSparx DMA Mailbox"
156 depends on ARCH_BCM_IPROC || COMPILE_TEST
159 Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
160 which provides access to various offload engines on Broadcom
161 SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
163 config BCM_FLEXRM_MBOX
164 tristate "Broadcom FlexRM Mailbox"
166 depends on ARCH_BCM_IPROC || COMPILE_TEST
168 select GENERIC_MSI_IRQ_DOMAIN
169 default m if ARCH_BCM_IPROC
171 Mailbox implementation of the Broadcom FlexRM ring manager,
172 which provides access to various offload engines on Broadcom
173 SoCs. Say Y here if you want to use the Broadcom FlexRM.