Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / media / platform / qcom / camss-8x16 / camss-ispif.c
blob24da529397b5ba5ccb71d386e8ce3d4591a83a5b
1 /*
2 * camss-ispif.c
4 * Qualcomm MSM Camera Subsystem - ISPIF (ISP Interface) Module
6 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
7 * Copyright (C) 2015-2017 Linaro Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 and
11 * only version 2 as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 #include <linux/clk.h>
19 #include <linux/completion.h>
20 #include <linux/interrupt.h>
21 #include <linux/iopoll.h>
22 #include <linux/kernel.h>
23 #include <linux/mutex.h>
24 #include <linux/platform_device.h>
25 #include <media/media-entity.h>
26 #include <media/v4l2-device.h>
27 #include <media/v4l2-subdev.h>
29 #include "camss-ispif.h"
30 #include "camss.h"
32 #define MSM_ISPIF_NAME "msm_ispif"
34 #define ispif_line_array(ptr_line) \
35 ((const struct ispif_line (*)[]) &(ptr_line[-(ptr_line->id)]))
37 #define to_ispif(ptr_line) \
38 container_of(ispif_line_array(ptr_line), struct ispif_device, ptr_line)
40 #define ISPIF_RST_CMD_0 0x008
41 #define ISPIF_RST_CMD_0_STROBED_RST_EN (1 << 0)
42 #define ISPIF_RST_CMD_0_MISC_LOGIC_RST (1 << 1)
43 #define ISPIF_RST_CMD_0_SW_REG_RST (1 << 2)
44 #define ISPIF_RST_CMD_0_PIX_INTF_0_CSID_RST (1 << 3)
45 #define ISPIF_RST_CMD_0_PIX_INTF_0_VFE_RST (1 << 4)
46 #define ISPIF_RST_CMD_0_PIX_INTF_1_CSID_RST (1 << 5)
47 #define ISPIF_RST_CMD_0_PIX_INTF_1_VFE_RST (1 << 6)
48 #define ISPIF_RST_CMD_0_RDI_INTF_0_CSID_RST (1 << 7)
49 #define ISPIF_RST_CMD_0_RDI_INTF_0_VFE_RST (1 << 8)
50 #define ISPIF_RST_CMD_0_RDI_INTF_1_CSID_RST (1 << 9)
51 #define ISPIF_RST_CMD_0_RDI_INTF_1_VFE_RST (1 << 10)
52 #define ISPIF_RST_CMD_0_RDI_INTF_2_CSID_RST (1 << 11)
53 #define ISPIF_RST_CMD_0_RDI_INTF_2_VFE_RST (1 << 12)
54 #define ISPIF_RST_CMD_0_PIX_OUTPUT_0_MISR_RST (1 << 16)
55 #define ISPIF_RST_CMD_0_RDI_OUTPUT_0_MISR_RST (1 << 17)
56 #define ISPIF_RST_CMD_0_RDI_OUTPUT_1_MISR_RST (1 << 18)
57 #define ISPIF_RST_CMD_0_RDI_OUTPUT_2_MISR_RST (1 << 19)
58 #define ISPIF_IRQ_GLOBAL_CLEAR_CMD 0x01c
59 #define ISPIF_VFE_m_CTRL_0(m) (0x200 + 0x200 * (m))
60 #define ISPIF_VFE_m_CTRL_0_PIX0_LINE_BUF_EN (1 << 6)
61 #define ISPIF_VFE_m_IRQ_MASK_0(m) (0x208 + 0x200 * (m))
62 #define ISPIF_VFE_m_IRQ_MASK_0_PIX0_ENABLE 0x00001249
63 #define ISPIF_VFE_m_IRQ_MASK_0_PIX0_MASK 0x00001fff
64 #define ISPIF_VFE_m_IRQ_MASK_0_RDI0_ENABLE 0x02492000
65 #define ISPIF_VFE_m_IRQ_MASK_0_RDI0_MASK 0x03ffe000
66 #define ISPIF_VFE_m_IRQ_MASK_1(m) (0x20c + 0x200 * (m))
67 #define ISPIF_VFE_m_IRQ_MASK_1_PIX1_ENABLE 0x00001249
68 #define ISPIF_VFE_m_IRQ_MASK_1_PIX1_MASK 0x00001fff
69 #define ISPIF_VFE_m_IRQ_MASK_1_RDI1_ENABLE 0x02492000
70 #define ISPIF_VFE_m_IRQ_MASK_1_RDI1_MASK 0x03ffe000
71 #define ISPIF_VFE_m_IRQ_MASK_2(m) (0x210 + 0x200 * (m))
72 #define ISPIF_VFE_m_IRQ_MASK_2_RDI2_ENABLE 0x00001249
73 #define ISPIF_VFE_m_IRQ_MASK_2_RDI2_MASK 0x00001fff
74 #define ISPIF_VFE_m_IRQ_STATUS_0(m) (0x21c + 0x200 * (m))
75 #define ISPIF_VFE_m_IRQ_STATUS_0_PIX0_OVERFLOW (1 << 12)
76 #define ISPIF_VFE_m_IRQ_STATUS_0_RDI0_OVERFLOW (1 << 25)
77 #define ISPIF_VFE_m_IRQ_STATUS_1(m) (0x220 + 0x200 * (m))
78 #define ISPIF_VFE_m_IRQ_STATUS_1_PIX1_OVERFLOW (1 << 12)
79 #define ISPIF_VFE_m_IRQ_STATUS_1_RDI1_OVERFLOW (1 << 25)
80 #define ISPIF_VFE_m_IRQ_STATUS_2(m) (0x224 + 0x200 * (m))
81 #define ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW (1 << 12)
82 #define ISPIF_VFE_m_IRQ_CLEAR_0(m) (0x230 + 0x200 * (m))
83 #define ISPIF_VFE_m_IRQ_CLEAR_1(m) (0x234 + 0x200 * (m))
84 #define ISPIF_VFE_m_IRQ_CLEAR_2(m) (0x238 + 0x200 * (m))
85 #define ISPIF_VFE_m_INTF_INPUT_SEL(m) (0x244 + 0x200 * (m))
86 #define ISPIF_VFE_m_INTF_CMD_0(m) (0x248 + 0x200 * (m))
87 #define ISPIF_VFE_m_INTF_CMD_1(m) (0x24c + 0x200 * (m))
88 #define ISPIF_VFE_m_PIX_INTF_n_CID_MASK(m, n) \
89 (0x254 + 0x200 * (m) + 0x4 * (n))
90 #define ISPIF_VFE_m_RDI_INTF_n_CID_MASK(m, n) \
91 (0x264 + 0x200 * (m) + 0x4 * (n))
92 #define ISPIF_VFE_m_PIX_INTF_n_STATUS(m, n) \
93 (0x2c0 + 0x200 * (m) + 0x4 * (n))
94 #define ISPIF_VFE_m_RDI_INTF_n_STATUS(m, n) \
95 (0x2d0 + 0x200 * (m) + 0x4 * (n))
97 #define CSI_PIX_CLK_MUX_SEL 0x000
98 #define CSI_RDI_CLK_MUX_SEL 0x008
100 #define ISPIF_TIMEOUT_SLEEP_US 1000
101 #define ISPIF_TIMEOUT_ALL_US 1000000
102 #define ISPIF_RESET_TIMEOUT_MS 500
104 enum ispif_intf_cmd {
105 CMD_DISABLE_FRAME_BOUNDARY = 0x0,
106 CMD_ENABLE_FRAME_BOUNDARY = 0x1,
107 CMD_DISABLE_IMMEDIATELY = 0x2,
108 CMD_ALL_DISABLE_IMMEDIATELY = 0xaaaaaaaa,
109 CMD_ALL_NO_CHANGE = 0xffffffff,
112 static const u32 ispif_formats[] = {
113 MEDIA_BUS_FMT_UYVY8_2X8,
114 MEDIA_BUS_FMT_VYUY8_2X8,
115 MEDIA_BUS_FMT_YUYV8_2X8,
116 MEDIA_BUS_FMT_YVYU8_2X8,
117 MEDIA_BUS_FMT_SBGGR8_1X8,
118 MEDIA_BUS_FMT_SGBRG8_1X8,
119 MEDIA_BUS_FMT_SGRBG8_1X8,
120 MEDIA_BUS_FMT_SRGGB8_1X8,
121 MEDIA_BUS_FMT_SBGGR10_1X10,
122 MEDIA_BUS_FMT_SGBRG10_1X10,
123 MEDIA_BUS_FMT_SGRBG10_1X10,
124 MEDIA_BUS_FMT_SRGGB10_1X10,
125 MEDIA_BUS_FMT_SBGGR12_1X12,
126 MEDIA_BUS_FMT_SGBRG12_1X12,
127 MEDIA_BUS_FMT_SGRBG12_1X12,
128 MEDIA_BUS_FMT_SRGGB12_1X12,
132 * ispif_isr - ISPIF module interrupt handler
133 * @irq: Interrupt line
134 * @dev: ISPIF device
136 * Return IRQ_HANDLED on success
138 static irqreturn_t ispif_isr(int irq, void *dev)
140 struct ispif_device *ispif = dev;
141 u32 value0, value1, value2;
143 value0 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(0));
144 value1 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(0));
145 value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0));
147 writel_relaxed(value0, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(0));
148 writel_relaxed(value1, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(0));
149 writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0));
151 writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD);
153 if ((value0 >> 27) & 0x1)
154 complete(&ispif->reset_complete);
156 if (unlikely(value0 & ISPIF_VFE_m_IRQ_STATUS_0_PIX0_OVERFLOW))
157 dev_err_ratelimited(to_device(ispif), "VFE0 pix0 overflow\n");
159 if (unlikely(value0 & ISPIF_VFE_m_IRQ_STATUS_0_RDI0_OVERFLOW))
160 dev_err_ratelimited(to_device(ispif), "VFE0 rdi0 overflow\n");
162 if (unlikely(value1 & ISPIF_VFE_m_IRQ_STATUS_1_PIX1_OVERFLOW))
163 dev_err_ratelimited(to_device(ispif), "VFE0 pix1 overflow\n");
165 if (unlikely(value1 & ISPIF_VFE_m_IRQ_STATUS_1_RDI1_OVERFLOW))
166 dev_err_ratelimited(to_device(ispif), "VFE0 rdi1 overflow\n");
168 if (unlikely(value2 & ISPIF_VFE_m_IRQ_STATUS_2_RDI2_OVERFLOW))
169 dev_err_ratelimited(to_device(ispif), "VFE0 rdi2 overflow\n");
171 return IRQ_HANDLED;
175 * ispif_reset - Trigger reset on ISPIF module and wait to complete
176 * @ispif: ISPIF device
178 * Return 0 on success or a negative error code otherwise
180 static int ispif_reset(struct ispif_device *ispif)
182 unsigned long time;
183 u32 val;
184 int ret;
186 ret = camss_enable_clocks(ispif->nclocks_for_reset,
187 ispif->clock_for_reset,
188 to_device(ispif));
189 if (ret < 0)
190 return ret;
192 reinit_completion(&ispif->reset_complete);
194 val = ISPIF_RST_CMD_0_STROBED_RST_EN |
195 ISPIF_RST_CMD_0_MISC_LOGIC_RST |
196 ISPIF_RST_CMD_0_SW_REG_RST |
197 ISPIF_RST_CMD_0_PIX_INTF_0_CSID_RST |
198 ISPIF_RST_CMD_0_PIX_INTF_0_VFE_RST |
199 ISPIF_RST_CMD_0_PIX_INTF_1_CSID_RST |
200 ISPIF_RST_CMD_0_PIX_INTF_1_VFE_RST |
201 ISPIF_RST_CMD_0_RDI_INTF_0_CSID_RST |
202 ISPIF_RST_CMD_0_RDI_INTF_0_VFE_RST |
203 ISPIF_RST_CMD_0_RDI_INTF_1_CSID_RST |
204 ISPIF_RST_CMD_0_RDI_INTF_1_VFE_RST |
205 ISPIF_RST_CMD_0_RDI_INTF_2_CSID_RST |
206 ISPIF_RST_CMD_0_RDI_INTF_2_VFE_RST |
207 ISPIF_RST_CMD_0_PIX_OUTPUT_0_MISR_RST |
208 ISPIF_RST_CMD_0_RDI_OUTPUT_0_MISR_RST |
209 ISPIF_RST_CMD_0_RDI_OUTPUT_1_MISR_RST |
210 ISPIF_RST_CMD_0_RDI_OUTPUT_2_MISR_RST;
212 writel_relaxed(val, ispif->base + ISPIF_RST_CMD_0);
214 time = wait_for_completion_timeout(&ispif->reset_complete,
215 msecs_to_jiffies(ISPIF_RESET_TIMEOUT_MS));
216 if (!time) {
217 dev_err(to_device(ispif), "ISPIF reset timeout\n");
218 return -EIO;
221 camss_disable_clocks(ispif->nclocks_for_reset, ispif->clock_for_reset);
223 return 0;
227 * ispif_set_power - Power on/off ISPIF module
228 * @sd: ISPIF V4L2 subdevice
229 * @on: Requested power state
231 * Return 0 on success or a negative error code otherwise
233 static int ispif_set_power(struct v4l2_subdev *sd, int on)
235 struct ispif_line *line = v4l2_get_subdevdata(sd);
236 struct ispif_device *ispif = to_ispif(line);
237 struct device *dev = to_device(ispif);
238 int ret = 0;
240 mutex_lock(&ispif->power_lock);
242 if (on) {
243 if (ispif->power_count) {
244 /* Power is already on */
245 ispif->power_count++;
246 goto exit;
249 ret = camss_enable_clocks(ispif->nclocks, ispif->clock, dev);
250 if (ret < 0)
251 goto exit;
253 ret = ispif_reset(ispif);
254 if (ret < 0) {
255 camss_disable_clocks(ispif->nclocks, ispif->clock);
256 goto exit;
259 ispif->intf_cmd[line->vfe_id].cmd_0 = CMD_ALL_NO_CHANGE;
260 ispif->intf_cmd[line->vfe_id].cmd_1 = CMD_ALL_NO_CHANGE;
262 ispif->power_count++;
263 } else {
264 if (ispif->power_count == 0) {
265 dev_err(dev, "ispif power off on power_count == 0\n");
266 goto exit;
267 } else if (ispif->power_count == 1) {
268 camss_disable_clocks(ispif->nclocks, ispif->clock);
271 ispif->power_count--;
274 exit:
275 mutex_unlock(&ispif->power_lock);
277 return ret;
281 * ispif_select_clk_mux - Select clock for PIX/RDI interface
282 * @ispif: ISPIF device
283 * @intf: VFE interface
284 * @csid: CSID HW module id
285 * @vfe: VFE HW module id
286 * @enable: enable or disable the selected clock
288 static void ispif_select_clk_mux(struct ispif_device *ispif,
289 enum ispif_intf intf, u8 csid,
290 u8 vfe, u8 enable)
292 u32 val;
294 switch (intf) {
295 case PIX0:
296 val = readl_relaxed(ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);
297 val &= ~(0xf << (vfe * 8));
298 if (enable)
299 val |= (csid << (vfe * 8));
300 writel_relaxed(val, ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);
301 break;
303 case RDI0:
304 val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
305 val &= ~(0xf << (vfe * 12));
306 if (enable)
307 val |= (csid << (vfe * 12));
308 writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
309 break;
311 case PIX1:
312 val = readl_relaxed(ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);
313 val &= ~(0xf << (4 + (vfe * 8)));
314 if (enable)
315 val |= (csid << (4 + (vfe * 8)));
316 writel_relaxed(val, ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);
317 break;
319 case RDI1:
320 val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
321 val &= ~(0xf << (4 + (vfe * 12)));
322 if (enable)
323 val |= (csid << (4 + (vfe * 12)));
324 writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
325 break;
327 case RDI2:
328 val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
329 val &= ~(0xf << (8 + (vfe * 12)));
330 if (enable)
331 val |= (csid << (8 + (vfe * 12)));
332 writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);
333 break;
336 mb();
340 * ispif_validate_intf_status - Validate current status of PIX/RDI interface
341 * @ispif: ISPIF device
342 * @intf: VFE interface
343 * @vfe: VFE HW module id
345 * Return 0 when interface is idle or -EBUSY otherwise
347 static int ispif_validate_intf_status(struct ispif_device *ispif,
348 enum ispif_intf intf, u8 vfe)
350 int ret = 0;
351 u32 val = 0;
353 switch (intf) {
354 case PIX0:
355 val = readl_relaxed(ispif->base +
356 ISPIF_VFE_m_PIX_INTF_n_STATUS(vfe, 0));
357 break;
358 case RDI0:
359 val = readl_relaxed(ispif->base +
360 ISPIF_VFE_m_RDI_INTF_n_STATUS(vfe, 0));
361 break;
362 case PIX1:
363 val = readl_relaxed(ispif->base +
364 ISPIF_VFE_m_PIX_INTF_n_STATUS(vfe, 1));
365 break;
366 case RDI1:
367 val = readl_relaxed(ispif->base +
368 ISPIF_VFE_m_RDI_INTF_n_STATUS(vfe, 1));
369 break;
370 case RDI2:
371 val = readl_relaxed(ispif->base +
372 ISPIF_VFE_m_RDI_INTF_n_STATUS(vfe, 2));
373 break;
376 if ((val & 0xf) != 0xf) {
377 dev_err(to_device(ispif), "%s: ispif is busy: 0x%x\n",
378 __func__, val);
379 ret = -EBUSY;
382 return ret;
386 * ispif_wait_for_stop - Wait for PIX/RDI interface to stop
387 * @ispif: ISPIF device
388 * @intf: VFE interface
389 * @vfe: VFE HW module id
391 * Return 0 on success or a negative error code otherwise
393 static int ispif_wait_for_stop(struct ispif_device *ispif,
394 enum ispif_intf intf, u8 vfe)
396 u32 addr = 0;
397 u32 stop_flag = 0;
398 int ret;
400 switch (intf) {
401 case PIX0:
402 addr = ISPIF_VFE_m_PIX_INTF_n_STATUS(vfe, 0);
403 break;
404 case RDI0:
405 addr = ISPIF_VFE_m_RDI_INTF_n_STATUS(vfe, 0);
406 break;
407 case PIX1:
408 addr = ISPIF_VFE_m_PIX_INTF_n_STATUS(vfe, 1);
409 break;
410 case RDI1:
411 addr = ISPIF_VFE_m_RDI_INTF_n_STATUS(vfe, 1);
412 break;
413 case RDI2:
414 addr = ISPIF_VFE_m_RDI_INTF_n_STATUS(vfe, 2);
415 break;
418 ret = readl_poll_timeout(ispif->base + addr,
419 stop_flag,
420 (stop_flag & 0xf) == 0xf,
421 ISPIF_TIMEOUT_SLEEP_US,
422 ISPIF_TIMEOUT_ALL_US);
423 if (ret < 0)
424 dev_err(to_device(ispif), "%s: ispif stop timeout\n",
425 __func__);
427 return ret;
431 * ispif_select_csid - Select CSID HW module for input from
432 * @ispif: ISPIF device
433 * @intf: VFE interface
434 * @csid: CSID HW module id
435 * @vfe: VFE HW module id
436 * @enable: enable or disable the selected input
438 static void ispif_select_csid(struct ispif_device *ispif, enum ispif_intf intf,
439 u8 csid, u8 vfe, u8 enable)
441 u32 val;
443 val = readl_relaxed(ispif->base + ISPIF_VFE_m_INTF_INPUT_SEL(vfe));
444 switch (intf) {
445 case PIX0:
446 val &= ~(BIT(1) | BIT(0));
447 if (enable)
448 val |= csid;
449 break;
450 case RDI0:
451 val &= ~(BIT(5) | BIT(4));
452 if (enable)
453 val |= (csid << 4);
454 break;
455 case PIX1:
456 val &= ~(BIT(9) | BIT(8));
457 if (enable)
458 val |= (csid << 8);
459 break;
460 case RDI1:
461 val &= ~(BIT(13) | BIT(12));
462 if (enable)
463 val |= (csid << 12);
464 break;
465 case RDI2:
466 val &= ~(BIT(21) | BIT(20));
467 if (enable)
468 val |= (csid << 20);
469 break;
472 writel(val, ispif->base + ISPIF_VFE_m_INTF_INPUT_SEL(vfe));
476 * ispif_select_cid - Enable/disable desired CID
477 * @ispif: ISPIF device
478 * @intf: VFE interface
479 * @cid: desired CID to enable/disable
480 * @vfe: VFE HW module id
481 * @enable: enable or disable the desired CID
483 static void ispif_select_cid(struct ispif_device *ispif, enum ispif_intf intf,
484 u8 cid, u8 vfe, u8 enable)
486 u32 cid_mask = 1 << cid;
487 u32 addr = 0;
488 u32 val;
490 switch (intf) {
491 case PIX0:
492 addr = ISPIF_VFE_m_PIX_INTF_n_CID_MASK(vfe, 0);
493 break;
494 case RDI0:
495 addr = ISPIF_VFE_m_RDI_INTF_n_CID_MASK(vfe, 0);
496 break;
497 case PIX1:
498 addr = ISPIF_VFE_m_PIX_INTF_n_CID_MASK(vfe, 1);
499 break;
500 case RDI1:
501 addr = ISPIF_VFE_m_RDI_INTF_n_CID_MASK(vfe, 1);
502 break;
503 case RDI2:
504 addr = ISPIF_VFE_m_RDI_INTF_n_CID_MASK(vfe, 2);
505 break;
508 val = readl_relaxed(ispif->base + addr);
509 if (enable)
510 val |= cid_mask;
511 else
512 val &= ~cid_mask;
514 writel(val, ispif->base + addr);
518 * ispif_config_irq - Enable/disable interrupts for PIX/RDI interface
519 * @ispif: ISPIF device
520 * @intf: VFE interface
521 * @vfe: VFE HW module id
522 * @enable: enable or disable
524 static void ispif_config_irq(struct ispif_device *ispif, enum ispif_intf intf,
525 u8 vfe, u8 enable)
527 u32 val;
529 switch (intf) {
530 case PIX0:
531 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));
532 val &= ~ISPIF_VFE_m_IRQ_MASK_0_PIX0_MASK;
533 if (enable)
534 val |= ISPIF_VFE_m_IRQ_MASK_0_PIX0_ENABLE;
535 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));
536 writel_relaxed(ISPIF_VFE_m_IRQ_MASK_0_PIX0_ENABLE,
537 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(vfe));
538 break;
539 case RDI0:
540 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));
541 val &= ~ISPIF_VFE_m_IRQ_MASK_0_RDI0_MASK;
542 if (enable)
543 val |= ISPIF_VFE_m_IRQ_MASK_0_RDI0_ENABLE;
544 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));
545 writel_relaxed(ISPIF_VFE_m_IRQ_MASK_0_RDI0_ENABLE,
546 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(vfe));
547 break;
548 case PIX1:
549 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));
550 val &= ~ISPIF_VFE_m_IRQ_MASK_1_PIX1_MASK;
551 if (enable)
552 val |= ISPIF_VFE_m_IRQ_MASK_1_PIX1_ENABLE;
553 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));
554 writel_relaxed(ISPIF_VFE_m_IRQ_MASK_1_PIX1_ENABLE,
555 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(vfe));
556 break;
557 case RDI1:
558 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));
559 val &= ~ISPIF_VFE_m_IRQ_MASK_1_RDI1_MASK;
560 if (enable)
561 val |= ISPIF_VFE_m_IRQ_MASK_1_RDI1_ENABLE;
562 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));
563 writel_relaxed(ISPIF_VFE_m_IRQ_MASK_1_RDI1_ENABLE,
564 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(vfe));
565 break;
566 case RDI2:
567 val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_2(vfe));
568 val &= ~ISPIF_VFE_m_IRQ_MASK_2_RDI2_MASK;
569 if (enable)
570 val |= ISPIF_VFE_m_IRQ_MASK_2_RDI2_ENABLE;
571 writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_2(vfe));
572 writel_relaxed(ISPIF_VFE_m_IRQ_MASK_2_RDI2_ENABLE,
573 ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(vfe));
574 break;
577 writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD);
581 * ispif_set_intf_cmd - Set command to enable/disable interface
582 * @ispif: ISPIF device
583 * @cmd: interface command
584 * @intf: VFE interface
585 * @vfe: VFE HW module id
586 * @vc: virtual channel
588 static void ispif_set_intf_cmd(struct ispif_device *ispif, u8 cmd,
589 enum ispif_intf intf, u8 vfe, u8 vc)
591 u32 *val;
593 if (intf == RDI2) {
594 val = &ispif->intf_cmd[vfe].cmd_1;
595 *val &= ~(0x3 << (vc * 2 + 8));
596 *val |= (cmd << (vc * 2 + 8));
597 wmb();
598 writel_relaxed(*val, ispif->base + ISPIF_VFE_m_INTF_CMD_1(vfe));
599 wmb();
600 } else {
601 val = &ispif->intf_cmd[vfe].cmd_0;
602 *val &= ~(0x3 << (vc * 2 + intf * 8));
603 *val |= (cmd << (vc * 2 + intf * 8));
604 wmb();
605 writel_relaxed(*val, ispif->base + ISPIF_VFE_m_INTF_CMD_0(vfe));
606 wmb();
611 * ispif_set_stream - Enable/disable streaming on ISPIF module
612 * @sd: ISPIF V4L2 subdevice
613 * @enable: Requested streaming state
615 * Main configuration of ISPIF module is also done here.
617 * Return 0 on success or a negative error code otherwise
619 static int ispif_set_stream(struct v4l2_subdev *sd, int enable)
621 struct ispif_line *line = v4l2_get_subdevdata(sd);
622 struct ispif_device *ispif = to_ispif(line);
623 enum ispif_intf intf = line->interface;
624 u8 csid = line->csid_id;
625 u8 vfe = line->vfe_id;
626 u8 vc = 0; /* Virtual Channel 0 */
627 u8 cid = vc * 4; /* id of Virtual Channel and Data Type set */
628 int ret;
630 if (enable) {
631 if (!media_entity_remote_pad(&line->pads[MSM_ISPIF_PAD_SINK]))
632 return -ENOLINK;
634 /* Config */
636 mutex_lock(&ispif->config_lock);
637 ispif_select_clk_mux(ispif, intf, csid, vfe, 1);
639 ret = ispif_validate_intf_status(ispif, intf, vfe);
640 if (ret < 0) {
641 mutex_unlock(&ispif->config_lock);
642 return ret;
645 ispif_select_csid(ispif, intf, csid, vfe, 1);
646 ispif_select_cid(ispif, intf, cid, vfe, 1);
647 ispif_config_irq(ispif, intf, vfe, 1);
648 ispif_set_intf_cmd(ispif, CMD_ENABLE_FRAME_BOUNDARY,
649 intf, vfe, vc);
650 } else {
651 mutex_lock(&ispif->config_lock);
652 ispif_set_intf_cmd(ispif, CMD_DISABLE_FRAME_BOUNDARY,
653 intf, vfe, vc);
654 mutex_unlock(&ispif->config_lock);
656 ret = ispif_wait_for_stop(ispif, intf, vfe);
657 if (ret < 0)
658 return ret;
660 mutex_lock(&ispif->config_lock);
661 ispif_config_irq(ispif, intf, vfe, 0);
662 ispif_select_cid(ispif, intf, cid, vfe, 0);
663 ispif_select_csid(ispif, intf, csid, vfe, 0);
664 ispif_select_clk_mux(ispif, intf, csid, vfe, 0);
667 mutex_unlock(&ispif->config_lock);
669 return 0;
673 * __ispif_get_format - Get pointer to format structure
674 * @ispif: ISPIF line
675 * @cfg: V4L2 subdev pad configuration
676 * @pad: pad from which format is requested
677 * @which: TRY or ACTIVE format
679 * Return pointer to TRY or ACTIVE format structure
681 static struct v4l2_mbus_framefmt *
682 __ispif_get_format(struct ispif_line *line,
683 struct v4l2_subdev_pad_config *cfg,
684 unsigned int pad,
685 enum v4l2_subdev_format_whence which)
687 if (which == V4L2_SUBDEV_FORMAT_TRY)
688 return v4l2_subdev_get_try_format(&line->subdev, cfg, pad);
690 return &line->fmt[pad];
694 * ispif_try_format - Handle try format by pad subdev method
695 * @ispif: ISPIF line
696 * @cfg: V4L2 subdev pad configuration
697 * @pad: pad on which format is requested
698 * @fmt: pointer to v4l2 format structure
699 * @which: wanted subdev format
701 static void ispif_try_format(struct ispif_line *line,
702 struct v4l2_subdev_pad_config *cfg,
703 unsigned int pad,
704 struct v4l2_mbus_framefmt *fmt,
705 enum v4l2_subdev_format_whence which)
707 unsigned int i;
709 switch (pad) {
710 case MSM_ISPIF_PAD_SINK:
711 /* Set format on sink pad */
713 for (i = 0; i < ARRAY_SIZE(ispif_formats); i++)
714 if (fmt->code == ispif_formats[i])
715 break;
717 /* If not found, use UYVY as default */
718 if (i >= ARRAY_SIZE(ispif_formats))
719 fmt->code = MEDIA_BUS_FMT_UYVY8_2X8;
721 fmt->width = clamp_t(u32, fmt->width, 1, 8191);
722 fmt->height = clamp_t(u32, fmt->height, 1, 8191);
724 fmt->field = V4L2_FIELD_NONE;
725 fmt->colorspace = V4L2_COLORSPACE_SRGB;
727 break;
729 case MSM_ISPIF_PAD_SRC:
730 /* Set and return a format same as sink pad */
732 *fmt = *__ispif_get_format(line, cfg, MSM_ISPIF_PAD_SINK,
733 which);
735 break;
738 fmt->colorspace = V4L2_COLORSPACE_SRGB;
742 * ispif_enum_mbus_code - Handle pixel format enumeration
743 * @sd: ISPIF V4L2 subdevice
744 * @cfg: V4L2 subdev pad configuration
745 * @code: pointer to v4l2_subdev_mbus_code_enum structure
746 * return -EINVAL or zero on success
748 static int ispif_enum_mbus_code(struct v4l2_subdev *sd,
749 struct v4l2_subdev_pad_config *cfg,
750 struct v4l2_subdev_mbus_code_enum *code)
752 struct ispif_line *line = v4l2_get_subdevdata(sd);
753 struct v4l2_mbus_framefmt *format;
755 if (code->pad == MSM_ISPIF_PAD_SINK) {
756 if (code->index >= ARRAY_SIZE(ispif_formats))
757 return -EINVAL;
759 code->code = ispif_formats[code->index];
760 } else {
761 if (code->index > 0)
762 return -EINVAL;
764 format = __ispif_get_format(line, cfg, MSM_ISPIF_PAD_SINK,
765 code->which);
767 code->code = format->code;
770 return 0;
774 * ispif_enum_frame_size - Handle frame size enumeration
775 * @sd: ISPIF V4L2 subdevice
776 * @cfg: V4L2 subdev pad configuration
777 * @fse: pointer to v4l2_subdev_frame_size_enum structure
778 * return -EINVAL or zero on success
780 static int ispif_enum_frame_size(struct v4l2_subdev *sd,
781 struct v4l2_subdev_pad_config *cfg,
782 struct v4l2_subdev_frame_size_enum *fse)
784 struct ispif_line *line = v4l2_get_subdevdata(sd);
785 struct v4l2_mbus_framefmt format;
787 if (fse->index != 0)
788 return -EINVAL;
790 format.code = fse->code;
791 format.width = 1;
792 format.height = 1;
793 ispif_try_format(line, cfg, fse->pad, &format, fse->which);
794 fse->min_width = format.width;
795 fse->min_height = format.height;
797 if (format.code != fse->code)
798 return -EINVAL;
800 format.code = fse->code;
801 format.width = -1;
802 format.height = -1;
803 ispif_try_format(line, cfg, fse->pad, &format, fse->which);
804 fse->max_width = format.width;
805 fse->max_height = format.height;
807 return 0;
811 * ispif_get_format - Handle get format by pads subdev method
812 * @sd: ISPIF V4L2 subdevice
813 * @cfg: V4L2 subdev pad configuration
814 * @fmt: pointer to v4l2 subdev format structure
816 * Return -EINVAL or zero on success
818 static int ispif_get_format(struct v4l2_subdev *sd,
819 struct v4l2_subdev_pad_config *cfg,
820 struct v4l2_subdev_format *fmt)
822 struct ispif_line *line = v4l2_get_subdevdata(sd);
823 struct v4l2_mbus_framefmt *format;
825 format = __ispif_get_format(line, cfg, fmt->pad, fmt->which);
826 if (format == NULL)
827 return -EINVAL;
829 fmt->format = *format;
831 return 0;
835 * ispif_set_format - Handle set format by pads subdev method
836 * @sd: ISPIF V4L2 subdevice
837 * @cfg: V4L2 subdev pad configuration
838 * @fmt: pointer to v4l2 subdev format structure
840 * Return -EINVAL or zero on success
842 static int ispif_set_format(struct v4l2_subdev *sd,
843 struct v4l2_subdev_pad_config *cfg,
844 struct v4l2_subdev_format *fmt)
846 struct ispif_line *line = v4l2_get_subdevdata(sd);
847 struct v4l2_mbus_framefmt *format;
849 format = __ispif_get_format(line, cfg, fmt->pad, fmt->which);
850 if (format == NULL)
851 return -EINVAL;
853 ispif_try_format(line, cfg, fmt->pad, &fmt->format, fmt->which);
854 *format = fmt->format;
856 /* Propagate the format from sink to source */
857 if (fmt->pad == MSM_ISPIF_PAD_SINK) {
858 format = __ispif_get_format(line, cfg, MSM_ISPIF_PAD_SRC,
859 fmt->which);
861 *format = fmt->format;
862 ispif_try_format(line, cfg, MSM_ISPIF_PAD_SRC, format,
863 fmt->which);
866 return 0;
870 * ispif_init_formats - Initialize formats on all pads
871 * @sd: ISPIF V4L2 subdevice
872 * @fh: V4L2 subdev file handle
874 * Initialize all pad formats with default values.
876 * Return 0 on success or a negative error code otherwise
878 static int ispif_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
880 struct v4l2_subdev_format format = {
881 .pad = MSM_ISPIF_PAD_SINK,
882 .which = fh ? V4L2_SUBDEV_FORMAT_TRY :
883 V4L2_SUBDEV_FORMAT_ACTIVE,
884 .format = {
885 .code = MEDIA_BUS_FMT_UYVY8_2X8,
886 .width = 1920,
887 .height = 1080
891 return ispif_set_format(sd, fh ? fh->pad : NULL, &format);
895 * msm_ispif_subdev_init - Initialize ISPIF device structure and resources
896 * @ispif: ISPIF device
897 * @res: ISPIF module resources table
899 * Return 0 on success or a negative error code otherwise
901 int msm_ispif_subdev_init(struct ispif_device *ispif,
902 const struct resources_ispif *res)
904 struct device *dev = to_device(ispif);
905 struct platform_device *pdev = to_platform_device(dev);
906 struct resource *r;
907 int i;
908 int ret;
910 /* Memory */
912 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res->reg[0]);
913 ispif->base = devm_ioremap_resource(dev, r);
914 if (IS_ERR(ispif->base)) {
915 dev_err(dev, "could not map memory\n");
916 return PTR_ERR(ispif->base);
919 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res->reg[1]);
920 ispif->base_clk_mux = devm_ioremap_resource(dev, r);
921 if (IS_ERR(ispif->base_clk_mux)) {
922 dev_err(dev, "could not map memory\n");
923 return PTR_ERR(ispif->base_clk_mux);
926 /* Interrupt */
928 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res->interrupt);
930 if (!r) {
931 dev_err(dev, "missing IRQ\n");
932 return -EINVAL;
935 ispif->irq = r->start;
936 snprintf(ispif->irq_name, sizeof(ispif->irq_name), "%s_%s",
937 dev_name(dev), MSM_ISPIF_NAME);
938 ret = devm_request_irq(dev, ispif->irq, ispif_isr,
939 IRQF_TRIGGER_RISING, ispif->irq_name, ispif);
940 if (ret < 0) {
941 dev_err(dev, "request_irq failed: %d\n", ret);
942 return ret;
945 /* Clocks */
947 ispif->nclocks = 0;
948 while (res->clock[ispif->nclocks])
949 ispif->nclocks++;
951 ispif->clock = devm_kzalloc(dev, ispif->nclocks * sizeof(*ispif->clock),
952 GFP_KERNEL);
953 if (!ispif->clock)
954 return -ENOMEM;
956 for (i = 0; i < ispif->nclocks; i++) {
957 struct camss_clock *clock = &ispif->clock[i];
959 clock->clk = devm_clk_get(dev, res->clock[i]);
960 if (IS_ERR(clock->clk))
961 return PTR_ERR(clock->clk);
963 clock->freq = NULL;
964 clock->nfreqs = 0;
967 ispif->nclocks_for_reset = 0;
968 while (res->clock_for_reset[ispif->nclocks_for_reset])
969 ispif->nclocks_for_reset++;
971 ispif->clock_for_reset = devm_kzalloc(dev, ispif->nclocks_for_reset *
972 sizeof(*ispif->clock_for_reset), GFP_KERNEL);
973 if (!ispif->clock_for_reset)
974 return -ENOMEM;
976 for (i = 0; i < ispif->nclocks_for_reset; i++) {
977 struct camss_clock *clock = &ispif->clock_for_reset[i];
979 clock->clk = devm_clk_get(dev, res->clock_for_reset[i]);
980 if (IS_ERR(clock->clk))
981 return PTR_ERR(clock->clk);
983 clock->freq = NULL;
984 clock->nfreqs = 0;
987 for (i = 0; i < ARRAY_SIZE(ispif->line); i++)
988 ispif->line[i].id = i;
990 mutex_init(&ispif->power_lock);
991 ispif->power_count = 0;
993 mutex_init(&ispif->config_lock);
995 init_completion(&ispif->reset_complete);
997 return 0;
1001 * ispif_get_intf - Get ISPIF interface to use by VFE line id
1002 * @line_id: VFE line id that the ISPIF line is connected to
1004 * Return ISPIF interface to use
1006 static enum ispif_intf ispif_get_intf(enum vfe_line_id line_id)
1008 switch (line_id) {
1009 case (VFE_LINE_RDI0):
1010 return RDI0;
1011 case (VFE_LINE_RDI1):
1012 return RDI1;
1013 case (VFE_LINE_RDI2):
1014 return RDI2;
1015 case (VFE_LINE_PIX):
1016 return PIX0;
1017 default:
1018 return RDI0;
1023 * ispif_link_setup - Setup ISPIF connections
1024 * @entity: Pointer to media entity structure
1025 * @local: Pointer to local pad
1026 * @remote: Pointer to remote pad
1027 * @flags: Link flags
1029 * Return 0 on success
1031 static int ispif_link_setup(struct media_entity *entity,
1032 const struct media_pad *local,
1033 const struct media_pad *remote, u32 flags)
1035 if (flags & MEDIA_LNK_FL_ENABLED) {
1036 if (media_entity_remote_pad(local))
1037 return -EBUSY;
1039 if (local->flags & MEDIA_PAD_FL_SINK) {
1040 struct v4l2_subdev *sd;
1041 struct ispif_line *line;
1043 sd = media_entity_to_v4l2_subdev(entity);
1044 line = v4l2_get_subdevdata(sd);
1046 msm_csid_get_csid_id(remote->entity, &line->csid_id);
1047 } else { /* MEDIA_PAD_FL_SOURCE */
1048 struct v4l2_subdev *sd;
1049 struct ispif_line *line;
1050 enum vfe_line_id id;
1052 sd = media_entity_to_v4l2_subdev(entity);
1053 line = v4l2_get_subdevdata(sd);
1055 msm_vfe_get_vfe_id(remote->entity, &line->vfe_id);
1056 msm_vfe_get_vfe_line_id(remote->entity, &id);
1057 line->interface = ispif_get_intf(id);
1061 return 0;
1064 static const struct v4l2_subdev_core_ops ispif_core_ops = {
1065 .s_power = ispif_set_power,
1068 static const struct v4l2_subdev_video_ops ispif_video_ops = {
1069 .s_stream = ispif_set_stream,
1072 static const struct v4l2_subdev_pad_ops ispif_pad_ops = {
1073 .enum_mbus_code = ispif_enum_mbus_code,
1074 .enum_frame_size = ispif_enum_frame_size,
1075 .get_fmt = ispif_get_format,
1076 .set_fmt = ispif_set_format,
1079 static const struct v4l2_subdev_ops ispif_v4l2_ops = {
1080 .core = &ispif_core_ops,
1081 .video = &ispif_video_ops,
1082 .pad = &ispif_pad_ops,
1085 static const struct v4l2_subdev_internal_ops ispif_v4l2_internal_ops = {
1086 .open = ispif_init_formats,
1089 static const struct media_entity_operations ispif_media_ops = {
1090 .link_setup = ispif_link_setup,
1091 .link_validate = v4l2_subdev_link_validate,
1095 * msm_ispif_register_entities - Register subdev node for ISPIF module
1096 * @ispif: ISPIF device
1097 * @v4l2_dev: V4L2 device
1099 * Return 0 on success or a negative error code otherwise
1101 int msm_ispif_register_entities(struct ispif_device *ispif,
1102 struct v4l2_device *v4l2_dev)
1104 struct device *dev = to_device(ispif);
1105 int ret;
1106 int i;
1108 for (i = 0; i < ARRAY_SIZE(ispif->line); i++) {
1109 struct v4l2_subdev *sd = &ispif->line[i].subdev;
1110 struct media_pad *pads = ispif->line[i].pads;
1112 v4l2_subdev_init(sd, &ispif_v4l2_ops);
1113 sd->internal_ops = &ispif_v4l2_internal_ops;
1114 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1115 snprintf(sd->name, ARRAY_SIZE(sd->name), "%s%d",
1116 MSM_ISPIF_NAME, i);
1117 v4l2_set_subdevdata(sd, &ispif->line[i]);
1119 ret = ispif_init_formats(sd, NULL);
1120 if (ret < 0) {
1121 dev_err(dev, "Failed to init format: %d\n", ret);
1122 goto error;
1125 pads[MSM_ISPIF_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
1126 pads[MSM_ISPIF_PAD_SRC].flags = MEDIA_PAD_FL_SOURCE;
1128 sd->entity.function = MEDIA_ENT_F_IO_V4L;
1129 sd->entity.ops = &ispif_media_ops;
1130 ret = media_entity_pads_init(&sd->entity, MSM_ISPIF_PADS_NUM,
1131 pads);
1132 if (ret < 0) {
1133 dev_err(dev, "Failed to init media entity: %d\n", ret);
1134 goto error;
1137 ret = v4l2_device_register_subdev(v4l2_dev, sd);
1138 if (ret < 0) {
1139 dev_err(dev, "Failed to register subdev: %d\n", ret);
1140 media_entity_cleanup(&sd->entity);
1141 goto error;
1145 return 0;
1147 error:
1148 for (i--; i >= 0; i--) {
1149 struct v4l2_subdev *sd = &ispif->line[i].subdev;
1151 v4l2_device_unregister_subdev(sd);
1152 media_entity_cleanup(&sd->entity);
1155 return ret;
1159 * msm_ispif_unregister_entities - Unregister ISPIF module subdev node
1160 * @ispif: ISPIF device
1162 void msm_ispif_unregister_entities(struct ispif_device *ispif)
1164 int i;
1166 mutex_destroy(&ispif->power_lock);
1167 mutex_destroy(&ispif->config_lock);
1169 for (i = 0; i < ARRAY_SIZE(ispif->line); i++) {
1170 struct v4l2_subdev *sd = &ispif->line[i].subdev;
1172 v4l2_device_unregister_subdev(sd);
1173 media_entity_cleanup(&sd->entity);