1 menu "RAM/ROM/Flash chip drivers"
5 tristate "Detect flash chips by Common Flash Interface (CFI) probe"
9 The Common Flash Interface specification was developed by Intel,
10 AMD and other flash manufactures that provides a universal method
11 for probing the capabilities of flash devices. If you wish to
12 support any device that is CFI-compliant, you need to enable this
13 option. Visit <http://www.amd.com/products/nvd/overview/cfi.html>
14 for more information on CFI.
17 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
21 This option enables JEDEC-style probing of flash chips which are not
22 compatible with the Common Flash Interface, but will use the common
23 CFI-targeted flash drivers for any chips which are identified which
24 are in fact compatible in all but the probe method. This actually
25 covers most AMD/Fujitsu-compatible chips and also non-CFI
31 config MTD_CFI_ADV_OPTIONS
32 bool "Flash chip driver advanced configuration options"
33 depends on MTD_GEN_PROBE
35 If you need to specify a specific endianness for access to flash
36 chips, or if you wish to reduce the size of the kernel by including
37 support for only specific arrangements of flash chips, say 'Y'. This
38 option does not directly affect the code, but will enable other
39 configuration options which allow you to do so.
44 prompt "Flash cmd/query data swapping"
45 depends on MTD_CFI_ADV_OPTIONS
46 default MTD_CFI_NOSWAP
48 This option defines the way in which the CPU attempts to arrange
49 data bits when writing the 'magic' commands to the chips. Saying
50 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
51 enabled, means that the CPU will not do any swapping; the chips
52 are expected to be wired to the CPU in 'host-endian' form.
53 Specific arrangements are possible with the BIG_ENDIAN_BYTE and
54 LITTLE_ENDIAN_BYTE, if the bytes are reversed.
59 config MTD_CFI_BE_BYTE_SWAP
60 bool "BIG_ENDIAN_BYTE"
62 config MTD_CFI_LE_BYTE_SWAP
63 bool "LITTLE_ENDIAN_BYTE"
67 config MTD_CFI_GEOMETRY
68 bool "Specific CFI Flash geometry selection"
69 depends on MTD_CFI_ADV_OPTIONS
70 select MTD_MAP_BANK_WIDTH_1 if !(MTD_MAP_BANK_WIDTH_2 || \
71 MTD_MAP_BANK_WIDTH_4 || MTD_MAP_BANK_WIDTH_8 || \
72 MTD_MAP_BANK_WIDTH_16 || MTD_MAP_BANK_WIDTH_32)
73 select MTD_CFI_I1 if !(MTD_CFI_I2 || MTD_CFI_I4 || MTD_CFI_I8)
75 This option does not affect the code directly, but will enable
76 some other configuration options which would allow you to reduce
77 the size of the kernel by including support for only certain
78 arrangements of CFI chips. If unsure, say 'N' and all options
79 which are supported by the current code will be enabled.
81 config MTD_MAP_BANK_WIDTH_1
82 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
85 If you wish to support CFI devices on a physical bus which is
88 config MTD_MAP_BANK_WIDTH_2
89 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
92 If you wish to support CFI devices on a physical bus which is
93 16 bits wide, say 'Y'.
95 config MTD_MAP_BANK_WIDTH_4
96 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
99 If you wish to support CFI devices on a physical bus which is
100 32 bits wide, say 'Y'.
102 config MTD_MAP_BANK_WIDTH_8
103 bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
106 If you wish to support CFI devices on a physical bus which is
107 64 bits wide, say 'Y'.
109 config MTD_MAP_BANK_WIDTH_16
110 bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
113 If you wish to support CFI devices on a physical bus which is
114 128 bits wide, say 'Y'.
116 config MTD_MAP_BANK_WIDTH_32
117 bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
118 select MTD_COMPLEX_MAPPINGS if HAS_IOMEM
121 If you wish to support CFI devices on a physical bus which is
122 256 bits wide, say 'Y'.
125 bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
128 If your flash chips are not interleaved - i.e. you only have one
129 flash chip addressed by each bus cycle, then say 'Y'.
132 bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
135 If your flash chips are interleaved in pairs - i.e. you have two
136 flash chips addressed by each bus cycle, then say 'Y'.
139 bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
142 If your flash chips are interleaved in fours - i.e. you have four
143 flash chips addressed by each bus cycle, then say 'Y'.
146 bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
149 If your flash chips are interleaved in eights - i.e. you have eight
150 flash chips addressed by each bus cycle, then say 'Y'.
153 bool "Protection Registers aka one-time programmable (OTP) bits"
154 depends on MTD_CFI_ADV_OPTIONS
157 This enables support for reading, writing and locking so called
158 "Protection Registers" present on some flash chips.
159 A subset of them are pre-programmed at the factory with a
160 unique set of values. The rest is user-programmable.
162 The user-programmable Protection Registers contain one-time
163 programmable (OTP) bits; when programmed, register bits cannot be
164 erased. Each Protection Register can be accessed multiple times to
165 program individual bits, as long as the register remains unlocked.
167 Each Protection Register has an associated Lock Register bit. When a
168 Lock Register bit is programmed, the associated Protection Register
169 can only be read; it can no longer be programmed. Additionally,
170 because the Lock Register bits themselves are OTP, when programmed,
171 Lock Register bits cannot be erased. Therefore, when a Protection
172 Register is locked, it cannot be unlocked.
174 This feature should therefore be used with extreme care. Any mistake
175 in the programming of OTP bits will waste them.
177 config MTD_CFI_INTELEXT
178 tristate "Support for CFI command set 0001 (Intel/Sharp chips)"
179 depends on MTD_GEN_PROBE
182 The Common Flash Interface defines a number of different command
183 sets which a CFI-compliant chip may claim to implement. This code
184 provides support for command set 0001, used on Intel StrataFlash
187 config MTD_CFI_AMDSTD
188 tristate "Support for CFI command set 0002 (AMD/Fujitsu/Spansion chips)"
189 depends on MTD_GEN_PROBE
192 The Common Flash Interface defines a number of different command
193 sets which a CFI-compliant chip may claim to implement. This code
194 provides support for command set 0002, used on chips including
198 tristate "Support for CFI command set 0020 (ST (Advanced Architecture) chips)"
199 depends on MTD_GEN_PROBE
202 The Common Flash Interface defines a number of different command
203 sets which a CFI-compliant chip may claim to implement. This code
204 provides support for command set 0020.
210 tristate "Support for RAM chips in bus mapping"
212 This option enables basic support for RAM chips accessed through
213 a bus mapping driver.
216 tristate "Support for ROM chips in bus mapping"
218 This option enables basic support for ROM chips accessed through
219 a bus mapping driver.
222 tristate "Support for absent chips in bus mapping"
224 This option enables support for a dummy probing driver used to
225 allocated placeholder MTD devices on systems that have socketed
226 or removable media. Use of this driver as a fallback chip probe
227 preserves the expected registration order of MTD device nodes on
228 the system regardless of media presence. Device nodes created
229 with this driver will return -ENODEV upon access.
232 bool "XIP aware MTD support"
233 depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && ARCH_MTD_XIP
234 default y if XIP_KERNEL
236 This allows MTD support to work with flash memory which is also
237 used for XIP purposes. If you're not sure what this is all about