drivers/mtd/nand/r852.c

   1 /*
   2  * Copyright © 2009 - Maxim Levitsky
   3  * driver for Ricoh xD readers
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/workqueue.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>
  16 #include <linux/pci_ids.h>
  17 #include <linux/delay.h>
  18 #include <linux/slab.h>
  19 #include <asm/byteorder.h>
  20 #include <linux/sched.h>
  21 #include "sm_common.h"
  22 #include "r852.h"
  23
  24
  25 static bool r852_enable_dma = 1;
  26 module_param(r852_enable_dma, bool, S_IRUGO);
  27 MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)");
  28
  29 static int debug;
  30 module_param(debug, int, S_IRUGO | S_IWUSR);
  31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
  32
  33 /* read register */
  34 static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
  35 {
  36         uint8_t reg = readb(dev->mmio + address);
  37         return reg;
  38 }
  39
  40 /* write register */
  41 static inline void r852_write_reg(struct r852_device *dev,
  42                                                 int address, uint8_t value)
  43 {
  44         writeb(value, dev->mmio + address);
  45         mmiowb();
  46 }
  47
  48
  49 /* read dword sized register */
  50 static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
  51 {
  52         uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
  53         return reg;
  54 }
  55
  56 /* write dword sized register */
  57 static inline void r852_write_reg_dword(struct r852_device *dev,
  58                                                         int address, uint32_t value)
  59 {
  60         writel(cpu_to_le32(value), dev->mmio + address);
  61         mmiowb();
  62 }
  63
  64 /* returns pointer to our private structure */
  65 static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
  66 {
  67         struct nand_chip *chip = mtd_to_nand(mtd);
  68         return nand_get_controller_data(chip);
  69 }
  70
  71
  72 /* check if controller supports dma */
  73 static void r852_dma_test(struct r852_device *dev)
  74 {
  75         dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
  76                 (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
  77
  78         if (!dev->dma_usable)
  79                 message("Non dma capable device detected, dma disabled");
  80
  81         if (!r852_enable_dma) {
  82                 message("disabling dma on user request");
  83                 dev->dma_usable = 0;
  84         }
  85 }
  86
  87 /*
  88  * Enable dma. Enables ether first or second stage of the DMA,
  89  * Expects dev->dma_dir and dev->dma_state be set
  90  */
  91 static void r852_dma_enable(struct r852_device *dev)
  92 {
  93         uint8_t dma_reg, dma_irq_reg;
  94
  95         /* Set up dma settings */
  96         dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
  97         dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
  98
  99         if (dev->dma_dir)
 100                 dma_reg |= R852_DMA_READ;
 101
 102         if (dev->dma_state == DMA_INTERNAL) {
 103                 dma_reg |= R852_DMA_INTERNAL;
 104                 /* Precaution to make sure HW doesn't write */
 105                         /* to random kernel memory */
 106                 r852_write_reg_dword(dev, R852_DMA_ADDR,
 107                         cpu_to_le32(dev->phys_bounce_buffer));
 108         } else {
 109                 dma_reg |= R852_DMA_MEMORY;
 110                 r852_write_reg_dword(dev, R852_DMA_ADDR,
 111                         cpu_to_le32(dev->phys_dma_addr));
 112         }
 113
 114         /* Precaution: make sure write reached the device */
 115         r852_read_reg_dword(dev, R852_DMA_ADDR);
 116
 117         r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
 118
 119         /* Set dma irq */
 120         dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
 121         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
 122                 dma_irq_reg |
 123                 R852_DMA_IRQ_INTERNAL |
 124                 R852_DMA_IRQ_ERROR |
 125                 R852_DMA_IRQ_MEMORY);
 126 }
 127
 128 /*
 129  * Disable dma, called from the interrupt handler, which specifies
 130  * success of the operation via 'error' argument
 131  */
 132 static void r852_dma_done(struct r852_device *dev, int error)
 133 {
 134         WARN_ON(dev->dma_stage == 0);
 135
 136         r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
 137                         r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
 138
 139         r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
 140         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
 141
 142         /* Precaution to make sure HW doesn't write to random kernel memory */
 143         r852_write_reg_dword(dev, R852_DMA_ADDR,
 144                 cpu_to_le32(dev->phys_bounce_buffer));
 145         r852_read_reg_dword(dev, R852_DMA_ADDR);
 146
 147         dev->dma_error = error;
 148         dev->dma_stage = 0;
 149
 150         if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
 151                 pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN,
 152                         dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
 153 }
 154
 155 /*
 156  * Wait, till dma is done, which includes both phases of it
 157  */
 158 static int r852_dma_wait(struct r852_device *dev)
 159 {
 160         long timeout = wait_for_completion_timeout(&dev->dma_done,
 161                                 msecs_to_jiffies(1000));
 162         if (!timeout) {
 163                 dbg("timeout waiting for DMA interrupt");
 164                 return -ETIMEDOUT;
 165         }
 166
 167         return 0;
 168 }
 169
 170 /*
 171  * Read/Write one page using dma. Only pages can be read (512 bytes)
 172 */
 173 static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
 174 {
 175         int bounce = 0;
 176         unsigned long flags;
 177         int error;
 178
 179         dev->dma_error = 0;
 180
 181         /* Set dma direction */
 182         dev->dma_dir = do_read;
 183         dev->dma_stage = 1;
 184         reinit_completion(&dev->dma_done);
 185
 186         dbg_verbose("doing dma %s ", do_read ? "read" : "write");
 187
 188         /* Set initial dma state: for reading first fill on board buffer,
 189           from device, for writes first fill the buffer  from memory*/
 190         dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
 191
 192         /* if incoming buffer is not page aligned, we should do bounce */
 193         if ((unsigned long)buf & (R852_DMA_LEN-1))
 194                 bounce = 1;
 195
 196         if (!bounce) {
 197                 dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void *)buf,
 198                         R852_DMA_LEN,
 199                         (do_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE));
 200
 201                 if (pci_dma_mapping_error(dev->pci_dev, dev->phys_dma_addr))
 202                         bounce = 1;
 203         }
 204
 205         if (bounce) {
 206                 dbg_verbose("dma: using bounce buffer");
 207                 dev->phys_dma_addr = dev->phys_bounce_buffer;
 208                 if (!do_read)
 209                         memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
 210         }
 211
 212         /* Enable DMA */
 213         spin_lock_irqsave(&dev->irqlock, flags);
 214         r852_dma_enable(dev);
 215         spin_unlock_irqrestore(&dev->irqlock, flags);
 216
 217         /* Wait till complete */
 218         error = r852_dma_wait(dev);
 219
 220         if (error) {
 221                 r852_dma_done(dev, error);
 222                 return;
 223         }
 224
 225         if (do_read && bounce)
 226                 memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
 227 }
 228
 229 /*
 230  * Program data lines of the nand chip to send data to it
 231  */
 232 static void r852_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 233 {
 234         struct r852_device *dev = r852_get_dev(mtd);
 235         uint32_t reg;
 236
 237         /* Don't allow any access to hardware if we suspect card removal */
 238         if (dev->card_unstable)
 239                 return;
 240
 241         /* Special case for whole sector read */
 242         if (len == R852_DMA_LEN && dev->dma_usable) {
 243                 r852_do_dma(dev, (uint8_t *)buf, 0);
 244                 return;
 245         }
 246
 247         /* write DWORD chinks - faster */
 248         while (len >= 4) {
 249                 reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
 250                 r852_write_reg_dword(dev, R852_DATALINE, reg);
 251                 buf += 4;
 252                 len -= 4;
 253
 254         }
 255
 256         /* write rest */
 257         while (len > 0) {
 258                 r852_write_reg(dev, R852_DATALINE, *buf++);
 259                 len--;
 260         }
 261 }
 262
 263 /*
 264  * Read data lines of the nand chip to retrieve data
 265  */
 266 static void r852_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 267 {
 268         struct r852_device *dev = r852_get_dev(mtd);
 269         uint32_t reg;
 270
 271         if (dev->card_unstable) {
 272                 /* since we can't signal error here, at least, return
 273                         predictable buffer */
 274                 memset(buf, 0, len);
 275                 return;
 276         }
 277
 278         /* special case for whole sector read */
 279         if (len == R852_DMA_LEN && dev->dma_usable) {
 280                 r852_do_dma(dev, buf, 1);
 281                 return;
 282         }
 283
 284         /* read in dword sized chunks */
 285         while (len >= 4) {
 286
 287                 reg = r852_read_reg_dword(dev, R852_DATALINE);
 288                 *buf++ = reg & 0xFF;
 289                 *buf++ = (reg >> 8) & 0xFF;
 290                 *buf++ = (reg >> 16) & 0xFF;
 291                 *buf++ = (reg >> 24) & 0xFF;
 292                 len -= 4;
 293         }
 294
 295         /* read the reset by bytes */
 296         while (len--)
 297                 *buf++ = r852_read_reg(dev, R852_DATALINE);
 298 }
 299
 300 /*
 301  * Read one byte from nand chip
 302  */
 303 static uint8_t r852_read_byte(struct mtd_info *mtd)
 304 {
 305         struct r852_device *dev = r852_get_dev(mtd);
 306
 307         /* Same problem as in r852_read_buf.... */
 308         if (dev->card_unstable)
 309                 return 0;
 310
 311         return r852_read_reg(dev, R852_DATALINE);
 312 }
 313
 314 /*
 315  * Control several chip lines & send commands
 316  */
 317 static void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl)
 318 {
 319         struct r852_device *dev = r852_get_dev(mtd);
 320
 321         if (dev->card_unstable)
 322                 return;
 323
 324         if (ctrl & NAND_CTRL_CHANGE) {
 325
 326                 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
 327                                  R852_CTL_ON | R852_CTL_CARDENABLE);
 328
 329                 if (ctrl & NAND_ALE)
 330                         dev->ctlreg |= R852_CTL_DATA;
 331
 332                 if (ctrl & NAND_CLE)
 333                         dev->ctlreg |= R852_CTL_COMMAND;
 334
 335                 if (ctrl & NAND_NCE)
 336                         dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
 337                 else
 338                         dev->ctlreg &= ~R852_CTL_WRITE;
 339
 340                 /* when write is stareted, enable write access */
 341                 if (dat == NAND_CMD_ERASE1)
 342                         dev->ctlreg |= R852_CTL_WRITE;
 343
 344                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 345         }
 346
 347          /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
 348                 to set write mode */
 349         if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
 350                 dev->ctlreg |= R852_CTL_WRITE;
 351                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 352         }
 353
 354         if (dat != NAND_CMD_NONE)
 355                 r852_write_reg(dev, R852_DATALINE, dat);
 356 }
 357
 358 /*
 359  * Wait till card is ready.
 360  * based on nand_wait, but returns errors on DMA error
 361  */
 362 static int r852_wait(struct mtd_info *mtd, struct nand_chip *chip)
 363 {
 364         struct r852_device *dev = nand_get_controller_data(chip);
 365
 366         unsigned long timeout;
 367         u8 status;
 368
 369         timeout = jiffies + (chip->state == FL_ERASING ?
 370                 msecs_to_jiffies(400) : msecs_to_jiffies(20));
 371
 372         while (time_before(jiffies, timeout))
 373                 if (chip->dev_ready(mtd))
 374                         break;
 375
 376         nand_status_op(chip, &status);
 377
 378         /* Unfortunelly, no way to send detailed error status... */
 379         if (dev->dma_error) {
 380                 status |= NAND_STATUS_FAIL;
 381                 dev->dma_error = 0;
 382         }
 383         return status;
 384 }
 385
 386 /*
 387  * Check if card is ready
 388  */
 389
 390 static int r852_ready(struct mtd_info *mtd)
 391 {
 392         struct r852_device *dev = r852_get_dev(mtd);
 393         return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
 394 }
 395
 396
 397 /*
 398  * Set ECC engine mode
 399 */
 400
 401 static void r852_ecc_hwctl(struct mtd_info *mtd, int mode)
 402 {
 403         struct r852_device *dev = r852_get_dev(mtd);
 404
 405         if (dev->card_unstable)
 406                 return;
 407
 408         switch (mode) {
 409         case NAND_ECC_READ:
 410         case NAND_ECC_WRITE:
 411                 /* enable ecc generation/check*/
 412                 dev->ctlreg |= R852_CTL_ECC_ENABLE;
 413
 414                 /* flush ecc buffer */
 415                 r852_write_reg(dev, R852_CTL,
 416                         dev->ctlreg | R852_CTL_ECC_ACCESS);
 417
 418                 r852_read_reg_dword(dev, R852_DATALINE);
 419                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 420                 return;
 421
 422         case NAND_ECC_READSYN:
 423                 /* disable ecc generation */
 424                 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
 425                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 426         }
 427 }
 428
 429 /*
 430  * Calculate ECC, only used for writes
 431  */
 432
 433 static int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
 434                                                         uint8_t *ecc_code)
 435 {
 436         struct r852_device *dev = r852_get_dev(mtd);
 437         struct sm_oob *oob = (struct sm_oob *)ecc_code;
 438         uint32_t ecc1, ecc2;
 439
 440         if (dev->card_unstable)
 441                 return 0;
 442
 443         dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
 444         r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
 445
 446         ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
 447         ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
 448
 449         oob->ecc1[0] = (ecc1) & 0xFF;
 450         oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
 451         oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
 452
 453         oob->ecc2[0] = (ecc2) & 0xFF;
 454         oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
 455         oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
 456
 457         r852_write_reg(dev, R852_CTL, dev->ctlreg);
 458         return 0;
 459 }
 460
 461 /*
 462  * Correct the data using ECC, hw did almost everything for us
 463  */
 464
 465 static int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
 466                                 uint8_t *read_ecc, uint8_t *calc_ecc)
 467 {
 468         uint32_t ecc_reg;
 469         uint8_t ecc_status, err_byte;
 470         int i, error = 0;
 471
 472         struct r852_device *dev = r852_get_dev(mtd);
 473
 474         if (dev->card_unstable)
 475                 return 0;
 476
 477         if (dev->dma_error) {
 478                 dev->dma_error = 0;
 479                 return -EIO;
 480         }
 481
 482         r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
 483         ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
 484         r852_write_reg(dev, R852_CTL, dev->ctlreg);
 485
 486         for (i = 0 ; i <= 1 ; i++) {
 487
 488                 ecc_status = (ecc_reg >> 8) & 0xFF;
 489
 490                 /* ecc uncorrectable error */
 491                 if (ecc_status & R852_ECC_FAIL) {
 492                         dbg("ecc: unrecoverable error, in half %d", i);
 493                         error = -EBADMSG;
 494                         goto exit;
 495                 }
 496
 497                 /* correctable error */
 498                 if (ecc_status & R852_ECC_CORRECTABLE) {
 499
 500                         err_byte = ecc_reg & 0xFF;
 501                         dbg("ecc: recoverable error, "
 502                                 "in half %d, byte %d, bit %d", i,
 503                                 err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
 504
 505                         dat[err_byte] ^=
 506                                 1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
 507                         error++;
 508                 }
 509
 510                 dat += 256;
 511                 ecc_reg >>= 16;
 512         }
 513 exit:
 514         return error;
 515 }
 516
 517 /*
 518  * This is copy of nand_read_oob_std
 519  * nand_read_oob_syndrome assumes we can send column address - we can't
 520  */
 521 static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
 522                              int page)
 523 {
 524         return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);
 525 }
 526
 527 /*
 528  * Start the nand engine
 529  */
 530
 531 static void r852_engine_enable(struct r852_device *dev)
 532 {
 533         if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
 534                 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
 535                 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
 536         } else {
 537                 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
 538                 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
 539         }
 540         msleep(300);
 541         r852_write_reg(dev, R852_CTL, 0);
 542 }
 543
 544
 545 /*
 546  * Stop the nand engine
 547  */
 548
 549 static void r852_engine_disable(struct r852_device *dev)
 550 {
 551         r852_write_reg_dword(dev, R852_HW, 0);
 552         r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
 553 }
 554
 555 /*
 556  * Test if card is present
 557  */
 558
 559 static void r852_card_update_present(struct r852_device *dev)
 560 {
 561         unsigned long flags;
 562         uint8_t reg;
 563
 564         spin_lock_irqsave(&dev->irqlock, flags);
 565         reg = r852_read_reg(dev, R852_CARD_STA);
 566         dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
 567         spin_unlock_irqrestore(&dev->irqlock, flags);
 568 }
 569
 570 /*
 571  * Update card detection IRQ state according to current card state
 572  * which is read in r852_card_update_present
 573  */
 574 static void r852_update_card_detect(struct r852_device *dev)
 575 {
 576         int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
 577         dev->card_unstable = 0;
 578
 579         card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
 580         card_detect_reg |= R852_CARD_IRQ_GENABLE;
 581
 582         card_detect_reg |= dev->card_detected ?
 583                 R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
 584
 585         r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
 586 }
 587
 588 static ssize_t r852_media_type_show(struct device *sys_dev,
 589                         struct device_attribute *attr, char *buf)
 590 {
 591         struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
 592         struct r852_device *dev = r852_get_dev(mtd);
 593         char *data = dev->sm ? "smartmedia" : "xd";
 594
 595         strcpy(buf, data);
 596         return strlen(data);
 597 }
 598
 599 static DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL);
 600
 601
 602 /* Detect properties of card in slot */
 603 static void r852_update_media_status(struct r852_device *dev)
 604 {
 605         uint8_t reg;
 606         unsigned long flags;
 607         int readonly;
 608
 609         spin_lock_irqsave(&dev->irqlock, flags);
 610         if (!dev->card_detected) {
 611                 message("card removed");
 612                 spin_unlock_irqrestore(&dev->irqlock, flags);
 613                 return ;
 614         }
 615
 616         readonly  = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
 617         reg = r852_read_reg(dev, R852_DMA_CAP);
 618         dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
 619
 620         message("detected %s %s card in slot",
 621                 dev->sm ? "SmartMedia" : "xD",
 622                 readonly ? "readonly" : "writeable");
 623
 624         dev->readonly = readonly;
 625         spin_unlock_irqrestore(&dev->irqlock, flags);
 626 }
 627
 628 /*
 629  * Register the nand device
 630  * Called when the card is detected
 631  */
 632 static int r852_register_nand_device(struct r852_device *dev)
 633 {
 634         struct mtd_info *mtd = nand_to_mtd(dev->chip);
 635
 636         WARN_ON(dev->card_registred);
 637
 638         mtd->dev.parent = &dev->pci_dev->dev;
 639
 640         if (dev->readonly)
 641                 dev->chip->options |= NAND_ROM;
 642
 643         r852_engine_enable(dev);
 644
 645         if (sm_register_device(mtd, dev->sm))
 646                 goto error1;
 647
 648         if (device_create_file(&mtd->dev, &dev_attr_media_type)) {
 649                 message("can't create media type sysfs attribute");
 650                 goto error3;
 651         }
 652
 653         dev->card_registred = 1;
 654         return 0;
 655 error3:
 656         nand_release(mtd);
 657 error1:
 658         /* Force card redetect */
 659         dev->card_detected = 0;
 660         return -1;
 661 }
 662
 663 /*
 664  * Unregister the card
 665  */
 666
 667 static void r852_unregister_nand_device(struct r852_device *dev)
 668 {
 669         struct mtd_info *mtd = nand_to_mtd(dev->chip);
 670
 671         if (!dev->card_registred)
 672                 return;
 673
 674         device_remove_file(&mtd->dev, &dev_attr_media_type);
 675         nand_release(mtd);
 676         r852_engine_disable(dev);
 677         dev->card_registred = 0;
 678 }
 679
 680 /* Card state updater */
 681 static void r852_card_detect_work(struct work_struct *work)
 682 {
 683         struct r852_device *dev =
 684                 container_of(work, struct r852_device, card_detect_work.work);
 685
 686         r852_card_update_present(dev);
 687         r852_update_card_detect(dev);
 688         dev->card_unstable = 0;
 689
 690         /* False alarm */
 691         if (dev->card_detected == dev->card_registred)
 692                 goto exit;
 693
 694         /* Read media properties */
 695         r852_update_media_status(dev);
 696
 697         /* Register the card */
 698         if (dev->card_detected)
 699                 r852_register_nand_device(dev);
 700         else
 701                 r852_unregister_nand_device(dev);
 702 exit:
 703         r852_update_card_detect(dev);
 704 }
 705
 706 /* Ack + disable IRQ generation */
 707 static void r852_disable_irqs(struct r852_device *dev)
 708 {
 709         uint8_t reg;
 710         reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
 711         r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
 712
 713         reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
 714         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
 715                                         reg & ~R852_DMA_IRQ_MASK);
 716
 717         r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
 718         r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
 719 }
 720
 721 /* Interrupt handler */
 722 static irqreturn_t r852_irq(int irq, void *data)
 723 {
 724         struct r852_device *dev = (struct r852_device *)data;
 725
 726         uint8_t card_status, dma_status;
 727         unsigned long flags;
 728         irqreturn_t ret = IRQ_NONE;
 729
 730         spin_lock_irqsave(&dev->irqlock, flags);
 731
 732         /* handle card detection interrupts first */
 733         card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
 734         r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
 735
 736         if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
 737
 738                 ret = IRQ_HANDLED;
 739                 dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
 740
 741                 /* we shouldn't receive any interrupts if we wait for card
 742                         to settle */
 743                 WARN_ON(dev->card_unstable);
 744
 745                 /* disable irqs while card is unstable */
 746                 /* this will timeout DMA if active, but better that garbage */
 747                 r852_disable_irqs(dev);
 748
 749                 if (dev->card_unstable)
 750                         goto out;
 751
 752                 /* let, card state to settle a bit, and then do the work */
 753                 dev->card_unstable = 1;
 754                 queue_delayed_work(dev->card_workqueue,
 755                         &dev->card_detect_work, msecs_to_jiffies(100));
 756                 goto out;
 757         }
 758
 759
 760         /* Handle dma interrupts */
 761         dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
 762         r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
 763
 764         if (dma_status & R852_DMA_IRQ_MASK) {
 765
 766                 ret = IRQ_HANDLED;
 767
 768                 if (dma_status & R852_DMA_IRQ_ERROR) {
 769                         dbg("received dma error IRQ");
 770                         r852_dma_done(dev, -EIO);
 771                         complete(&dev->dma_done);
 772                         goto out;
 773                 }
 774
 775                 /* received DMA interrupt out of nowhere? */
 776                 WARN_ON_ONCE(dev->dma_stage == 0);
 777
 778                 if (dev->dma_stage == 0)
 779                         goto out;
 780
 781                 /* done device access */
 782                 if (dev->dma_state == DMA_INTERNAL &&
 783                                 (dma_status & R852_DMA_IRQ_INTERNAL)) {
 784
 785                         dev->dma_state = DMA_MEMORY;
 786                         dev->dma_stage++;
 787                 }
 788
 789                 /* done memory DMA */
 790                 if (dev->dma_state == DMA_MEMORY &&
 791                                 (dma_status & R852_DMA_IRQ_MEMORY)) {
 792                         dev->dma_state = DMA_INTERNAL;
 793                         dev->dma_stage++;
 794                 }
 795
 796                 /* Enable 2nd half of dma dance */
 797                 if (dev->dma_stage == 2)
 798                         r852_dma_enable(dev);
 799
 800                 /* Operation done */
 801                 if (dev->dma_stage == 3) {
 802                         r852_dma_done(dev, 0);
 803                         complete(&dev->dma_done);
 804                 }
 805                 goto out;
 806         }
 807
 808         /* Handle unknown interrupts */
 809         if (dma_status)
 810                 dbg("bad dma IRQ status = %x", dma_status);
 811
 812         if (card_status & ~R852_CARD_STA_CD)
 813                 dbg("strange card status = %x", card_status);
 814
 815 out:
 816         spin_unlock_irqrestore(&dev->irqlock, flags);
 817         return ret;
 818 }
 819
 820 static int  r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
 821 {
 822         int error;
 823         struct nand_chip *chip;
 824         struct r852_device *dev;
 825
 826         /* pci initialization */
 827         error = pci_enable_device(pci_dev);
 828
 829         if (error)
 830                 goto error1;
 831
 832         pci_set_master(pci_dev);
 833
 834         error = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
 835         if (error)
 836                 goto error2;
 837
 838         error = pci_request_regions(pci_dev, DRV_NAME);
 839
 840         if (error)
 841                 goto error3;
 842
 843         error = -ENOMEM;
 844
 845         /* init nand chip, but register it only on card insert */
 846         chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
 847
 848         if (!chip)
 849                 goto error4;
 850
 851         /* commands */
 852         chip->cmd_ctrl = r852_cmdctl;
 853         chip->waitfunc = r852_wait;
 854         chip->dev_ready = r852_ready;
 855
 856         /* I/O */
 857         chip->read_byte = r852_read_byte;
 858         chip->read_buf = r852_read_buf;
 859         chip->write_buf = r852_write_buf;
 860
 861         /* ecc */
 862         chip->ecc.mode = NAND_ECC_HW_SYNDROME;
 863         chip->ecc.size = R852_DMA_LEN;
 864         chip->ecc.bytes = SM_OOB_SIZE;
 865         chip->ecc.strength = 2;
 866         chip->ecc.hwctl = r852_ecc_hwctl;
 867         chip->ecc.calculate = r852_ecc_calculate;
 868         chip->ecc.correct = r852_ecc_correct;
 869
 870         /* TODO: hack */
 871         chip->ecc.read_oob = r852_read_oob;
 872
 873         /* init our device structure */
 874         dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
 875
 876         if (!dev)
 877                 goto error5;
 878
 879         nand_set_controller_data(chip, dev);
 880         dev->chip = chip;
 881         dev->pci_dev = pci_dev;
 882         pci_set_drvdata(pci_dev, dev);
 883
 884         dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN,
 885                 &dev->phys_bounce_buffer);
 886
 887         if (!dev->bounce_buffer)
 888                 goto error6;
 889
 890
 891         error = -ENODEV;
 892         dev->mmio = pci_ioremap_bar(pci_dev, 0);
 893
 894         if (!dev->mmio)
 895                 goto error7;
 896
 897         error = -ENOMEM;
 898         dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
 899
 900         if (!dev->tmp_buffer)
 901                 goto error8;
 902
 903         init_completion(&dev->dma_done);
 904
 905         dev->card_workqueue = create_freezable_workqueue(DRV_NAME);
 906
 907         if (!dev->card_workqueue)
 908                 goto error9;
 909
 910         INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
 911
 912         /* shutdown everything - precation */
 913         r852_engine_disable(dev);
 914         r852_disable_irqs(dev);
 915
 916         r852_dma_test(dev);
 917
 918         dev->irq = pci_dev->irq;
 919         spin_lock_init(&dev->irqlock);
 920
 921         dev->card_detected = 0;
 922         r852_card_update_present(dev);
 923
 924         /*register irq handler*/
 925         error = -ENODEV;
 926         if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
 927                           DRV_NAME, dev))
 928                 goto error10;
 929
 930         /* kick initial present test */
 931         queue_delayed_work(dev->card_workqueue,
 932                 &dev->card_detect_work, 0);
 933
 934
 935         printk(KERN_NOTICE DRV_NAME ": driver loaded successfully\n");
 936         return 0;
 937
 938 error10:
 939         destroy_workqueue(dev->card_workqueue);
 940 error9:
 941         kfree(dev->tmp_buffer);
 942 error8:
 943         pci_iounmap(pci_dev, dev->mmio);
 944 error7:
 945         pci_free_consistent(pci_dev, R852_DMA_LEN,
 946                 dev->bounce_buffer, dev->phys_bounce_buffer);
 947 error6:
 948         kfree(dev);
 949 error5:
 950         kfree(chip);
 951 error4:
 952         pci_release_regions(pci_dev);
 953 error3:
 954 error2:
 955         pci_disable_device(pci_dev);
 956 error1:
 957         return error;
 958 }
 959
 960 static void r852_remove(struct pci_dev *pci_dev)
 961 {
 962         struct r852_device *dev = pci_get_drvdata(pci_dev);
 963
 964         /* Stop detect workqueue -
 965                 we are going to unregister the device anyway*/
 966         cancel_delayed_work_sync(&dev->card_detect_work);
 967         destroy_workqueue(dev->card_workqueue);
 968
 969         /* Unregister the device, this might make more IO */
 970         r852_unregister_nand_device(dev);
 971
 972         /* Stop interrupts */
 973         r852_disable_irqs(dev);
 974         free_irq(dev->irq, dev);
 975
 976         /* Cleanup */
 977         kfree(dev->tmp_buffer);
 978         pci_iounmap(pci_dev, dev->mmio);
 979         pci_free_consistent(pci_dev, R852_DMA_LEN,
 980                 dev->bounce_buffer, dev->phys_bounce_buffer);
 981
 982         kfree(dev->chip);
 983         kfree(dev);
 984
 985         /* Shutdown the PCI device */
 986         pci_release_regions(pci_dev);
 987         pci_disable_device(pci_dev);
 988 }
 989
 990 static void r852_shutdown(struct pci_dev *pci_dev)
 991 {
 992         struct r852_device *dev = pci_get_drvdata(pci_dev);
 993
 994         cancel_delayed_work_sync(&dev->card_detect_work);
 995         r852_disable_irqs(dev);
 996         synchronize_irq(dev->irq);
 997         pci_disable_device(pci_dev);
 998 }
 999
1000 #ifdef CONFIG_PM_SLEEP
1001 static int r852_suspend(struct device *device)
1002 {
1003         struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1004
1005         if (dev->ctlreg & R852_CTL_CARDENABLE)
1006                 return -EBUSY;
1007
1008         /* First make sure the detect work is gone */
1009         cancel_delayed_work_sync(&dev->card_detect_work);
1010
1011         /* Turn off the interrupts and stop the device */
1012         r852_disable_irqs(dev);
1013         r852_engine_disable(dev);
1014
1015         /* If card was pulled off just during the suspend, which is very
1016                 unlikely, we will remove it on resume, it too late now
1017                 anyway... */
1018         dev->card_unstable = 0;
1019         return 0;
1020 }
1021
1022 static int r852_resume(struct device *device)
1023 {
1024         struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1025         struct mtd_info *mtd = nand_to_mtd(dev->chip);
1026
1027         r852_disable_irqs(dev);
1028         r852_card_update_present(dev);
1029         r852_engine_disable(dev);
1030
1031
1032         /* If card status changed, just do the work */
1033         if (dev->card_detected != dev->card_registred) {
1034                 dbg("card was %s during low power state",
1035                         dev->card_detected ? "added" : "removed");
1036
1037                 queue_delayed_work(dev->card_workqueue,
1038                 &dev->card_detect_work, msecs_to_jiffies(1000));
1039                 return 0;
1040         }
1041
1042         /* Otherwise, initialize the card */
1043         if (dev->card_registred) {
1044                 r852_engine_enable(dev);
1045                 dev->chip->select_chip(mtd, 0);
1046                 nand_reset_op(dev->chip);
1047                 dev->chip->select_chip(mtd, -1);
1048         }
1049
1050         /* Program card detection IRQ */
1051         r852_update_card_detect(dev);
1052         return 0;
1053 }
1054 #endif
1055
1056 static const struct pci_device_id r852_pci_id_tbl[] = {
1057
1058         { PCI_VDEVICE(RICOH, 0x0852), },
1059         { },
1060 };
1061
1062 MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
1063
1064 static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
1065
1066 static struct pci_driver r852_pci_driver = {
1067         .name           = DRV_NAME,
1068         .id_table       = r852_pci_id_tbl,
1069         .probe          = r852_probe,
1070         .remove         = r852_remove,
1071         .shutdown       = r852_shutdown,
1072         .driver.pm      = &r852_pm_ops,
1073 };
1074
1075 module_pci_driver(r852_pci_driver);
1076
1077 MODULE_LICENSE("GPL");
1078 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
1079 MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");