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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / net / ethernet / atheros / atl1c / atl1c_main.c
blob94270f654b3b534b88ed3296f7556de0186de123
1 /*
2 * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22 #include "atl1c.h"
23
24 #define ATL1C_DRV_VERSION "1.0.1.1-NAPI"
25 char atl1c_driver_name[] = "atl1c";
26 char atl1c_driver_version[] = ATL1C_DRV_VERSION;
27
28 /*
29 * atl1c_pci_tbl - PCI Device ID Table
30 *
31 * Wildcard entries (PCI_ANY_ID) should come last
32 * Last entry must be all 0s
33 *
34 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
35 * Class, Class Mask, private data (not used) }
36 */
37 static const struct pci_device_id atl1c_pci_tbl[] = {
38 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
41 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
42 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
43 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
44 /* required last entry */
45 { 0 }
46 };
47 MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
48
49 MODULE_AUTHOR("Jie Yang");
50 MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
51 MODULE_DESCRIPTION("Qualcomm Atheros 100/1000M Ethernet Network Driver");
52 MODULE_LICENSE("GPL");
53 MODULE_VERSION(ATL1C_DRV_VERSION);
54
55 static int atl1c_stop_mac(struct atl1c_hw *hw);
56 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
57 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
58 static void atl1c_start_mac(struct atl1c_adapter *adapter);
59 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
60 int *work_done, int work_to_do);
61 static int atl1c_up(struct atl1c_adapter *adapter);
62 static void atl1c_down(struct atl1c_adapter *adapter);
63 static int atl1c_reset_mac(struct atl1c_hw *hw);
64 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
65 static int atl1c_configure(struct atl1c_adapter *adapter);
66 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter);
67
68
69 static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
70 NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
71 static void atl1c_pcie_patch(struct atl1c_hw *hw)
72 {
73 u32 mst_data, data;
74
75 /* pclk sel could switch to 25M */
76 AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
77 mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
78 AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
79
80 /* WoL/PCIE related settings */
81 if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
82 AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
83 data |= PCIE_PHYMISC_FORCE_RCV_DET;
84 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
85 } else { /* new dev set bit5 of MASTER */
86 if (!(mst_data & MASTER_CTRL_WAKEN_25M))
87 AT_WRITE_REG(hw, REG_MASTER_CTRL,
88 mst_data | MASTER_CTRL_WAKEN_25M);
89 }
90 /* aspm/PCIE setting only for l2cb 1.0 */
91 if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
92 AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
93 data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
94 L2CB1_PCIE_PHYMISC2_CDR_BW);
95 data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
96 L2CB1_PCIE_PHYMISC2_L0S_TH);
97 AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
98 /* extend L1 sync timer */
99 AT_READ_REG(hw, REG_LINK_CTRL, &data);
100 data |= LINK_CTRL_EXT_SYNC;
101 AT_WRITE_REG(hw, REG_LINK_CTRL, data);
102 }
103 /* l2cb 1.x & l1d 1.x */
104 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
105 AT_READ_REG(hw, REG_PM_CTRL, &data);
106 data |= PM_CTRL_L0S_BUFSRX_EN;
107 AT_WRITE_REG(hw, REG_PM_CTRL, data);
108 /* clear vendor msg */
109 AT_READ_REG(hw, REG_DMA_DBG, &data);
110 AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
111 }
112 }
113
114 /* FIXME: no need any more ? */
115 /*
116 * atl1c_init_pcie - init PCIE module
117 */
118 static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
119 {
120 u32 data;
121 u32 pci_cmd;
122 struct pci_dev *pdev = hw->adapter->pdev;
123 int pos;
124
125 AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
126 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
127 pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
128 PCI_COMMAND_IO);
129 AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
130
131 /*
132 * Clear any PowerSaveing Settings
133 */
134 pci_enable_wake(pdev, PCI_D3hot, 0);
135 pci_enable_wake(pdev, PCI_D3cold, 0);
136 /* wol sts read-clear */
137 AT_READ_REG(hw, REG_WOL_CTRL, &data);
138 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
139
140 /*
141 * Mask some pcie error bits
142 */
143 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
144 if (pos) {
145 pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
146 data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
147 pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
148 }
149 /* clear error status */
150 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA,
151 PCI_EXP_DEVSTA_NFED |
152 PCI_EXP_DEVSTA_FED |
153 PCI_EXP_DEVSTA_CED |
154 PCI_EXP_DEVSTA_URD);
155
156 AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
157 data &= ~LTSSM_ID_EN_WRO;
158 AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
159
160 atl1c_pcie_patch(hw);
161 if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
162 atl1c_disable_l0s_l1(hw);
163
164 msleep(5);
165 }
166
167 /**
168 * atl1c_irq_enable - Enable default interrupt generation settings
169 * @adapter: board private structure
170 */
171 static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
172 {
173 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
174 AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
175 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
176 AT_WRITE_FLUSH(&adapter->hw);
177 }
178 }
179
180 /**
181 * atl1c_irq_disable - Mask off interrupt generation on the NIC
182 * @adapter: board private structure
183 */
184 static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
185 {
186 atomic_inc(&adapter->irq_sem);
187 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
188 AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
189 AT_WRITE_FLUSH(&adapter->hw);
190 synchronize_irq(adapter->pdev->irq);
191 }
192
193 /**
194 * atl1c_irq_reset - reset interrupt confiure on the NIC
195 * @adapter: board private structure
196 */
197 static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
198 {
199 atomic_set(&adapter->irq_sem, 1);
200 atl1c_irq_enable(adapter);
201 }
202
203 /*
204 * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
205 * of the idle status register until the device is actually idle
206 */
207 static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
208 {
209 int timeout;
210 u32 data;
211
212 for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
213 AT_READ_REG(hw, REG_IDLE_STATUS, &data);
214 if ((data & modu_ctrl) == 0)
215 return 0;
216 msleep(1);
217 }
218 return data;
219 }
220
221 /**
222 * atl1c_phy_config - Timer Call-back
223 * @data: pointer to netdev cast into an unsigned long
224 */
225 static void atl1c_phy_config(struct timer_list *t)
226 {
227 struct atl1c_adapter *adapter = from_timer(adapter, t,
228 phy_config_timer);
229 struct atl1c_hw *hw = &adapter->hw;
230 unsigned long flags;
231
232 spin_lock_irqsave(&adapter->mdio_lock, flags);
233 atl1c_restart_autoneg(hw);
234 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
235 }
236
237 void atl1c_reinit_locked(struct atl1c_adapter *adapter)
238 {
239 WARN_ON(in_interrupt());
240 atl1c_down(adapter);
241 atl1c_up(adapter);
242 clear_bit(__AT_RESETTING, &adapter->flags);
243 }
244
245 static void atl1c_check_link_status(struct atl1c_adapter *adapter)
246 {
247 struct atl1c_hw *hw = &adapter->hw;
248 struct net_device *netdev = adapter->netdev;
249 struct pci_dev *pdev = adapter->pdev;
250 int err;
251 unsigned long flags;
252 u16 speed, duplex, phy_data;
253
254 spin_lock_irqsave(&adapter->mdio_lock, flags);
255 /* MII_BMSR must read twise */
256 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
257 atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
258 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
259
260 if ((phy_data & BMSR_LSTATUS) == 0) {
261 /* link down */
262 netif_carrier_off(netdev);
263 hw->hibernate = true;
264 if (atl1c_reset_mac(hw) != 0)
265 if (netif_msg_hw(adapter))
266 dev_warn(&pdev->dev, "reset mac failed\n");
267 atl1c_set_aspm(hw, SPEED_0);
268 atl1c_post_phy_linkchg(hw, SPEED_0);
269 atl1c_reset_dma_ring(adapter);
270 atl1c_configure(adapter);
271 } else {
272 /* Link Up */
273 hw->hibernate = false;
274 spin_lock_irqsave(&adapter->mdio_lock, flags);
275 err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
276 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
277 if (unlikely(err))
278 return;
279 /* link result is our setting */
280 if (adapter->link_speed != speed ||
281 adapter->link_duplex != duplex) {
282 adapter->link_speed = speed;
283 adapter->link_duplex = duplex;
284 atl1c_set_aspm(hw, speed);
285 atl1c_post_phy_linkchg(hw, speed);
286 atl1c_start_mac(adapter);
287 if (netif_msg_link(adapter))
288 dev_info(&pdev->dev,
289 "%s: %s NIC Link is Up<%d Mbps %s>\n",
290 atl1c_driver_name, netdev->name,
291 adapter->link_speed,
292 adapter->link_duplex == FULL_DUPLEX ?
293 "Full Duplex" : "Half Duplex");
294 }
295 if (!netif_carrier_ok(netdev))
296 netif_carrier_on(netdev);
297 }
298 }
299
300 static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
301 {
302 struct net_device *netdev = adapter->netdev;
303 struct pci_dev *pdev = adapter->pdev;
304 u16 phy_data;
305 u16 link_up;
306
307 spin_lock(&adapter->mdio_lock);
308 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
309 atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
310 spin_unlock(&adapter->mdio_lock);
311 link_up = phy_data & BMSR_LSTATUS;
312 /* notify upper layer link down ASAP */
313 if (!link_up) {
314 if (netif_carrier_ok(netdev)) {
315 /* old link state: Up */
316 netif_carrier_off(netdev);
317 if (netif_msg_link(adapter))
318 dev_info(&pdev->dev,
319 "%s: %s NIC Link is Down\n",
320 atl1c_driver_name, netdev->name);
321 adapter->link_speed = SPEED_0;
322 }
323 }
324
325 set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
326 schedule_work(&adapter->common_task);
327 }
328
329 static void atl1c_common_task(struct work_struct *work)
330 {
331 struct atl1c_adapter *adapter;
332 struct net_device *netdev;
333
334 adapter = container_of(work, struct atl1c_adapter, common_task);
335 netdev = adapter->netdev;
336
337 if (test_bit(__AT_DOWN, &adapter->flags))
338 return;
339
340 if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
341 netif_device_detach(netdev);
342 atl1c_down(adapter);
343 atl1c_up(adapter);
344 netif_device_attach(netdev);
345 }
346
347 if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
348 &adapter->work_event)) {
349 atl1c_irq_disable(adapter);
350 atl1c_check_link_status(adapter);
351 atl1c_irq_enable(adapter);
352 }
353 }
354
355
356 static void atl1c_del_timer(struct atl1c_adapter *adapter)
357 {
358 del_timer_sync(&adapter->phy_config_timer);
359 }
360
361
362 /**
363 * atl1c_tx_timeout - Respond to a Tx Hang
364 * @netdev: network interface device structure
365 */
366 static void atl1c_tx_timeout(struct net_device *netdev)
367 {
368 struct atl1c_adapter *adapter = netdev_priv(netdev);
369
370 /* Do the reset outside of interrupt context */
371 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
372 schedule_work(&adapter->common_task);
373 }
374
375 /**
376 * atl1c_set_multi - Multicast and Promiscuous mode set
377 * @netdev: network interface device structure
378 *
379 * The set_multi entry point is called whenever the multicast address
380 * list or the network interface flags are updated. This routine is
381 * responsible for configuring the hardware for proper multicast,
382 * promiscuous mode, and all-multi behavior.
383 */
384 static void atl1c_set_multi(struct net_device *netdev)
385 {
386 struct atl1c_adapter *adapter = netdev_priv(netdev);
387 struct atl1c_hw *hw = &adapter->hw;
388 struct netdev_hw_addr *ha;
389 u32 mac_ctrl_data;
390 u32 hash_value;
391
392 /* Check for Promiscuous and All Multicast modes */
393 AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
394
395 if (netdev->flags & IFF_PROMISC) {
396 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
397 } else if (netdev->flags & IFF_ALLMULTI) {
398 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
399 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
400 } else {
401 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
402 }
403
404 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
405
406 /* clear the old settings from the multicast hash table */
407 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
408 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
409
410 /* comoute mc addresses' hash value ,and put it into hash table */
411 netdev_for_each_mc_addr(ha, netdev) {
412 hash_value = atl1c_hash_mc_addr(hw, ha->addr);
413 atl1c_hash_set(hw, hash_value);
414 }
415 }
416
417 static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
418 {
419 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
420 /* enable VLAN tag insert/strip */
421 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
422 } else {
423 /* disable VLAN tag insert/strip */
424 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
425 }
426 }
427
428 static void atl1c_vlan_mode(struct net_device *netdev,
429 netdev_features_t features)
430 {
431 struct atl1c_adapter *adapter = netdev_priv(netdev);
432 struct pci_dev *pdev = adapter->pdev;
433 u32 mac_ctrl_data = 0;
434
435 if (netif_msg_pktdata(adapter))
436 dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
437
438 atl1c_irq_disable(adapter);
439 AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
440 __atl1c_vlan_mode(features, &mac_ctrl_data);
441 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
442 atl1c_irq_enable(adapter);
443 }
444
445 static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
446 {
447 struct pci_dev *pdev = adapter->pdev;
448
449 if (netif_msg_pktdata(adapter))
450 dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
451 atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
452 }
453
454 /**
455 * atl1c_set_mac - Change the Ethernet Address of the NIC
456 * @netdev: network interface device structure
457 * @p: pointer to an address structure
458 *
459 * Returns 0 on success, negative on failure
460 */
461 static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
462 {
463 struct atl1c_adapter *adapter = netdev_priv(netdev);
464 struct sockaddr *addr = p;
465
466 if (!is_valid_ether_addr(addr->sa_data))
467 return -EADDRNOTAVAIL;
468
469 if (netif_running(netdev))
470 return -EBUSY;
471
472 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
473 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
474
475 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
476
477 return 0;
478 }
479
480 static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
481 struct net_device *dev)
482 {
483 unsigned int head_size;
484 int mtu = dev->mtu;
485
486 adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
487 roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
488
489 head_size = SKB_DATA_ALIGN(adapter->rx_buffer_len + NET_SKB_PAD) +
490 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
491 adapter->rx_frag_size = roundup_pow_of_two(head_size);
492 }
493
494 static netdev_features_t atl1c_fix_features(struct net_device *netdev,
495 netdev_features_t features)
496 {
497 /*
498 * Since there is no support for separate rx/tx vlan accel
499 * enable/disable make sure tx flag is always in same state as rx.
500 */
501 if (features & NETIF_F_HW_VLAN_CTAG_RX)
502 features |= NETIF_F_HW_VLAN_CTAG_TX;
503 else
504 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
505
506 if (netdev->mtu > MAX_TSO_FRAME_SIZE)
507 features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
508
509 return features;
510 }
511
512 static int atl1c_set_features(struct net_device *netdev,
513 netdev_features_t features)
514 {
515 netdev_features_t changed = netdev->features ^ features;
516
517 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
518 atl1c_vlan_mode(netdev, features);
519
520 return 0;
521 }
522
523 static void atl1c_set_max_mtu(struct net_device *netdev)
524 {
525 struct atl1c_adapter *adapter = netdev_priv(netdev);
526 struct atl1c_hw *hw = &adapter->hw;
527
528 switch (hw->nic_type) {
529 /* These (GbE) devices support jumbo packets, max_mtu 6122 */
530 case athr_l1c:
531 case athr_l1d:
532 case athr_l1d_2:
533 netdev->max_mtu = MAX_JUMBO_FRAME_SIZE -
534 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
535 break;
536 /* The 10/100 devices don't support jumbo packets, max_mtu 1500 */
537 default:
538 netdev->max_mtu = ETH_DATA_LEN;
539 break;
540 }
541 }
542
543 /**
544 * atl1c_change_mtu - Change the Maximum Transfer Unit
545 * @netdev: network interface device structure
546 * @new_mtu: new value for maximum frame size
547 *
548 * Returns 0 on success, negative on failure
549 */
550 static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
551 {
552 struct atl1c_adapter *adapter = netdev_priv(netdev);
553
554 /* set MTU */
555 if (netif_running(netdev)) {
556 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
557 msleep(1);
558 netdev->mtu = new_mtu;
559 adapter->hw.max_frame_size = new_mtu;
560 atl1c_set_rxbufsize(adapter, netdev);
561 atl1c_down(adapter);
562 netdev_update_features(netdev);
563 atl1c_up(adapter);
564 clear_bit(__AT_RESETTING, &adapter->flags);
565 }
566 return 0;
567 }
568
569 /*
570 * caller should hold mdio_lock
571 */
572 static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
573 {
574 struct atl1c_adapter *adapter = netdev_priv(netdev);
575 u16 result;
576
577 atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
578 return result;
579 }
580
581 static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
582 int reg_num, int val)
583 {
584 struct atl1c_adapter *adapter = netdev_priv(netdev);
585
586 atl1c_write_phy_reg(&adapter->hw, reg_num, val);
587 }
588
589 static int atl1c_mii_ioctl(struct net_device *netdev,
590 struct ifreq *ifr, int cmd)
591 {
592 struct atl1c_adapter *adapter = netdev_priv(netdev);
593 struct pci_dev *pdev = adapter->pdev;
594 struct mii_ioctl_data *data = if_mii(ifr);
595 unsigned long flags;
596 int retval = 0;
597
598 if (!netif_running(netdev))
599 return -EINVAL;
600
601 spin_lock_irqsave(&adapter->mdio_lock, flags);
602 switch (cmd) {
603 case SIOCGMIIPHY:
604 data->phy_id = 0;
605 break;
606
607 case SIOCGMIIREG:
608 if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
609 &data->val_out)) {
610 retval = -EIO;
611 goto out;
612 }
613 break;
614
615 case SIOCSMIIREG:
616 if (data->reg_num & ~(0x1F)) {
617 retval = -EFAULT;
618 goto out;
619 }
620
621 dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
622 data->reg_num, data->val_in);
623 if (atl1c_write_phy_reg(&adapter->hw,
624 data->reg_num, data->val_in)) {
625 retval = -EIO;
626 goto out;
627 }
628 break;
629
630 default:
631 retval = -EOPNOTSUPP;
632 break;
633 }
634 out:
635 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
636 return retval;
637 }
638
639 static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
640 {
641 switch (cmd) {
642 case SIOCGMIIPHY:
643 case SIOCGMIIREG:
644 case SIOCSMIIREG:
645 return atl1c_mii_ioctl(netdev, ifr, cmd);
646 default:
647 return -EOPNOTSUPP;
648 }
649 }
650
651 /**
652 * atl1c_alloc_queues - Allocate memory for all rings
653 * @adapter: board private structure to initialize
654 *
655 */
656 static int atl1c_alloc_queues(struct atl1c_adapter *adapter)
657 {
658 return 0;
659 }
660
661 static void atl1c_set_mac_type(struct atl1c_hw *hw)
662 {
663 switch (hw->device_id) {
664 case PCI_DEVICE_ID_ATTANSIC_L2C:
665 hw->nic_type = athr_l2c;
666 break;
667 case PCI_DEVICE_ID_ATTANSIC_L1C:
668 hw->nic_type = athr_l1c;
669 break;
670 case PCI_DEVICE_ID_ATHEROS_L2C_B:
671 hw->nic_type = athr_l2c_b;
672 break;
673 case PCI_DEVICE_ID_ATHEROS_L2C_B2:
674 hw->nic_type = athr_l2c_b2;
675 break;
676 case PCI_DEVICE_ID_ATHEROS_L1D:
677 hw->nic_type = athr_l1d;
678 break;
679 case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
680 hw->nic_type = athr_l1d_2;
681 break;
682 default:
683 break;
684 }
685 }
686
687 static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
688 {
689 u32 link_ctrl_data;
690
691 atl1c_set_mac_type(hw);
692 AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
693
694 hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
695 ATL1C_TXQ_MODE_ENHANCE;
696 hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
697 ATL1C_ASPM_L1_SUPPORT;
698 hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
699
700 if (hw->nic_type == athr_l1c ||
701 hw->nic_type == athr_l1d ||
702 hw->nic_type == athr_l1d_2)
703 hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
704 return 0;
705 }
706
707 struct atl1c_platform_patch {
708 u16 pci_did;
709 u8 pci_revid;
710 u16 subsystem_vid;
711 u16 subsystem_did;
712 u32 patch_flag;
713 #define ATL1C_LINK_PATCH 0x1
714 };
715 static const struct atl1c_platform_patch plats[] = {
716 {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
717 {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
718 {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
719 {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
720 {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
721 {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
722 {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
723 {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
724 {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
725 {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
726 {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
727 {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
728 {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
729 {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
730 {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
731 {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
732 {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
733 {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
734 {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
735 {0},
736 };
737
738 static void atl1c_patch_assign(struct atl1c_hw *hw)
739 {
740 struct pci_dev *pdev = hw->adapter->pdev;
741 u32 misc_ctrl;
742 int i = 0;
743
744 hw->msi_lnkpatch = false;
745
746 while (plats[i].pci_did != 0) {
747 if (plats[i].pci_did == hw->device_id &&
748 plats[i].pci_revid == hw->revision_id &&
749 plats[i].subsystem_vid == hw->subsystem_vendor_id &&
750 plats[i].subsystem_did == hw->subsystem_id) {
751 if (plats[i].patch_flag & ATL1C_LINK_PATCH)
752 hw->msi_lnkpatch = true;
753 }
754 i++;
755 }
756
757 if (hw->device_id == PCI_DEVICE_ID_ATHEROS_L2C_B2 &&
758 hw->revision_id == L2CB_V21) {
759 /* config access mode */
760 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
761 REG_PCIE_DEV_MISC_CTRL);
762 pci_read_config_dword(pdev, REG_PCIE_IND_ACC_DATA, &misc_ctrl);
763 misc_ctrl &= ~0x100;
764 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_ADDR,
765 REG_PCIE_DEV_MISC_CTRL);
766 pci_write_config_dword(pdev, REG_PCIE_IND_ACC_DATA, misc_ctrl);
767 }
768 }
769 /**
770 * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
771 * @adapter: board private structure to initialize
772 *
773 * atl1c_sw_init initializes the Adapter private data structure.
774 * Fields are initialized based on PCI device information and
775 * OS network device settings (MTU size).
776 */
777 static int atl1c_sw_init(struct atl1c_adapter *adapter)
778 {
779 struct atl1c_hw *hw = &adapter->hw;
780 struct pci_dev *pdev = adapter->pdev;
781 u32 revision;
782
783
784 adapter->wol = 0;
785 device_set_wakeup_enable(&pdev->dev, false);
786 adapter->link_speed = SPEED_0;
787 adapter->link_duplex = FULL_DUPLEX;
788 adapter->tpd_ring[0].count = 1024;
789 adapter->rfd_ring.count = 512;
790
791 hw->vendor_id = pdev->vendor;
792 hw->device_id = pdev->device;
793 hw->subsystem_vendor_id = pdev->subsystem_vendor;
794 hw->subsystem_id = pdev->subsystem_device;
795 pci_read_config_dword(pdev, PCI_CLASS_REVISION, &revision);
796 hw->revision_id = revision & 0xFF;
797 /* before link up, we assume hibernate is true */
798 hw->hibernate = true;
799 hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
800 if (atl1c_setup_mac_funcs(hw) != 0) {
801 dev_err(&pdev->dev, "set mac function pointers failed\n");
802 return -1;
803 }
804 atl1c_patch_assign(hw);
805
806 hw->intr_mask = IMR_NORMAL_MASK;
807 hw->phy_configured = false;
808 hw->preamble_len = 7;
809 hw->max_frame_size = adapter->netdev->mtu;
810 hw->autoneg_advertised = ADVERTISED_Autoneg;
811 hw->indirect_tab = 0xE4E4E4E4;
812 hw->base_cpu = 0;
813
814 hw->ict = 50000; /* 100ms */
815 hw->smb_timer = 200000; /* 400ms */
816 hw->rx_imt = 200;
817 hw->tx_imt = 1000;
818
819 hw->tpd_burst = 5;
820 hw->rfd_burst = 8;
821 hw->dma_order = atl1c_dma_ord_out;
822 hw->dmar_block = atl1c_dma_req_1024;
823
824 if (atl1c_alloc_queues(adapter)) {
825 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
826 return -ENOMEM;
827 }
828 /* TODO */
829 atl1c_set_rxbufsize(adapter, adapter->netdev);
830 atomic_set(&adapter->irq_sem, 1);
831 spin_lock_init(&adapter->mdio_lock);
832 set_bit(__AT_DOWN, &adapter->flags);
833
834 return 0;
835 }
836
837 static inline void atl1c_clean_buffer(struct pci_dev *pdev,
838 struct atl1c_buffer *buffer_info)
839 {
840 u16 pci_driection;
841 if (buffer_info->flags & ATL1C_BUFFER_FREE)
842 return;
843 if (buffer_info->dma) {
844 if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
845 pci_driection = PCI_DMA_FROMDEVICE;
846 else
847 pci_driection = PCI_DMA_TODEVICE;
848
849 if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
850 pci_unmap_single(pdev, buffer_info->dma,
851 buffer_info->length, pci_driection);
852 else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
853 pci_unmap_page(pdev, buffer_info->dma,
854 buffer_info->length, pci_driection);
855 }
856 if (buffer_info->skb)
857 dev_consume_skb_any(buffer_info->skb);
858 buffer_info->dma = 0;
859 buffer_info->skb = NULL;
860 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
861 }
862 /**
863 * atl1c_clean_tx_ring - Free Tx-skb
864 * @adapter: board private structure
865 */
866 static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
867 enum atl1c_trans_queue type)
868 {
869 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
870 struct atl1c_buffer *buffer_info;
871 struct pci_dev *pdev = adapter->pdev;
872 u16 index, ring_count;
873
874 ring_count = tpd_ring->count;
875 for (index = 0; index < ring_count; index++) {
876 buffer_info = &tpd_ring->buffer_info[index];
877 atl1c_clean_buffer(pdev, buffer_info);
878 }
879
880 netdev_reset_queue(adapter->netdev);
881
882 /* Zero out Tx-buffers */
883 memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
884 ring_count);
885 atomic_set(&tpd_ring->next_to_clean, 0);
886 tpd_ring->next_to_use = 0;
887 }
888
889 /**
890 * atl1c_clean_rx_ring - Free rx-reservation skbs
891 * @adapter: board private structure
892 */
893 static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
894 {
895 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
896 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
897 struct atl1c_buffer *buffer_info;
898 struct pci_dev *pdev = adapter->pdev;
899 int j;
900
901 for (j = 0; j < rfd_ring->count; j++) {
902 buffer_info = &rfd_ring->buffer_info[j];
903 atl1c_clean_buffer(pdev, buffer_info);
904 }
905 /* zero out the descriptor ring */
906 memset(rfd_ring->desc, 0, rfd_ring->size);
907 rfd_ring->next_to_clean = 0;
908 rfd_ring->next_to_use = 0;
909 rrd_ring->next_to_use = 0;
910 rrd_ring->next_to_clean = 0;
911 }
912
913 /*
914 * Read / Write Ptr Initialize:
915 */
916 static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
917 {
918 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
919 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
920 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
921 struct atl1c_buffer *buffer_info;
922 int i, j;
923
924 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
925 tpd_ring[i].next_to_use = 0;
926 atomic_set(&tpd_ring[i].next_to_clean, 0);
927 buffer_info = tpd_ring[i].buffer_info;
928 for (j = 0; j < tpd_ring->count; j++)
929 ATL1C_SET_BUFFER_STATE(&buffer_info[i],
930 ATL1C_BUFFER_FREE);
931 }
932 rfd_ring->next_to_use = 0;
933 rfd_ring->next_to_clean = 0;
934 rrd_ring->next_to_use = 0;
935 rrd_ring->next_to_clean = 0;
936 for (j = 0; j < rfd_ring->count; j++) {
937 buffer_info = &rfd_ring->buffer_info[j];
938 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
939 }
940 }
941
942 /**
943 * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
944 * @adapter: board private structure
945 *
946 * Free all transmit software resources
947 */
948 static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
949 {
950 struct pci_dev *pdev = adapter->pdev;
951
952 pci_free_consistent(pdev, adapter->ring_header.size,
953 adapter->ring_header.desc,
954 adapter->ring_header.dma);
955 adapter->ring_header.desc = NULL;
956
957 /* Note: just free tdp_ring.buffer_info,
958 * it contain rfd_ring.buffer_info, do not double free */
959 if (adapter->tpd_ring[0].buffer_info) {
960 kfree(adapter->tpd_ring[0].buffer_info);
961 adapter->tpd_ring[0].buffer_info = NULL;
962 }
963 if (adapter->rx_page) {
964 put_page(adapter->rx_page);
965 adapter->rx_page = NULL;
966 }
967 }
968
969 /**
970 * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
971 * @adapter: board private structure
972 *
973 * Return 0 on success, negative on failure
974 */
975 static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
976 {
977 struct pci_dev *pdev = adapter->pdev;
978 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
979 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
980 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
981 struct atl1c_ring_header *ring_header = &adapter->ring_header;
982 int size;
983 int i;
984 int count = 0;
985 int rx_desc_count = 0;
986 u32 offset = 0;
987
988 rrd_ring->count = rfd_ring->count;
989 for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
990 tpd_ring[i].count = tpd_ring[0].count;
991
992 /* 2 tpd queue, one high priority queue,
993 * another normal priority queue */
994 size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
995 rfd_ring->count);
996 tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
997 if (unlikely(!tpd_ring->buffer_info))
998 goto err_nomem;
999
1000 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
1001 tpd_ring[i].buffer_info =
1002 (tpd_ring->buffer_info + count);
1003 count += tpd_ring[i].count;
1004 }
1005
1006 rfd_ring->buffer_info =
1007 (tpd_ring->buffer_info + count);
1008 count += rfd_ring->count;
1009 rx_desc_count += rfd_ring->count;
1010
1011 /*
1012 * real ring DMA buffer
1013 * each ring/block may need up to 8 bytes for alignment, hence the
1014 * additional bytes tacked onto the end.
1015 */
1016 ring_header->size = size =
1017 sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
1018 sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
1019 sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
1020 8 * 4;
1021
1022 ring_header->desc = dma_zalloc_coherent(&pdev->dev, ring_header->size,
1023 &ring_header->dma, GFP_KERNEL);
1024 if (unlikely(!ring_header->desc)) {
1025 dev_err(&pdev->dev, "could not get memory for DMA buffer\n");
1026 goto err_nomem;
1027 }
1028 /* init TPD ring */
1029
1030 tpd_ring[0].dma = roundup(ring_header->dma, 8);
1031 offset = tpd_ring[0].dma - ring_header->dma;
1032 for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
1033 tpd_ring[i].dma = ring_header->dma + offset;
1034 tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
1035 tpd_ring[i].size =
1036 sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
1037 offset += roundup(tpd_ring[i].size, 8);
1038 }
1039 /* init RFD ring */
1040 rfd_ring->dma = ring_header->dma + offset;
1041 rfd_ring->desc = (u8 *) ring_header->desc + offset;
1042 rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
1043 offset += roundup(rfd_ring->size, 8);
1044
1045 /* init RRD ring */
1046 rrd_ring->dma = ring_header->dma + offset;
1047 rrd_ring->desc = (u8 *) ring_header->desc + offset;
1048 rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
1049 rrd_ring->count;
1050 offset += roundup(rrd_ring->size, 8);
1051
1052 return 0;
1053
1054 err_nomem:
1055 kfree(tpd_ring->buffer_info);
1056 return -ENOMEM;
1057 }
1058
1059 static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
1060 {
1061 struct atl1c_hw *hw = &adapter->hw;
1062 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1063 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
1064 struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
1065 adapter->tpd_ring;
1066
1067 /* TPD */
1068 AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
1069 (u32)((tpd_ring[atl1c_trans_normal].dma &
1070 AT_DMA_HI_ADDR_MASK) >> 32));
1071 /* just enable normal priority TX queue */
1072 AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
1073 (u32)(tpd_ring[atl1c_trans_normal].dma &
1074 AT_DMA_LO_ADDR_MASK));
1075 AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
1076 (u32)(tpd_ring[atl1c_trans_high].dma &
1077 AT_DMA_LO_ADDR_MASK));
1078 AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
1079 (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
1080
1081
1082 /* RFD */
1083 AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
1084 (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
1085 AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
1086 (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
1087
1088 AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
1089 rfd_ring->count & RFD_RING_SIZE_MASK);
1090 AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
1091 adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
1092
1093 /* RRD */
1094 AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
1095 (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
1096 AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
1097 (rrd_ring->count & RRD_RING_SIZE_MASK));
1098
1099 if (hw->nic_type == athr_l2c_b) {
1100 AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
1101 AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
1102 AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
1103 AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
1104 AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
1105 AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
1106 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
1107 AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
1108 }
1109 /* Load all of base address above */
1110 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
1111 }
1112
1113 static void atl1c_configure_tx(struct atl1c_adapter *adapter)
1114 {
1115 struct atl1c_hw *hw = &adapter->hw;
1116 int max_pay_load;
1117 u16 tx_offload_thresh;
1118 u32 txq_ctrl_data;
1119
1120 tx_offload_thresh = MAX_TSO_FRAME_SIZE;
1121 AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
1122 (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
1123 max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
1124 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
1125 /*
1126 * if BIOS had changed the dam-read-max-length to an invalid value,
1127 * restore it to default value
1128 */
1129 if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
1130 pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
1131 hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
1132 }
1133 txq_ctrl_data =
1134 hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
1135 L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
1136
1137 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
1138 }
1139
1140 static void atl1c_configure_rx(struct atl1c_adapter *adapter)
1141 {
1142 struct atl1c_hw *hw = &adapter->hw;
1143 u32 rxq_ctrl_data;
1144
1145 rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
1146 RXQ_RFD_BURST_NUM_SHIFT;
1147
1148 if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
1149 rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
1150
1151 /* aspm for gigabit */
1152 if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
1153 rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
1154 ASPM_THRUPUT_LIMIT_100M);
1155
1156 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1157 }
1158
1159 static void atl1c_configure_dma(struct atl1c_adapter *adapter)
1160 {
1161 struct atl1c_hw *hw = &adapter->hw;
1162 u32 dma_ctrl_data;
1163
1164 dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
1165 DMA_CTRL_RREQ_PRI_DATA |
1166 FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
1167 FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
1168 FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
1169
1170 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1171 }
1172
1173 /*
1174 * Stop the mac, transmit and receive units
1175 * hw - Struct containing variables accessed by shared code
1176 * return : 0 or idle status (if error)
1177 */
1178 static int atl1c_stop_mac(struct atl1c_hw *hw)
1179 {
1180 u32 data;
1181
1182 AT_READ_REG(hw, REG_RXQ_CTRL, &data);
1183 data &= ~RXQ_CTRL_EN;
1184 AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
1185
1186 AT_READ_REG(hw, REG_TXQ_CTRL, &data);
1187 data &= ~TXQ_CTRL_EN;
1188 AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
1189
1190 atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
1191
1192 AT_READ_REG(hw, REG_MAC_CTRL, &data);
1193 data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
1194 AT_WRITE_REG(hw, REG_MAC_CTRL, data);
1195
1196 return (int)atl1c_wait_until_idle(hw,
1197 IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
1198 }
1199
1200 static void atl1c_start_mac(struct atl1c_adapter *adapter)
1201 {
1202 struct atl1c_hw *hw = &adapter->hw;
1203 u32 mac, txq, rxq;
1204
1205 hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false;
1206 hw->mac_speed = adapter->link_speed == SPEED_1000 ?
1207 atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
1208
1209 AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
1210 AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
1211 AT_READ_REG(hw, REG_MAC_CTRL, &mac);
1212
1213 txq |= TXQ_CTRL_EN;
1214 rxq |= RXQ_CTRL_EN;
1215 mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
1216 MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
1217 MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
1218 MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
1219 MAC_CTRL_HASH_ALG_CRC32;
1220 if (hw->mac_duplex)
1221 mac |= MAC_CTRL_DUPLX;
1222 else
1223 mac &= ~MAC_CTRL_DUPLX;
1224 mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
1225 mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
1226
1227 AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
1228 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
1229 AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
1230 }
1231
1232 /*
1233 * Reset the transmit and receive units; mask and clear all interrupts.
1234 * hw - Struct containing variables accessed by shared code
1235 * return : 0 or idle status (if error)
1236 */
1237 static int atl1c_reset_mac(struct atl1c_hw *hw)
1238 {
1239 struct atl1c_adapter *adapter = hw->adapter;
1240 struct pci_dev *pdev = adapter->pdev;
1241 u32 ctrl_data = 0;
1242
1243 atl1c_stop_mac(hw);
1244 /*
1245 * Issue Soft Reset to the MAC. This will reset the chip's
1246 * transmit, receive, DMA. It will not effect
1247 * the current PCI configuration. The global reset bit is self-
1248 * clearing, and should clear within a microsecond.
1249 */
1250 AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
1251 ctrl_data |= MASTER_CTRL_OOB_DIS;
1252 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
1253
1254 AT_WRITE_FLUSH(hw);
1255 msleep(10);
1256 /* Wait at least 10ms for All module to be Idle */
1257
1258 if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
1259 dev_err(&pdev->dev,
1260 "MAC state machine can't be idle since"
1261 " disabled for 10ms second\n");
1262 return -1;
1263 }
1264 AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
1265
1266 /* driver control speed/duplex */
1267 AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
1268 AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
1269
1270 /* clk switch setting */
1271 AT_READ_REG(hw, REG_SERDES, &ctrl_data);
1272 switch (hw->nic_type) {
1273 case athr_l2c_b:
1274 ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
1275 SERDES_MAC_CLK_SLOWDOWN);
1276 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1277 break;
1278 case athr_l2c_b2:
1279 case athr_l1d_2:
1280 ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
1281 AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
1282 break;
1283 default:
1284 break;
1285 }
1286
1287 return 0;
1288 }
1289
1290 static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
1291 {
1292 u16 ctrl_flags = hw->ctrl_flags;
1293
1294 hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
1295 atl1c_set_aspm(hw, SPEED_0);
1296 hw->ctrl_flags = ctrl_flags;
1297 }
1298
1299 /*
1300 * Set ASPM state.
1301 * Enable/disable L0s/L1 depend on link state.
1302 */
1303 static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
1304 {
1305 u32 pm_ctrl_data;
1306 u32 link_l1_timer;
1307
1308 AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
1309 pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
1310 PM_CTRL_ASPM_L0S_EN |
1311 PM_CTRL_MAC_ASPM_CHK);
1312 /* L1 timer */
1313 if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1314 pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
1315 link_l1_timer =
1316 link_speed == SPEED_1000 || link_speed == SPEED_100 ?
1317 L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
1318 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1319 L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
1320 } else {
1321 link_l1_timer = hw->nic_type == athr_l2c_b ?
1322 L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
1323 if (link_speed != SPEED_1000 && link_speed != SPEED_100)
1324 link_l1_timer = 1;
1325 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1326 PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
1327 }
1328
1329 /* L0S/L1 enable */
1330 if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
1331 pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
1332 if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
1333 pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
1334
1335 /* l2cb & l1d & l2cb2 & l1d2 */
1336 if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
1337 hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
1338 pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
1339 PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
1340 pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
1341 PM_CTRL_SERDES_PD_EX_L1 |
1342 PM_CTRL_CLK_SWH_L1;
1343 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1344 PM_CTRL_SERDES_PLL_L1_EN |
1345 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1346 PM_CTRL_SA_DLY_EN |
1347 PM_CTRL_HOTRST);
1348 /* disable l0s if link down or l2cb */
1349 if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
1350 pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
1351 } else { /* l1c */
1352 pm_ctrl_data =
1353 FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
1354 if (link_speed != SPEED_0) {
1355 pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
1356 PM_CTRL_SERDES_PLL_L1_EN |
1357 PM_CTRL_SERDES_BUFS_RX_L1_EN;
1358 pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
1359 PM_CTRL_CLK_SWH_L1 |
1360 PM_CTRL_ASPM_L0S_EN |
1361 PM_CTRL_ASPM_L1_EN);
1362 } else { /* link down */
1363 pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
1364 pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
1365 PM_CTRL_SERDES_PLL_L1_EN |
1366 PM_CTRL_SERDES_BUFS_RX_L1_EN |
1367 PM_CTRL_ASPM_L0S_EN);
1368 }
1369 }
1370 AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
1371
1372 return;
1373 }
1374
1375 /**
1376 * atl1c_configure - Configure Transmit&Receive Unit after Reset
1377 * @adapter: board private structure
1378 *
1379 * Configure the Tx /Rx unit of the MAC after a reset.
1380 */
1381 static int atl1c_configure_mac(struct atl1c_adapter *adapter)
1382 {
1383 struct atl1c_hw *hw = &adapter->hw;
1384 u32 master_ctrl_data = 0;
1385 u32 intr_modrt_data;
1386 u32 data;
1387
1388 AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
1389 master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
1390 MASTER_CTRL_RX_ITIMER_EN |
1391 MASTER_CTRL_INT_RDCLR);
1392 /* clear interrupt status */
1393 AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
1394 /* Clear any WOL status */
1395 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1396 /* set Interrupt Clear Timer
1397 * HW will enable self to assert interrupt event to system after
1398 * waiting x-time for software to notify it accept interrupt.
1399 */
1400
1401 data = CLK_GATING_EN_ALL;
1402 if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
1403 if (hw->nic_type == athr_l2c_b)
1404 data &= ~CLK_GATING_RXMAC_EN;
1405 } else
1406 data = 0;
1407 AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
1408
1409 AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
1410 hw->ict & INT_RETRIG_TIMER_MASK);
1411
1412 atl1c_configure_des_ring(adapter);
1413
1414 if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
1415 intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
1416 IRQ_MODRT_TX_TIMER_SHIFT;
1417 intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
1418 IRQ_MODRT_RX_TIMER_SHIFT;
1419 AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
1420 master_ctrl_data |=
1421 MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
1422 }
1423
1424 if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
1425 master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
1426
1427 master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
1428 AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
1429
1430 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
1431 hw->smb_timer & SMB_STAT_TIMER_MASK);
1432
1433 /* set MTU */
1434 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1435 VLAN_HLEN + ETH_FCS_LEN);
1436
1437 atl1c_configure_tx(adapter);
1438 atl1c_configure_rx(adapter);
1439 atl1c_configure_dma(adapter);
1440
1441 return 0;
1442 }
1443
1444 static int atl1c_configure(struct atl1c_adapter *adapter)
1445 {
1446 struct net_device *netdev = adapter->netdev;
1447 int num;
1448
1449 atl1c_init_ring_ptrs(adapter);
1450 atl1c_set_multi(netdev);
1451 atl1c_restore_vlan(adapter);
1452
1453 num = atl1c_alloc_rx_buffer(adapter);
1454 if (unlikely(num == 0))
1455 return -ENOMEM;
1456
1457 if (atl1c_configure_mac(adapter))
1458 return -EIO;
1459
1460 return 0;
1461 }
1462
1463 static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
1464 {
1465 u16 hw_reg_addr = 0;
1466 unsigned long *stats_item = NULL;
1467 u32 data;
1468
1469 /* update rx status */
1470 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1471 stats_item = &adapter->hw_stats.rx_ok;
1472 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1473 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1474 *stats_item += data;
1475 stats_item++;
1476 hw_reg_addr += 4;
1477 }
1478 /* update tx status */
1479 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1480 stats_item = &adapter->hw_stats.tx_ok;
1481 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1482 AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
1483 *stats_item += data;
1484 stats_item++;
1485 hw_reg_addr += 4;
1486 }
1487 }
1488
1489 /**
1490 * atl1c_get_stats - Get System Network Statistics
1491 * @netdev: network interface device structure
1492 *
1493 * Returns the address of the device statistics structure.
1494 * The statistics are actually updated from the timer callback.
1495 */
1496 static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
1497 {
1498 struct atl1c_adapter *adapter = netdev_priv(netdev);
1499 struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
1500 struct net_device_stats *net_stats = &netdev->stats;
1501
1502 atl1c_update_hw_stats(adapter);
1503 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1504 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1505 net_stats->multicast = hw_stats->rx_mcast;
1506 net_stats->collisions = hw_stats->tx_1_col +
1507 hw_stats->tx_2_col +
1508 hw_stats->tx_late_col +
1509 hw_stats->tx_abort_col;
1510
1511 net_stats->rx_errors = hw_stats->rx_frag +
1512 hw_stats->rx_fcs_err +
1513 hw_stats->rx_len_err +
1514 hw_stats->rx_sz_ov +
1515 hw_stats->rx_rrd_ov +
1516 hw_stats->rx_align_err +
1517 hw_stats->rx_rxf_ov;
1518
1519 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1520 net_stats->rx_length_errors = hw_stats->rx_len_err;
1521 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1522 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1523 net_stats->rx_dropped = hw_stats->rx_rrd_ov;
1524
1525 net_stats->tx_errors = hw_stats->tx_late_col +
1526 hw_stats->tx_abort_col +
1527 hw_stats->tx_underrun +
1528 hw_stats->tx_trunc;
1529
1530 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1531 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1532 net_stats->tx_window_errors = hw_stats->tx_late_col;
1533
1534 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1535 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1536
1537 return net_stats;
1538 }
1539
1540 static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
1541 {
1542 u16 phy_data;
1543
1544 spin_lock(&adapter->mdio_lock);
1545 atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
1546 spin_unlock(&adapter->mdio_lock);
1547 }
1548
1549 static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
1550 enum atl1c_trans_queue type)
1551 {
1552 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1553 struct atl1c_buffer *buffer_info;
1554 struct pci_dev *pdev = adapter->pdev;
1555 u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1556 u16 hw_next_to_clean;
1557 u16 reg;
1558 unsigned int total_bytes = 0, total_packets = 0;
1559
1560 reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
1561
1562 AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
1563
1564 while (next_to_clean != hw_next_to_clean) {
1565 buffer_info = &tpd_ring->buffer_info[next_to_clean];
1566 if (buffer_info->skb) {
1567 total_bytes += buffer_info->skb->len;
1568 total_packets++;
1569 }
1570 atl1c_clean_buffer(pdev, buffer_info);
1571 if (++next_to_clean == tpd_ring->count)
1572 next_to_clean = 0;
1573 atomic_set(&tpd_ring->next_to_clean, next_to_clean);
1574 }
1575
1576 netdev_completed_queue(adapter->netdev, total_packets, total_bytes);
1577
1578 if (netif_queue_stopped(adapter->netdev) &&
1579 netif_carrier_ok(adapter->netdev)) {
1580 netif_wake_queue(adapter->netdev);
1581 }
1582
1583 return true;
1584 }
1585
1586 /**
1587 * atl1c_intr - Interrupt Handler
1588 * @irq: interrupt number
1589 * @data: pointer to a network interface device structure
1590 */
1591 static irqreturn_t atl1c_intr(int irq, void *data)
1592 {
1593 struct net_device *netdev = data;
1594 struct atl1c_adapter *adapter = netdev_priv(netdev);
1595 struct pci_dev *pdev = adapter->pdev;
1596 struct atl1c_hw *hw = &adapter->hw;
1597 int max_ints = AT_MAX_INT_WORK;
1598 int handled = IRQ_NONE;
1599 u32 status;
1600 u32 reg_data;
1601
1602 do {
1603 AT_READ_REG(hw, REG_ISR, &reg_data);
1604 status = reg_data & hw->intr_mask;
1605
1606 if (status == 0 || (status & ISR_DIS_INT) != 0) {
1607 if (max_ints != AT_MAX_INT_WORK)
1608 handled = IRQ_HANDLED;
1609 break;
1610 }
1611 /* link event */
1612 if (status & ISR_GPHY)
1613 atl1c_clear_phy_int(adapter);
1614 /* Ack ISR */
1615 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1616 if (status & ISR_RX_PKT) {
1617 if (likely(napi_schedule_prep(&adapter->napi))) {
1618 hw->intr_mask &= ~ISR_RX_PKT;
1619 AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
1620 __napi_schedule(&adapter->napi);
1621 }
1622 }
1623 if (status & ISR_TX_PKT)
1624 atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
1625
1626 handled = IRQ_HANDLED;
1627 /* check if PCIE PHY Link down */
1628 if (status & ISR_ERROR) {
1629 if (netif_msg_hw(adapter))
1630 dev_err(&pdev->dev,
1631 "atl1c hardware error (status = 0x%x)\n",
1632 status & ISR_ERROR);
1633 /* reset MAC */
1634 set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
1635 schedule_work(&adapter->common_task);
1636 return IRQ_HANDLED;
1637 }
1638
1639 if (status & ISR_OVER)
1640 if (netif_msg_intr(adapter))
1641 dev_warn(&pdev->dev,
1642 "TX/RX overflow (status = 0x%x)\n",
1643 status & ISR_OVER);
1644
1645 /* link event */
1646 if (status & (ISR_GPHY | ISR_MANUAL)) {
1647 netdev->stats.tx_carrier_errors++;
1648 atl1c_link_chg_event(adapter);
1649 break;
1650 }
1651
1652 } while (--max_ints > 0);
1653 /* re-enable Interrupt*/
1654 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1655 return handled;
1656 }
1657
1658 static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
1659 struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
1660 {
1661 /*
1662 * The pid field in RRS in not correct sometimes, so we
1663 * cannot figure out if the packet is fragmented or not,
1664 * so we tell the KERNEL CHECKSUM_NONE
1665 */
1666 skb_checksum_none_assert(skb);
1667 }
1668
1669 static struct sk_buff *atl1c_alloc_skb(struct atl1c_adapter *adapter)
1670 {
1671 struct sk_buff *skb;
1672 struct page *page;
1673
1674 if (adapter->rx_frag_size > PAGE_SIZE)
1675 return netdev_alloc_skb(adapter->netdev,
1676 adapter->rx_buffer_len);
1677
1678 page = adapter->rx_page;
1679 if (!page) {
1680 adapter->rx_page = page = alloc_page(GFP_ATOMIC);
1681 if (unlikely(!page))
1682 return NULL;
1683 adapter->rx_page_offset = 0;
1684 }
1685
1686 skb = build_skb(page_address(page) + adapter->rx_page_offset,
1687 adapter->rx_frag_size);
1688 if (likely(skb)) {
1689 adapter->rx_page_offset += adapter->rx_frag_size;
1690 if (adapter->rx_page_offset >= PAGE_SIZE)
1691 adapter->rx_page = NULL;
1692 else
1693 get_page(page);
1694 }
1695 return skb;
1696 }
1697
1698 static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
1699 {
1700 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1701 struct pci_dev *pdev = adapter->pdev;
1702 struct atl1c_buffer *buffer_info, *next_info;
1703 struct sk_buff *skb;
1704 void *vir_addr = NULL;
1705 u16 num_alloc = 0;
1706 u16 rfd_next_to_use, next_next;
1707 struct atl1c_rx_free_desc *rfd_desc;
1708 dma_addr_t mapping;
1709
1710 next_next = rfd_next_to_use = rfd_ring->next_to_use;
1711 if (++next_next == rfd_ring->count)
1712 next_next = 0;
1713 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1714 next_info = &rfd_ring->buffer_info[next_next];
1715
1716 while (next_info->flags & ATL1C_BUFFER_FREE) {
1717 rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
1718
1719 skb = atl1c_alloc_skb(adapter);
1720 if (unlikely(!skb)) {
1721 if (netif_msg_rx_err(adapter))
1722 dev_warn(&pdev->dev, "alloc rx buffer failed\n");
1723 break;
1724 }
1725
1726 /*
1727 * Make buffer alignment 2 beyond a 16 byte boundary
1728 * this will result in a 16 byte aligned IP header after
1729 * the 14 byte MAC header is removed
1730 */
1731 vir_addr = skb->data;
1732 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
1733 buffer_info->skb = skb;
1734 buffer_info->length = adapter->rx_buffer_len;
1735 mapping = pci_map_single(pdev, vir_addr,
1736 buffer_info->length,
1737 PCI_DMA_FROMDEVICE);
1738 if (unlikely(pci_dma_mapping_error(pdev, mapping))) {
1739 dev_kfree_skb(skb);
1740 buffer_info->skb = NULL;
1741 buffer_info->length = 0;
1742 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
1743 netif_warn(adapter, rx_err, adapter->netdev, "RX pci_map_single failed");
1744 break;
1745 }
1746 buffer_info->dma = mapping;
1747 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
1748 ATL1C_PCIMAP_FROMDEVICE);
1749 rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
1750 rfd_next_to_use = next_next;
1751 if (++next_next == rfd_ring->count)
1752 next_next = 0;
1753 buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
1754 next_info = &rfd_ring->buffer_info[next_next];
1755 num_alloc++;
1756 }
1757
1758 if (num_alloc) {
1759 /* TODO: update mailbox here */
1760 wmb();
1761 rfd_ring->next_to_use = rfd_next_to_use;
1762 AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
1763 rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
1764 }
1765
1766 return num_alloc;
1767 }
1768
1769 static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
1770 struct atl1c_recv_ret_status *rrs, u16 num)
1771 {
1772 u16 i;
1773 /* the relationship between rrd and rfd is one map one */
1774 for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
1775 rrd_ring->next_to_clean)) {
1776 rrs->word3 &= ~RRS_RXD_UPDATED;
1777 if (++rrd_ring->next_to_clean == rrd_ring->count)
1778 rrd_ring->next_to_clean = 0;
1779 }
1780 }
1781
1782 static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
1783 struct atl1c_recv_ret_status *rrs, u16 num)
1784 {
1785 u16 i;
1786 u16 rfd_index;
1787 struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
1788
1789 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1790 RRS_RX_RFD_INDEX_MASK;
1791 for (i = 0; i < num; i++) {
1792 buffer_info[rfd_index].skb = NULL;
1793 ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
1794 ATL1C_BUFFER_FREE);
1795 if (++rfd_index == rfd_ring->count)
1796 rfd_index = 0;
1797 }
1798 rfd_ring->next_to_clean = rfd_index;
1799 }
1800
1801 static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
1802 int *work_done, int work_to_do)
1803 {
1804 u16 rfd_num, rfd_index;
1805 u16 count = 0;
1806 u16 length;
1807 struct pci_dev *pdev = adapter->pdev;
1808 struct net_device *netdev = adapter->netdev;
1809 struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
1810 struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
1811 struct sk_buff *skb;
1812 struct atl1c_recv_ret_status *rrs;
1813 struct atl1c_buffer *buffer_info;
1814
1815 while (1) {
1816 if (*work_done >= work_to_do)
1817 break;
1818 rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
1819 if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
1820 rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
1821 RRS_RX_RFD_CNT_MASK;
1822 if (unlikely(rfd_num != 1))
1823 /* TODO support mul rfd*/
1824 if (netif_msg_rx_err(adapter))
1825 dev_warn(&pdev->dev,
1826 "Multi rfd not support yet!\n");
1827 goto rrs_checked;
1828 } else {
1829 break;
1830 }
1831 rrs_checked:
1832 atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
1833 if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
1834 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1835 if (netif_msg_rx_err(adapter))
1836 dev_warn(&pdev->dev,
1837 "wrong packet! rrs word3 is %x\n",
1838 rrs->word3);
1839 continue;
1840 }
1841
1842 length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
1843 RRS_PKT_SIZE_MASK);
1844 /* Good Receive */
1845 if (likely(rfd_num == 1)) {
1846 rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
1847 RRS_RX_RFD_INDEX_MASK;
1848 buffer_info = &rfd_ring->buffer_info[rfd_index];
1849 pci_unmap_single(pdev, buffer_info->dma,
1850 buffer_info->length, PCI_DMA_FROMDEVICE);
1851 skb = buffer_info->skb;
1852 } else {
1853 /* TODO */
1854 if (netif_msg_rx_err(adapter))
1855 dev_warn(&pdev->dev,
1856 "Multi rfd not support yet!\n");
1857 break;
1858 }
1859 atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
1860 skb_put(skb, length - ETH_FCS_LEN);
1861 skb->protocol = eth_type_trans(skb, netdev);
1862 atl1c_rx_checksum(adapter, skb, rrs);
1863 if (rrs->word3 & RRS_VLAN_INS) {
1864 u16 vlan;
1865
1866 AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
1867 vlan = le16_to_cpu(vlan);
1868 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
1869 }
1870 netif_receive_skb(skb);
1871
1872 (*work_done)++;
1873 count++;
1874 }
1875 if (count)
1876 atl1c_alloc_rx_buffer(adapter);
1877 }
1878
1879 /**
1880 * atl1c_clean - NAPI Rx polling callback
1881 */
1882 static int atl1c_clean(struct napi_struct *napi, int budget)
1883 {
1884 struct atl1c_adapter *adapter =
1885 container_of(napi, struct atl1c_adapter, napi);
1886 int work_done = 0;
1887
1888 /* Keep link state information with original netdev */
1889 if (!netif_carrier_ok(adapter->netdev))
1890 goto quit_polling;
1891 /* just enable one RXQ */
1892 atl1c_clean_rx_irq(adapter, &work_done, budget);
1893
1894 if (work_done < budget) {
1895 quit_polling:
1896 napi_complete_done(napi, work_done);
1897 adapter->hw.intr_mask |= ISR_RX_PKT;
1898 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
1899 }
1900 return work_done;
1901 }
1902
1903 #ifdef CONFIG_NET_POLL_CONTROLLER
1904
1905 /*
1906 * Polling 'interrupt' - used by things like netconsole to send skbs
1907 * without having to re-enable interrupts. It's not called while
1908 * the interrupt routine is executing.
1909 */
1910 static void atl1c_netpoll(struct net_device *netdev)
1911 {
1912 struct atl1c_adapter *adapter = netdev_priv(netdev);
1913
1914 disable_irq(adapter->pdev->irq);
1915 atl1c_intr(adapter->pdev->irq, netdev);
1916 enable_irq(adapter->pdev->irq);
1917 }
1918 #endif
1919
1920 static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
1921 {
1922 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1923 u16 next_to_use = 0;
1924 u16 next_to_clean = 0;
1925
1926 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
1927 next_to_use = tpd_ring->next_to_use;
1928
1929 return (u16)(next_to_clean > next_to_use) ?
1930 (next_to_clean - next_to_use - 1) :
1931 (tpd_ring->count + next_to_clean - next_to_use - 1);
1932 }
1933
1934 /*
1935 * get next usable tpd
1936 * Note: should call atl1c_tdp_avail to make sure
1937 * there is enough tpd to use
1938 */
1939 static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
1940 enum atl1c_trans_queue type)
1941 {
1942 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
1943 struct atl1c_tpd_desc *tpd_desc;
1944 u16 next_to_use = 0;
1945
1946 next_to_use = tpd_ring->next_to_use;
1947 if (++tpd_ring->next_to_use == tpd_ring->count)
1948 tpd_ring->next_to_use = 0;
1949 tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
1950 memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
1951 return tpd_desc;
1952 }
1953
1954 static struct atl1c_buffer *
1955 atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
1956 {
1957 struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
1958
1959 return &tpd_ring->buffer_info[tpd -
1960 (struct atl1c_tpd_desc *)tpd_ring->desc];
1961 }
1962
1963 /* Calculate the transmit packet descript needed*/
1964 static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
1965 {
1966 u16 tpd_req;
1967 u16 proto_hdr_len = 0;
1968
1969 tpd_req = skb_shinfo(skb)->nr_frags + 1;
1970
1971 if (skb_is_gso(skb)) {
1972 proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1973 if (proto_hdr_len < skb_headlen(skb))
1974 tpd_req++;
1975 if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
1976 tpd_req++;
1977 }
1978 return tpd_req;
1979 }
1980
1981 static int atl1c_tso_csum(struct atl1c_adapter *adapter,
1982 struct sk_buff *skb,
1983 struct atl1c_tpd_desc **tpd,
1984 enum atl1c_trans_queue type)
1985 {
1986 struct pci_dev *pdev = adapter->pdev;
1987 unsigned short offload_type;
1988 u8 hdr_len;
1989 u32 real_len;
1990
1991 if (skb_is_gso(skb)) {
1992 int err;
1993
1994 err = skb_cow_head(skb, 0);
1995 if (err < 0)
1996 return err;
1997
1998 offload_type = skb_shinfo(skb)->gso_type;
1999
2000 if (offload_type & SKB_GSO_TCPV4) {
2001 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
2002 + ntohs(ip_hdr(skb)->tot_len));
2003
2004 if (real_len < skb->len)
2005 pskb_trim(skb, real_len);
2006
2007 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2008 if (unlikely(skb->len == hdr_len)) {
2009 /* only xsum need */
2010 if (netif_msg_tx_queued(adapter))
2011 dev_warn(&pdev->dev,
2012 "IPV4 tso with zero data??\n");
2013 goto check_sum;
2014 } else {
2015 ip_hdr(skb)->check = 0;
2016 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
2017 ip_hdr(skb)->saddr,
2018 ip_hdr(skb)->daddr,
2019 0, IPPROTO_TCP, 0);
2020 (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
2021 }
2022 }
2023
2024 if (offload_type & SKB_GSO_TCPV6) {
2025 struct atl1c_tpd_ext_desc *etpd =
2026 *(struct atl1c_tpd_ext_desc **)(tpd);
2027
2028 memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
2029 *tpd = atl1c_get_tpd(adapter, type);
2030 ipv6_hdr(skb)->payload_len = 0;
2031 /* check payload == 0 byte ? */
2032 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
2033 if (unlikely(skb->len == hdr_len)) {
2034 /* only xsum need */
2035 if (netif_msg_tx_queued(adapter))
2036 dev_warn(&pdev->dev,
2037 "IPV6 tso with zero data??\n");
2038 goto check_sum;
2039 } else
2040 tcp_hdr(skb)->check = ~csum_ipv6_magic(
2041 &ipv6_hdr(skb)->saddr,
2042 &ipv6_hdr(skb)->daddr,
2043 0, IPPROTO_TCP, 0);
2044 etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
2045 etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
2046 etpd->pkt_len = cpu_to_le32(skb->len);
2047 (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
2048 }
2049
2050 (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
2051 (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
2052 TPD_TCPHDR_OFFSET_SHIFT;
2053 (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
2054 TPD_MSS_SHIFT;
2055 return 0;
2056 }
2057
2058 check_sum:
2059 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2060 u8 css, cso;
2061 cso = skb_checksum_start_offset(skb);
2062
2063 if (unlikely(cso & 0x1)) {
2064 if (netif_msg_tx_err(adapter))
2065 dev_err(&adapter->pdev->dev,
2066 "payload offset should not an event number\n");
2067 return -1;
2068 } else {
2069 css = cso + skb->csum_offset;
2070
2071 (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
2072 TPD_PLOADOFFSET_SHIFT;
2073 (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
2074 TPD_CCSUM_OFFSET_SHIFT;
2075 (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
2076 }
2077 }
2078 return 0;
2079 }
2080
2081 static void atl1c_tx_rollback(struct atl1c_adapter *adpt,
2082 struct atl1c_tpd_desc *first_tpd,
2083 enum atl1c_trans_queue type)
2084 {
2085 struct atl1c_tpd_ring *tpd_ring = &adpt->tpd_ring[type];
2086 struct atl1c_buffer *buffer_info;
2087 struct atl1c_tpd_desc *tpd;
2088 u16 first_index, index;
2089
2090 first_index = first_tpd - (struct atl1c_tpd_desc *)tpd_ring->desc;
2091 index = first_index;
2092 while (index != tpd_ring->next_to_use) {
2093 tpd = ATL1C_TPD_DESC(tpd_ring, index);
2094 buffer_info = &tpd_ring->buffer_info[index];
2095 atl1c_clean_buffer(adpt->pdev, buffer_info);
2096 memset(tpd, 0, sizeof(struct atl1c_tpd_desc));
2097 if (++index == tpd_ring->count)
2098 index = 0;
2099 }
2100 tpd_ring->next_to_use = first_index;
2101 }
2102
2103 static int atl1c_tx_map(struct atl1c_adapter *adapter,
2104 struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
2105 enum atl1c_trans_queue type)
2106 {
2107 struct atl1c_tpd_desc *use_tpd = NULL;
2108 struct atl1c_buffer *buffer_info = NULL;
2109 u16 buf_len = skb_headlen(skb);
2110 u16 map_len = 0;
2111 u16 mapped_len = 0;
2112 u16 hdr_len = 0;
2113 u16 nr_frags;
2114 u16 f;
2115 int tso;
2116
2117 nr_frags = skb_shinfo(skb)->nr_frags;
2118 tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
2119 if (tso) {
2120 /* TSO */
2121 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2122 use_tpd = tpd;
2123
2124 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2125 buffer_info->length = map_len;
2126 buffer_info->dma = pci_map_single(adapter->pdev,
2127 skb->data, hdr_len, PCI_DMA_TODEVICE);
2128 if (unlikely(pci_dma_mapping_error(adapter->pdev,
2129 buffer_info->dma)))
2130 goto err_dma;
2131 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2132 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2133 ATL1C_PCIMAP_TODEVICE);
2134 mapped_len += map_len;
2135 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2136 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2137 }
2138
2139 if (mapped_len < buf_len) {
2140 /* mapped_len == 0, means we should use the first tpd,
2141 which is given by caller */
2142 if (mapped_len == 0)
2143 use_tpd = tpd;
2144 else {
2145 use_tpd = atl1c_get_tpd(adapter, type);
2146 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2147 }
2148 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2149 buffer_info->length = buf_len - mapped_len;
2150 buffer_info->dma =
2151 pci_map_single(adapter->pdev, skb->data + mapped_len,
2152 buffer_info->length, PCI_DMA_TODEVICE);
2153 if (unlikely(pci_dma_mapping_error(adapter->pdev,
2154 buffer_info->dma)))
2155 goto err_dma;
2156
2157 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2158 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
2159 ATL1C_PCIMAP_TODEVICE);
2160 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2161 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2162 }
2163
2164 for (f = 0; f < nr_frags; f++) {
2165 struct skb_frag_struct *frag;
2166
2167 frag = &skb_shinfo(skb)->frags[f];
2168
2169 use_tpd = atl1c_get_tpd(adapter, type);
2170 memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
2171
2172 buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
2173 buffer_info->length = skb_frag_size(frag);
2174 buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
2175 frag, 0,
2176 buffer_info->length,
2177 DMA_TO_DEVICE);
2178 if (dma_mapping_error(&adapter->pdev->dev, buffer_info->dma))
2179 goto err_dma;
2180
2181 ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
2182 ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
2183 ATL1C_PCIMAP_TODEVICE);
2184 use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
2185 use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
2186 }
2187
2188 /* The last tpd */
2189 use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
2190 /* The last buffer info contain the skb address,
2191 so it will be free after unmap */
2192 buffer_info->skb = skb;
2193
2194 return 0;
2195
2196 err_dma:
2197 buffer_info->dma = 0;
2198 buffer_info->length = 0;
2199 return -1;
2200 }
2201
2202 static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
2203 struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
2204 {
2205 struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
2206 u16 reg;
2207
2208 reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
2209 AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
2210 }
2211
2212 static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
2213 struct net_device *netdev)
2214 {
2215 struct atl1c_adapter *adapter = netdev_priv(netdev);
2216 u16 tpd_req = 1;
2217 struct atl1c_tpd_desc *tpd;
2218 enum atl1c_trans_queue type = atl1c_trans_normal;
2219
2220 if (test_bit(__AT_DOWN, &adapter->flags)) {
2221 dev_kfree_skb_any(skb);
2222 return NETDEV_TX_OK;
2223 }
2224
2225 tpd_req = atl1c_cal_tpd_req(skb);
2226
2227 if (atl1c_tpd_avail(adapter, type) < tpd_req) {
2228 /* no enough descriptor, just stop queue */
2229 netif_stop_queue(netdev);
2230 return NETDEV_TX_BUSY;
2231 }
2232
2233 tpd = atl1c_get_tpd(adapter, type);
2234
2235 /* do TSO and check sum */
2236 if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
2237 dev_kfree_skb_any(skb);
2238 return NETDEV_TX_OK;
2239 }
2240
2241 if (unlikely(skb_vlan_tag_present(skb))) {
2242 u16 vlan = skb_vlan_tag_get(skb);
2243 __le16 tag;
2244
2245 vlan = cpu_to_le16(vlan);
2246 AT_VLAN_TO_TAG(vlan, tag);
2247 tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
2248 tpd->vlan_tag = tag;
2249 }
2250
2251 if (skb_network_offset(skb) != ETH_HLEN)
2252 tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
2253
2254 if (atl1c_tx_map(adapter, skb, tpd, type) < 0) {
2255 netif_info(adapter, tx_done, adapter->netdev,
2256 "tx-skb dropped due to dma error\n");
2257 /* roll back tpd/buffer */
2258 atl1c_tx_rollback(adapter, tpd, type);
2259 dev_kfree_skb_any(skb);
2260 } else {
2261 netdev_sent_queue(adapter->netdev, skb->len);
2262 atl1c_tx_queue(adapter, skb, tpd, type);
2263 }
2264
2265 return NETDEV_TX_OK;
2266 }
2267
2268 static void atl1c_free_irq(struct atl1c_adapter *adapter)
2269 {
2270 struct net_device *netdev = adapter->netdev;
2271
2272 free_irq(adapter->pdev->irq, netdev);
2273
2274 if (adapter->have_msi)
2275 pci_disable_msi(adapter->pdev);
2276 }
2277
2278 static int atl1c_request_irq(struct atl1c_adapter *adapter)
2279 {
2280 struct pci_dev *pdev = adapter->pdev;
2281 struct net_device *netdev = adapter->netdev;
2282 int flags = 0;
2283 int err = 0;
2284
2285 adapter->have_msi = true;
2286 err = pci_enable_msi(adapter->pdev);
2287 if (err) {
2288 if (netif_msg_ifup(adapter))
2289 dev_err(&pdev->dev,
2290 "Unable to allocate MSI interrupt Error: %d\n",
2291 err);
2292 adapter->have_msi = false;
2293 }
2294
2295 if (!adapter->have_msi)
2296 flags |= IRQF_SHARED;
2297 err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
2298 netdev->name, netdev);
2299 if (err) {
2300 if (netif_msg_ifup(adapter))
2301 dev_err(&pdev->dev,
2302 "Unable to allocate interrupt Error: %d\n",
2303 err);
2304 if (adapter->have_msi)
2305 pci_disable_msi(adapter->pdev);
2306 return err;
2307 }
2308 if (netif_msg_ifup(adapter))
2309 dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
2310 return err;
2311 }
2312
2313
2314 static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
2315 {
2316 /* release tx-pending skbs and reset tx/rx ring index */
2317 atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
2318 atl1c_clean_tx_ring(adapter, atl1c_trans_high);
2319 atl1c_clean_rx_ring(adapter);
2320 }
2321
2322 static int atl1c_up(struct atl1c_adapter *adapter)
2323 {
2324 struct net_device *netdev = adapter->netdev;
2325 int err;
2326
2327 netif_carrier_off(netdev);
2328
2329 err = atl1c_configure(adapter);
2330 if (unlikely(err))
2331 goto err_up;
2332
2333 err = atl1c_request_irq(adapter);
2334 if (unlikely(err))
2335 goto err_up;
2336
2337 atl1c_check_link_status(adapter);
2338 clear_bit(__AT_DOWN, &adapter->flags);
2339 napi_enable(&adapter->napi);
2340 atl1c_irq_enable(adapter);
2341 netif_start_queue(netdev);
2342 return err;
2343
2344 err_up:
2345 atl1c_clean_rx_ring(adapter);
2346 return err;
2347 }
2348
2349 static void atl1c_down(struct atl1c_adapter *adapter)
2350 {
2351 struct net_device *netdev = adapter->netdev;
2352
2353 atl1c_del_timer(adapter);
2354 adapter->work_event = 0; /* clear all event */
2355 /* signal that we're down so the interrupt handler does not
2356 * reschedule our watchdog timer */
2357 set_bit(__AT_DOWN, &adapter->flags);
2358 netif_carrier_off(netdev);
2359 napi_disable(&adapter->napi);
2360 atl1c_irq_disable(adapter);
2361 atl1c_free_irq(adapter);
2362 /* disable ASPM if device inactive */
2363 atl1c_disable_l0s_l1(&adapter->hw);
2364 /* reset MAC to disable all RX/TX */
2365 atl1c_reset_mac(&adapter->hw);
2366 msleep(1);
2367
2368 adapter->link_speed = SPEED_0;
2369 adapter->link_duplex = -1;
2370 atl1c_reset_dma_ring(adapter);
2371 }
2372
2373 /**
2374 * atl1c_open - Called when a network interface is made active
2375 * @netdev: network interface device structure
2376 *
2377 * Returns 0 on success, negative value on failure
2378 *
2379 * The open entry point is called when a network interface is made
2380 * active by the system (IFF_UP). At this point all resources needed
2381 * for transmit and receive operations are allocated, the interrupt
2382 * handler is registered with the OS, the watchdog timer is started,
2383 * and the stack is notified that the interface is ready.
2384 */
2385 static int atl1c_open(struct net_device *netdev)
2386 {
2387 struct atl1c_adapter *adapter = netdev_priv(netdev);
2388 int err;
2389
2390 /* disallow open during test */
2391 if (test_bit(__AT_TESTING, &adapter->flags))
2392 return -EBUSY;
2393
2394 /* allocate rx/tx dma buffer & descriptors */
2395 err = atl1c_setup_ring_resources(adapter);
2396 if (unlikely(err))
2397 return err;
2398
2399 err = atl1c_up(adapter);
2400 if (unlikely(err))
2401 goto err_up;
2402
2403 return 0;
2404
2405 err_up:
2406 atl1c_free_irq(adapter);
2407 atl1c_free_ring_resources(adapter);
2408 atl1c_reset_mac(&adapter->hw);
2409 return err;
2410 }
2411
2412 /**
2413 * atl1c_close - Disables a network interface
2414 * @netdev: network interface device structure
2415 *
2416 * Returns 0, this is not allowed to fail
2417 *
2418 * The close entry point is called when an interface is de-activated
2419 * by the OS. The hardware is still under the drivers control, but
2420 * needs to be disabled. A global MAC reset is issued to stop the
2421 * hardware, and all transmit and receive resources are freed.
2422 */
2423 static int atl1c_close(struct net_device *netdev)
2424 {
2425 struct atl1c_adapter *adapter = netdev_priv(netdev);
2426
2427 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2428 set_bit(__AT_DOWN, &adapter->flags);
2429 cancel_work_sync(&adapter->common_task);
2430 atl1c_down(adapter);
2431 atl1c_free_ring_resources(adapter);
2432 return 0;
2433 }
2434
2435 static int atl1c_suspend(struct device *dev)
2436 {
2437 struct pci_dev *pdev = to_pci_dev(dev);
2438 struct net_device *netdev = pci_get_drvdata(pdev);
2439 struct atl1c_adapter *adapter = netdev_priv(netdev);
2440 struct atl1c_hw *hw = &adapter->hw;
2441 u32 wufc = adapter->wol;
2442
2443 atl1c_disable_l0s_l1(hw);
2444 if (netif_running(netdev)) {
2445 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2446 atl1c_down(adapter);
2447 }
2448 netif_device_detach(netdev);
2449
2450 if (wufc)
2451 if (atl1c_phy_to_ps_link(hw) != 0)
2452 dev_dbg(&pdev->dev, "phy power saving failed");
2453
2454 atl1c_power_saving(hw, wufc);
2455
2456 return 0;
2457 }
2458
2459 #ifdef CONFIG_PM_SLEEP
2460 static int atl1c_resume(struct device *dev)
2461 {
2462 struct pci_dev *pdev = to_pci_dev(dev);
2463 struct net_device *netdev = pci_get_drvdata(pdev);
2464 struct atl1c_adapter *adapter = netdev_priv(netdev);
2465
2466 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2467 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2468
2469 atl1c_phy_reset(&adapter->hw);
2470 atl1c_reset_mac(&adapter->hw);
2471 atl1c_phy_init(&adapter->hw);
2472
2473 #if 0
2474 AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
2475 pm_data &= ~PM_CTRLSTAT_PME_EN;
2476 AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
2477 #endif
2478
2479 netif_device_attach(netdev);
2480 if (netif_running(netdev))
2481 atl1c_up(adapter);
2482
2483 return 0;
2484 }
2485 #endif
2486
2487 static void atl1c_shutdown(struct pci_dev *pdev)
2488 {
2489 struct net_device *netdev = pci_get_drvdata(pdev);
2490 struct atl1c_adapter *adapter = netdev_priv(netdev);
2491
2492 atl1c_suspend(&pdev->dev);
2493 pci_wake_from_d3(pdev, adapter->wol);
2494 pci_set_power_state(pdev, PCI_D3hot);
2495 }
2496
2497 static const struct net_device_ops atl1c_netdev_ops = {
2498 .ndo_open = atl1c_open,
2499 .ndo_stop = atl1c_close,
2500 .ndo_validate_addr = eth_validate_addr,
2501 .ndo_start_xmit = atl1c_xmit_frame,
2502 .ndo_set_mac_address = atl1c_set_mac_addr,
2503 .ndo_set_rx_mode = atl1c_set_multi,
2504 .ndo_change_mtu = atl1c_change_mtu,
2505 .ndo_fix_features = atl1c_fix_features,
2506 .ndo_set_features = atl1c_set_features,
2507 .ndo_do_ioctl = atl1c_ioctl,
2508 .ndo_tx_timeout = atl1c_tx_timeout,
2509 .ndo_get_stats = atl1c_get_stats,
2510 #ifdef CONFIG_NET_POLL_CONTROLLER
2511 .ndo_poll_controller = atl1c_netpoll,
2512 #endif
2513 };
2514
2515 static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2516 {
2517 SET_NETDEV_DEV(netdev, &pdev->dev);
2518 pci_set_drvdata(pdev, netdev);
2519
2520 netdev->netdev_ops = &atl1c_netdev_ops;
2521 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2522 netdev->min_mtu = ETH_ZLEN - (ETH_HLEN + VLAN_HLEN);
2523 atl1c_set_ethtool_ops(netdev);
2524
2525 /* TODO: add when ready */
2526 netdev->hw_features = NETIF_F_SG |
2527 NETIF_F_HW_CSUM |
2528 NETIF_F_HW_VLAN_CTAG_RX |
2529 NETIF_F_TSO |
2530 NETIF_F_TSO6;
2531 netdev->features = netdev->hw_features |
2532 NETIF_F_HW_VLAN_CTAG_TX;
2533 return 0;
2534 }
2535
2536 /**
2537 * atl1c_probe - Device Initialization Routine
2538 * @pdev: PCI device information struct
2539 * @ent: entry in atl1c_pci_tbl
2540 *
2541 * Returns 0 on success, negative on failure
2542 *
2543 * atl1c_probe initializes an adapter identified by a pci_dev structure.
2544 * The OS initialization, configuring of the adapter private structure,
2545 * and a hardware reset occur.
2546 */
2547 static int atl1c_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2548 {
2549 struct net_device *netdev;
2550 struct atl1c_adapter *adapter;
2551 static int cards_found;
2552
2553 int err = 0;
2554
2555 /* enable device (incl. PCI PM wakeup and hotplug setup) */
2556 err = pci_enable_device_mem(pdev);
2557 if (err) {
2558 dev_err(&pdev->dev, "cannot enable PCI device\n");
2559 return err;
2560 }
2561
2562 /*
2563 * The atl1c chip can DMA to 64-bit addresses, but it uses a single
2564 * shared register for the high 32 bits, so only a single, aligned,
2565 * 4 GB physical address range can be used at a time.
2566 *
2567 * Supporting 64-bit DMA on this hardware is more trouble than it's
2568 * worth. It is far easier to limit to 32-bit DMA than update
2569 * various kernel subsystems to support the mechanics required by a
2570 * fixed-high-32-bit system.
2571 */
2572 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2573 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2574 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2575 goto err_dma;
2576 }
2577
2578 err = pci_request_regions(pdev, atl1c_driver_name);
2579 if (err) {
2580 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2581 goto err_pci_reg;
2582 }
2583
2584 pci_set_master(pdev);
2585
2586 netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
2587 if (netdev == NULL) {
2588 err = -ENOMEM;
2589 goto err_alloc_etherdev;
2590 }
2591
2592 err = atl1c_init_netdev(netdev, pdev);
2593 if (err) {
2594 dev_err(&pdev->dev, "init netdevice failed\n");
2595 goto err_init_netdev;
2596 }
2597 adapter = netdev_priv(netdev);
2598 adapter->bd_number = cards_found;
2599 adapter->netdev = netdev;
2600 adapter->pdev = pdev;
2601 adapter->hw.adapter = adapter;
2602 adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
2603 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
2604 if (!adapter->hw.hw_addr) {
2605 err = -EIO;
2606 dev_err(&pdev->dev, "cannot map device registers\n");
2607 goto err_ioremap;
2608 }
2609
2610 /* init mii data */
2611 adapter->mii.dev = netdev;
2612 adapter->mii.mdio_read = atl1c_mdio_read;
2613 adapter->mii.mdio_write = atl1c_mdio_write;
2614 adapter->mii.phy_id_mask = 0x1f;
2615 adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
2616 netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
2617 timer_setup(&adapter->phy_config_timer, atl1c_phy_config, 0);
2618 /* setup the private structure */
2619 err = atl1c_sw_init(adapter);
2620 if (err) {
2621 dev_err(&pdev->dev, "net device private data init failed\n");
2622 goto err_sw_init;
2623 }
2624 /* set max MTU */
2625 atl1c_set_max_mtu(netdev);
2626
2627 atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
2628
2629 /* Init GPHY as early as possible due to power saving issue */
2630 atl1c_phy_reset(&adapter->hw);
2631
2632 err = atl1c_reset_mac(&adapter->hw);
2633 if (err) {
2634 err = -EIO;
2635 goto err_reset;
2636 }
2637
2638 /* reset the controller to
2639 * put the device in a known good starting state */
2640 err = atl1c_phy_init(&adapter->hw);
2641 if (err) {
2642 err = -EIO;
2643 goto err_reset;
2644 }
2645 if (atl1c_read_mac_addr(&adapter->hw)) {
2646 /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
2647 netdev->addr_assign_type = NET_ADDR_RANDOM;
2648 }
2649 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2650 if (netif_msg_probe(adapter))
2651 dev_dbg(&pdev->dev, "mac address : %pM\n",
2652 adapter->hw.mac_addr);
2653
2654 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
2655 INIT_WORK(&adapter->common_task, atl1c_common_task);
2656 adapter->work_event = 0;
2657 err = register_netdev(netdev);
2658 if (err) {
2659 dev_err(&pdev->dev, "register netdevice failed\n");
2660 goto err_register;
2661 }
2662
2663 if (netif_msg_probe(adapter))
2664 dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
2665 cards_found++;
2666 return 0;
2667
2668 err_reset:
2669 err_register:
2670 err_sw_init:
2671 iounmap(adapter->hw.hw_addr);
2672 err_init_netdev:
2673 err_ioremap:
2674 free_netdev(netdev);
2675 err_alloc_etherdev:
2676 pci_release_regions(pdev);
2677 err_pci_reg:
2678 err_dma:
2679 pci_disable_device(pdev);
2680 return err;
2681 }
2682
2683 /**
2684 * atl1c_remove - Device Removal Routine
2685 * @pdev: PCI device information struct
2686 *
2687 * atl1c_remove is called by the PCI subsystem to alert the driver
2688 * that it should release a PCI device. The could be caused by a
2689 * Hot-Plug event, or because the driver is going to be removed from
2690 * memory.
2691 */
2692 static void atl1c_remove(struct pci_dev *pdev)
2693 {
2694 struct net_device *netdev = pci_get_drvdata(pdev);
2695 struct atl1c_adapter *adapter = netdev_priv(netdev);
2696
2697 unregister_netdev(netdev);
2698 /* restore permanent address */
2699 atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
2700 atl1c_phy_disable(&adapter->hw);
2701
2702 iounmap(adapter->hw.hw_addr);
2703
2704 pci_release_regions(pdev);
2705 pci_disable_device(pdev);
2706 free_netdev(netdev);
2707 }
2708
2709 /**
2710 * atl1c_io_error_detected - called when PCI error is detected
2711 * @pdev: Pointer to PCI device
2712 * @state: The current pci connection state
2713 *
2714 * This function is called after a PCI bus error affecting
2715 * this device has been detected.
2716 */
2717 static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
2718 pci_channel_state_t state)
2719 {
2720 struct net_device *netdev = pci_get_drvdata(pdev);
2721 struct atl1c_adapter *adapter = netdev_priv(netdev);
2722
2723 netif_device_detach(netdev);
2724
2725 if (state == pci_channel_io_perm_failure)
2726 return PCI_ERS_RESULT_DISCONNECT;
2727
2728 if (netif_running(netdev))
2729 atl1c_down(adapter);
2730
2731 pci_disable_device(pdev);
2732
2733 /* Request a slot slot reset. */
2734 return PCI_ERS_RESULT_NEED_RESET;
2735 }
2736
2737 /**
2738 * atl1c_io_slot_reset - called after the pci bus has been reset.
2739 * @pdev: Pointer to PCI device
2740 *
2741 * Restart the card from scratch, as if from a cold-boot. Implementation
2742 * resembles the first-half of the e1000_resume routine.
2743 */
2744 static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
2745 {
2746 struct net_device *netdev = pci_get_drvdata(pdev);
2747 struct atl1c_adapter *adapter = netdev_priv(netdev);
2748
2749 if (pci_enable_device(pdev)) {
2750 if (netif_msg_hw(adapter))
2751 dev_err(&pdev->dev,
2752 "Cannot re-enable PCI device after reset\n");
2753 return PCI_ERS_RESULT_DISCONNECT;
2754 }
2755 pci_set_master(pdev);
2756
2757 pci_enable_wake(pdev, PCI_D3hot, 0);
2758 pci_enable_wake(pdev, PCI_D3cold, 0);
2759
2760 atl1c_reset_mac(&adapter->hw);
2761
2762 return PCI_ERS_RESULT_RECOVERED;
2763 }
2764
2765 /**
2766 * atl1c_io_resume - called when traffic can start flowing again.
2767 * @pdev: Pointer to PCI device
2768 *
2769 * This callback is called when the error recovery driver tells us that
2770 * its OK to resume normal operation. Implementation resembles the
2771 * second-half of the atl1c_resume routine.
2772 */
2773 static void atl1c_io_resume(struct pci_dev *pdev)
2774 {
2775 struct net_device *netdev = pci_get_drvdata(pdev);
2776 struct atl1c_adapter *adapter = netdev_priv(netdev);
2777
2778 if (netif_running(netdev)) {
2779 if (atl1c_up(adapter)) {
2780 if (netif_msg_hw(adapter))
2781 dev_err(&pdev->dev,
2782 "Cannot bring device back up after reset\n");
2783 return;
2784 }
2785 }
2786
2787 netif_device_attach(netdev);
2788 }
2789
2790 static const struct pci_error_handlers atl1c_err_handler = {
2791 .error_detected = atl1c_io_error_detected,
2792 .slot_reset = atl1c_io_slot_reset,
2793 .resume = atl1c_io_resume,
2794 };
2795
2796 static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
2797
2798 static struct pci_driver atl1c_driver = {
2799 .name = atl1c_driver_name,
2800 .id_table = atl1c_pci_tbl,
2801 .probe = atl1c_probe,
2802 .remove = atl1c_remove,
2803 .shutdown = atl1c_shutdown,
2804 .err_handler = &atl1c_err_handler,
2805 .driver.pm = &atl1c_pm_ops,
2806 };
2807
2808 module_pci_driver(atl1c_driver);
CRIS linux kernel tree