?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / net / ethernet / broadcom / bcmsysport.c
blobf15a8fc6dfc97419f8e1492dd1717b9d2e562b84
1 /*
2 * Broadcom BCM7xxx System Port Ethernet MAC driver
3 *
4 * Copyright (C) 2014 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
25 #include <net/dsa.h>
26 #include <net/ip.h>
27 #include <net/ipv6.h>
28
29 #include "bcmsysport.h"
30
31 /* I/O accessors register helpers */
32 #define BCM_SYSPORT_IO_MACRO(name, offset) \
33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
34 { \
35 u32 reg = readl_relaxed(priv->base + offset + off); \
36 return reg; \
37 } \
38 static inline void name##_writel(struct bcm_sysport_priv *priv, \
39 u32 val, u32 off) \
40 { \
41 writel_relaxed(val, priv->base + offset + off); \
42 } \
43
44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
54
55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
56 * same layout, except it has been moved by 4 bytes up, *sigh*
57 */
58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
59 {
60 if (priv->is_lite && off >= RDMA_STATUS)
61 off += 4;
62 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
63 }
64
65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
66 {
67 if (priv->is_lite && off >= RDMA_STATUS)
68 off += 4;
69 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
70 }
71
72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
73 {
74 if (!priv->is_lite) {
75 return BIT(bit);
76 } else {
77 if (bit >= ACB_ALGO)
78 return BIT(bit + 1);
79 else
80 return BIT(bit);
81 }
82 }
83
84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
85 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
86 */
87 #define BCM_SYSPORT_INTR_L2(which) \
88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
89 u32 mask) \
90 { \
91 priv->irq##which##_mask &= ~(mask); \
92 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
93 } \
94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
95 u32 mask) \
96 { \
97 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
98 priv->irq##which##_mask |= (mask); \
99 } \
100
101 BCM_SYSPORT_INTR_L2(0)
102 BCM_SYSPORT_INTR_L2(1)
103
104 /* Register accesses to GISB/RBUS registers are expensive (few hundred
105 * nanoseconds), so keep the check for 64-bits explicit here to save
106 * one register write per-packet on 32-bits platforms.
107 */
108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
109 void __iomem *d,
110 dma_addr_t addr)
111 {
112 #ifdef CONFIG_PHYS_ADDR_T_64BIT
113 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
114 d + DESC_ADDR_HI_STATUS_LEN);
115 #endif
116 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
117 }
118
119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
120 struct dma_desc *desc,
121 unsigned int port)
122 {
123 /* Ports are latched, so write upper address first */
124 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
125 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
126 }
127
128 /* Ethtool operations */
129 static int bcm_sysport_set_rx_csum(struct net_device *dev,
130 netdev_features_t wanted)
131 {
132 struct bcm_sysport_priv *priv = netdev_priv(dev);
133 u32 reg;
134
135 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
136 reg = rxchk_readl(priv, RXCHK_CONTROL);
137 if (priv->rx_chk_en)
138 reg |= RXCHK_EN;
139 else
140 reg &= ~RXCHK_EN;
141
142 /* If UniMAC forwards CRC, we need to skip over it to get
143 * a valid CHK bit to be set in the per-packet status word
144 */
145 if (priv->rx_chk_en && priv->crc_fwd)
146 reg |= RXCHK_SKIP_FCS;
147 else
148 reg &= ~RXCHK_SKIP_FCS;
149
150 /* If Broadcom tags are enabled (e.g: using a switch), make
151 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
152 * tag after the Ethernet MAC Source Address.
153 */
154 if (netdev_uses_dsa(dev))
155 reg |= RXCHK_BRCM_TAG_EN;
156 else
157 reg &= ~RXCHK_BRCM_TAG_EN;
158
159 rxchk_writel(priv, reg, RXCHK_CONTROL);
160
161 return 0;
162 }
163
164 static int bcm_sysport_set_tx_csum(struct net_device *dev,
165 netdev_features_t wanted)
166 {
167 struct bcm_sysport_priv *priv = netdev_priv(dev);
168 u32 reg;
169
170 /* Hardware transmit checksum requires us to enable the Transmit status
171 * block prepended to the packet contents
172 */
173 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
174 reg = tdma_readl(priv, TDMA_CONTROL);
175 if (priv->tsb_en)
176 reg |= tdma_control_bit(priv, TSB_EN);
177 else
178 reg &= ~tdma_control_bit(priv, TSB_EN);
179 tdma_writel(priv, reg, TDMA_CONTROL);
180
181 return 0;
182 }
183
184 static int bcm_sysport_set_features(struct net_device *dev,
185 netdev_features_t features)
186 {
187 netdev_features_t changed = features ^ dev->features;
188 netdev_features_t wanted = dev->wanted_features;
189 int ret = 0;
190
191 if (changed & NETIF_F_RXCSUM)
192 ret = bcm_sysport_set_rx_csum(dev, wanted);
193 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
194 ret = bcm_sysport_set_tx_csum(dev, wanted);
195
196 return ret;
197 }
198
199 /* Hardware counters must be kept in sync because the order/offset
200 * is important here (order in structure declaration = order in hardware)
201 */
202 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
203 /* general stats */
204 STAT_NETDEV64(rx_packets),
205 STAT_NETDEV64(tx_packets),
206 STAT_NETDEV64(rx_bytes),
207 STAT_NETDEV64(tx_bytes),
208 STAT_NETDEV(rx_errors),
209 STAT_NETDEV(tx_errors),
210 STAT_NETDEV(rx_dropped),
211 STAT_NETDEV(tx_dropped),
212 STAT_NETDEV(multicast),
213 /* UniMAC RSV counters */
214 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
215 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
216 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
217 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
218 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
219 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
220 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
221 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
222 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
223 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
224 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
225 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
226 STAT_MIB_RX("rx_multicast", mib.rx.mca),
227 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
228 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
229 STAT_MIB_RX("rx_control", mib.rx.cf),
230 STAT_MIB_RX("rx_pause", mib.rx.pf),
231 STAT_MIB_RX("rx_unknown", mib.rx.uo),
232 STAT_MIB_RX("rx_align", mib.rx.aln),
233 STAT_MIB_RX("rx_outrange", mib.rx.flr),
234 STAT_MIB_RX("rx_code", mib.rx.cde),
235 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
236 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
237 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
238 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
239 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
240 STAT_MIB_RX("rx_unicast", mib.rx.uc),
241 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
242 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
243 /* UniMAC TSV counters */
244 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
245 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
246 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
247 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
248 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
249 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
250 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
251 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
252 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
253 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
254 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
255 STAT_MIB_TX("tx_multicast", mib.tx.mca),
256 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
257 STAT_MIB_TX("tx_pause", mib.tx.pf),
258 STAT_MIB_TX("tx_control", mib.tx.cf),
259 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
260 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
261 STAT_MIB_TX("tx_defer", mib.tx.drf),
262 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
263 STAT_MIB_TX("tx_single_col", mib.tx.scl),
264 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
265 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
266 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
267 STAT_MIB_TX("tx_frags", mib.tx.frg),
268 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
269 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
270 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
271 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
272 STAT_MIB_TX("tx_unicast", mib.tx.uc),
273 /* UniMAC RUNT counters */
274 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
275 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
276 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
277 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
278 /* RXCHK misc statistics */
279 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
280 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
281 RXCHK_OTHER_DISC_CNTR),
282 /* RBUF misc statistics */
283 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
284 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
285 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
286 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
287 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
288 /* Per TX-queue statistics are dynamically appended */
289 };
290
291 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
292
293 static void bcm_sysport_get_drvinfo(struct net_device *dev,
294 struct ethtool_drvinfo *info)
295 {
296 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
297 strlcpy(info->version, "0.1", sizeof(info->version));
298 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
299 }
300
301 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
302 {
303 struct bcm_sysport_priv *priv = netdev_priv(dev);
304
305 return priv->msg_enable;
306 }
307
308 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
309 {
310 struct bcm_sysport_priv *priv = netdev_priv(dev);
311
312 priv->msg_enable = enable;
313 }
314
315 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
316 {
317 switch (type) {
318 case BCM_SYSPORT_STAT_NETDEV:
319 case BCM_SYSPORT_STAT_NETDEV64:
320 case BCM_SYSPORT_STAT_RXCHK:
321 case BCM_SYSPORT_STAT_RBUF:
322 case BCM_SYSPORT_STAT_SOFT:
323 return true;
324 default:
325 return false;
326 }
327 }
328
329 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
330 {
331 struct bcm_sysport_priv *priv = netdev_priv(dev);
332 const struct bcm_sysport_stats *s;
333 unsigned int i, j;
334
335 switch (string_set) {
336 case ETH_SS_STATS:
337 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
338 s = &bcm_sysport_gstrings_stats[i];
339 if (priv->is_lite &&
340 !bcm_sysport_lite_stat_valid(s->type))
341 continue;
342 j++;
343 }
344 /* Include per-queue statistics */
345 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
346 default:
347 return -EOPNOTSUPP;
348 }
349 }
350
351 static void bcm_sysport_get_strings(struct net_device *dev,
352 u32 stringset, u8 *data)
353 {
354 struct bcm_sysport_priv *priv = netdev_priv(dev);
355 const struct bcm_sysport_stats *s;
356 char buf[128];
357 int i, j;
358
359 switch (stringset) {
360 case ETH_SS_STATS:
361 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
362 s = &bcm_sysport_gstrings_stats[i];
363 if (priv->is_lite &&
364 !bcm_sysport_lite_stat_valid(s->type))
365 continue;
366
367 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
368 ETH_GSTRING_LEN);
369 j++;
370 }
371
372 for (i = 0; i < dev->num_tx_queues; i++) {
373 snprintf(buf, sizeof(buf), "txq%d_packets", i);
374 memcpy(data + j * ETH_GSTRING_LEN, buf,
375 ETH_GSTRING_LEN);
376 j++;
377
378 snprintf(buf, sizeof(buf), "txq%d_bytes", i);
379 memcpy(data + j * ETH_GSTRING_LEN, buf,
380 ETH_GSTRING_LEN);
381 j++;
382 }
383 break;
384 default:
385 break;
386 }
387 }
388
389 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
390 {
391 int i, j = 0;
392
393 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
394 const struct bcm_sysport_stats *s;
395 u8 offset = 0;
396 u32 val = 0;
397 char *p;
398
399 s = &bcm_sysport_gstrings_stats[i];
400 switch (s->type) {
401 case BCM_SYSPORT_STAT_NETDEV:
402 case BCM_SYSPORT_STAT_NETDEV64:
403 case BCM_SYSPORT_STAT_SOFT:
404 continue;
405 case BCM_SYSPORT_STAT_MIB_RX:
406 case BCM_SYSPORT_STAT_MIB_TX:
407 case BCM_SYSPORT_STAT_RUNT:
408 if (priv->is_lite)
409 continue;
410
411 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
412 offset = UMAC_MIB_STAT_OFFSET;
413 val = umac_readl(priv, UMAC_MIB_START + j + offset);
414 break;
415 case BCM_SYSPORT_STAT_RXCHK:
416 val = rxchk_readl(priv, s->reg_offset);
417 if (val == ~0)
418 rxchk_writel(priv, 0, s->reg_offset);
419 break;
420 case BCM_SYSPORT_STAT_RBUF:
421 val = rbuf_readl(priv, s->reg_offset);
422 if (val == ~0)
423 rbuf_writel(priv, 0, s->reg_offset);
424 break;
425 }
426
427 j += s->stat_sizeof;
428 p = (char *)priv + s->stat_offset;
429 *(u32 *)p = val;
430 }
431
432 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
433 }
434
435 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
436 u64 *tx_bytes, u64 *tx_packets)
437 {
438 struct bcm_sysport_tx_ring *ring;
439 u64 bytes = 0, packets = 0;
440 unsigned int start;
441 unsigned int q;
442
443 for (q = 0; q < priv->netdev->num_tx_queues; q++) {
444 ring = &priv->tx_rings[q];
445 do {
446 start = u64_stats_fetch_begin_irq(&priv->syncp);
447 bytes = ring->bytes;
448 packets = ring->packets;
449 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
450
451 *tx_bytes += bytes;
452 *tx_packets += packets;
453 }
454 }
455
456 static void bcm_sysport_get_stats(struct net_device *dev,
457 struct ethtool_stats *stats, u64 *data)
458 {
459 struct bcm_sysport_priv *priv = netdev_priv(dev);
460 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
461 struct u64_stats_sync *syncp = &priv->syncp;
462 struct bcm_sysport_tx_ring *ring;
463 u64 tx_bytes = 0, tx_packets = 0;
464 unsigned int start;
465 int i, j;
466
467 if (netif_running(dev)) {
468 bcm_sysport_update_mib_counters(priv);
469 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
470 stats64->tx_bytes = tx_bytes;
471 stats64->tx_packets = tx_packets;
472 }
473
474 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
475 const struct bcm_sysport_stats *s;
476 char *p;
477
478 s = &bcm_sysport_gstrings_stats[i];
479 if (s->type == BCM_SYSPORT_STAT_NETDEV)
480 p = (char *)&dev->stats;
481 else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
482 p = (char *)stats64;
483 else
484 p = (char *)priv;
485
486 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
487 continue;
488 p += s->stat_offset;
489
490 if (s->stat_sizeof == sizeof(u64) &&
491 s->type == BCM_SYSPORT_STAT_NETDEV64) {
492 do {
493 start = u64_stats_fetch_begin_irq(syncp);
494 data[i] = *(u64 *)p;
495 } while (u64_stats_fetch_retry_irq(syncp, start));
496 } else
497 data[i] = *(u32 *)p;
498 j++;
499 }
500
501 /* For SYSTEMPORT Lite since we have holes in our statistics, j would
502 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
503 * needs to point to how many total statistics we have minus the
504 * number of per TX queue statistics
505 */
506 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
507 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
508
509 for (i = 0; i < dev->num_tx_queues; i++) {
510 ring = &priv->tx_rings[i];
511 data[j] = ring->packets;
512 j++;
513 data[j] = ring->bytes;
514 j++;
515 }
516 }
517
518 static void bcm_sysport_get_wol(struct net_device *dev,
519 struct ethtool_wolinfo *wol)
520 {
521 struct bcm_sysport_priv *priv = netdev_priv(dev);
522 u32 reg;
523
524 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
525 wol->wolopts = priv->wolopts;
526
527 if (!(priv->wolopts & WAKE_MAGICSECURE))
528 return;
529
530 /* Return the programmed SecureOn password */
531 reg = umac_readl(priv, UMAC_PSW_MS);
532 put_unaligned_be16(reg, &wol->sopass[0]);
533 reg = umac_readl(priv, UMAC_PSW_LS);
534 put_unaligned_be32(reg, &wol->sopass[2]);
535 }
536
537 static int bcm_sysport_set_wol(struct net_device *dev,
538 struct ethtool_wolinfo *wol)
539 {
540 struct bcm_sysport_priv *priv = netdev_priv(dev);
541 struct device *kdev = &priv->pdev->dev;
542 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
543
544 if (!device_can_wakeup(kdev))
545 return -ENOTSUPP;
546
547 if (wol->wolopts & ~supported)
548 return -EINVAL;
549
550 /* Program the SecureOn password */
551 if (wol->wolopts & WAKE_MAGICSECURE) {
552 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
553 UMAC_PSW_MS);
554 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
555 UMAC_PSW_LS);
556 }
557
558 /* Flag the device and relevant IRQ as wakeup capable */
559 if (wol->wolopts) {
560 device_set_wakeup_enable(kdev, 1);
561 if (priv->wol_irq_disabled)
562 enable_irq_wake(priv->wol_irq);
563 priv->wol_irq_disabled = 0;
564 } else {
565 device_set_wakeup_enable(kdev, 0);
566 /* Avoid unbalanced disable_irq_wake calls */
567 if (!priv->wol_irq_disabled)
568 disable_irq_wake(priv->wol_irq);
569 priv->wol_irq_disabled = 1;
570 }
571
572 priv->wolopts = wol->wolopts;
573
574 return 0;
575 }
576
577 static int bcm_sysport_get_coalesce(struct net_device *dev,
578 struct ethtool_coalesce *ec)
579 {
580 struct bcm_sysport_priv *priv = netdev_priv(dev);
581 u32 reg;
582
583 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
584
585 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
586 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
587
588 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
589
590 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
591 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
592
593 return 0;
594 }
595
596 static int bcm_sysport_set_coalesce(struct net_device *dev,
597 struct ethtool_coalesce *ec)
598 {
599 struct bcm_sysport_priv *priv = netdev_priv(dev);
600 unsigned int i;
601 u32 reg;
602
603 /* Base system clock is 125Mhz, DMA timeout is this reference clock
604 * divided by 1024, which yield roughly 8.192 us, our maximum value has
605 * to fit in the RING_TIMEOUT_MASK (16 bits).
606 */
607 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
608 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
609 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
610 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
611 return -EINVAL;
612
613 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
614 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
615 return -EINVAL;
616
617 for (i = 0; i < dev->num_tx_queues; i++) {
618 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
619 reg &= ~(RING_INTR_THRESH_MASK |
620 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
621 reg |= ec->tx_max_coalesced_frames;
622 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
623 RING_TIMEOUT_SHIFT;
624 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
625 }
626
627 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
628 reg &= ~(RDMA_INTR_THRESH_MASK |
629 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
630 reg |= ec->rx_max_coalesced_frames;
631 reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
632 RDMA_TIMEOUT_SHIFT;
633 rdma_writel(priv, reg, RDMA_MBDONE_INTR);
634
635 return 0;
636 }
637
638 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
639 {
640 dev_consume_skb_any(cb->skb);
641 cb->skb = NULL;
642 dma_unmap_addr_set(cb, dma_addr, 0);
643 }
644
645 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
646 struct bcm_sysport_cb *cb)
647 {
648 struct device *kdev = &priv->pdev->dev;
649 struct net_device *ndev = priv->netdev;
650 struct sk_buff *skb, *rx_skb;
651 dma_addr_t mapping;
652
653 /* Allocate a new SKB for a new packet */
654 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
655 if (!skb) {
656 priv->mib.alloc_rx_buff_failed++;
657 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
658 return NULL;
659 }
660
661 mapping = dma_map_single(kdev, skb->data,
662 RX_BUF_LENGTH, DMA_FROM_DEVICE);
663 if (dma_mapping_error(kdev, mapping)) {
664 priv->mib.rx_dma_failed++;
665 dev_kfree_skb_any(skb);
666 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
667 return NULL;
668 }
669
670 /* Grab the current SKB on the ring */
671 rx_skb = cb->skb;
672 if (likely(rx_skb))
673 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
674 RX_BUF_LENGTH, DMA_FROM_DEVICE);
675
676 /* Put the new SKB on the ring */
677 cb->skb = skb;
678 dma_unmap_addr_set(cb, dma_addr, mapping);
679 dma_desc_set_addr(priv, cb->bd_addr, mapping);
680
681 netif_dbg(priv, rx_status, ndev, "RX refill\n");
682
683 /* Return the current SKB to the caller */
684 return rx_skb;
685 }
686
687 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
688 {
689 struct bcm_sysport_cb *cb;
690 struct sk_buff *skb;
691 unsigned int i;
692
693 for (i = 0; i < priv->num_rx_bds; i++) {
694 cb = &priv->rx_cbs[i];
695 skb = bcm_sysport_rx_refill(priv, cb);
696 if (skb)
697 dev_kfree_skb(skb);
698 if (!cb->skb)
699 return -ENOMEM;
700 }
701
702 return 0;
703 }
704
705 /* Poll the hardware for up to budget packets to process */
706 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
707 unsigned int budget)
708 {
709 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
710 struct net_device *ndev = priv->netdev;
711 unsigned int processed = 0, to_process;
712 struct bcm_sysport_cb *cb;
713 struct sk_buff *skb;
714 unsigned int p_index;
715 u16 len, status;
716 struct bcm_rsb *rsb;
717
718 /* Clear status before servicing to reduce spurious interrupts */
719 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
720
721 /* Determine how much we should process since last call, SYSTEMPORT Lite
722 * groups the producer and consumer indexes into the same 32-bit
723 * which we access using RDMA_CONS_INDEX
724 */
725 if (!priv->is_lite)
726 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
727 else
728 p_index = rdma_readl(priv, RDMA_CONS_INDEX);
729 p_index &= RDMA_PROD_INDEX_MASK;
730
731 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
732
733 netif_dbg(priv, rx_status, ndev,
734 "p_index=%d rx_c_index=%d to_process=%d\n",
735 p_index, priv->rx_c_index, to_process);
736
737 while ((processed < to_process) && (processed < budget)) {
738 cb = &priv->rx_cbs[priv->rx_read_ptr];
739 skb = bcm_sysport_rx_refill(priv, cb);
740
741
742 /* We do not have a backing SKB, so we do not a corresponding
743 * DMA mapping for this incoming packet since
744 * bcm_sysport_rx_refill always either has both skb and mapping
745 * or none.
746 */
747 if (unlikely(!skb)) {
748 netif_err(priv, rx_err, ndev, "out of memory!\n");
749 ndev->stats.rx_dropped++;
750 ndev->stats.rx_errors++;
751 goto next;
752 }
753
754 /* Extract the Receive Status Block prepended */
755 rsb = (struct bcm_rsb *)skb->data;
756 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
757 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
758 DESC_STATUS_MASK;
759
760 netif_dbg(priv, rx_status, ndev,
761 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
762 p_index, priv->rx_c_index, priv->rx_read_ptr,
763 len, status);
764
765 if (unlikely(len > RX_BUF_LENGTH)) {
766 netif_err(priv, rx_status, ndev, "oversized packet\n");
767 ndev->stats.rx_length_errors++;
768 ndev->stats.rx_errors++;
769 dev_kfree_skb_any(skb);
770 goto next;
771 }
772
773 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
774 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
775 ndev->stats.rx_dropped++;
776 ndev->stats.rx_errors++;
777 dev_kfree_skb_any(skb);
778 goto next;
779 }
780
781 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
782 netif_err(priv, rx_err, ndev, "error packet\n");
783 if (status & RX_STATUS_OVFLOW)
784 ndev->stats.rx_over_errors++;
785 ndev->stats.rx_dropped++;
786 ndev->stats.rx_errors++;
787 dev_kfree_skb_any(skb);
788 goto next;
789 }
790
791 skb_put(skb, len);
792
793 /* Hardware validated our checksum */
794 if (likely(status & DESC_L4_CSUM))
795 skb->ip_summed = CHECKSUM_UNNECESSARY;
796
797 /* Hardware pre-pends packets with 2bytes before Ethernet
798 * header plus we have the Receive Status Block, strip off all
799 * of this from the SKB.
800 */
801 skb_pull(skb, sizeof(*rsb) + 2);
802 len -= (sizeof(*rsb) + 2);
803
804 /* UniMAC may forward CRC */
805 if (priv->crc_fwd) {
806 skb_trim(skb, len - ETH_FCS_LEN);
807 len -= ETH_FCS_LEN;
808 }
809
810 skb->protocol = eth_type_trans(skb, ndev);
811 ndev->stats.rx_packets++;
812 ndev->stats.rx_bytes += len;
813 u64_stats_update_begin(&priv->syncp);
814 stats64->rx_packets++;
815 stats64->rx_bytes += len;
816 u64_stats_update_end(&priv->syncp);
817
818 napi_gro_receive(&priv->napi, skb);
819 next:
820 processed++;
821 priv->rx_read_ptr++;
822
823 if (priv->rx_read_ptr == priv->num_rx_bds)
824 priv->rx_read_ptr = 0;
825 }
826
827 return processed;
828 }
829
830 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
831 struct bcm_sysport_cb *cb,
832 unsigned int *bytes_compl,
833 unsigned int *pkts_compl)
834 {
835 struct bcm_sysport_priv *priv = ring->priv;
836 struct device *kdev = &priv->pdev->dev;
837
838 if (cb->skb) {
839 *bytes_compl += cb->skb->len;
840 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
841 dma_unmap_len(cb, dma_len),
842 DMA_TO_DEVICE);
843 (*pkts_compl)++;
844 bcm_sysport_free_cb(cb);
845 /* SKB fragment */
846 } else if (dma_unmap_addr(cb, dma_addr)) {
847 *bytes_compl += dma_unmap_len(cb, dma_len);
848 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
849 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
850 dma_unmap_addr_set(cb, dma_addr, 0);
851 }
852 }
853
854 /* Reclaim queued SKBs for transmission completion, lockless version */
855 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
856 struct bcm_sysport_tx_ring *ring)
857 {
858 unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
859 unsigned int pkts_compl = 0, bytes_compl = 0;
860 struct net_device *ndev = priv->netdev;
861 struct bcm_sysport_cb *cb;
862 u32 hw_ind;
863
864 /* Clear status before servicing to reduce spurious interrupts */
865 if (!ring->priv->is_lite)
866 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
867 else
868 intrl2_0_writel(ring->priv, BIT(ring->index +
869 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
870
871 /* Compute how many descriptors have been processed since last call */
872 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
873 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
874 ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
875
876 last_c_index = ring->c_index;
877 num_tx_cbs = ring->size;
878
879 c_index &= (num_tx_cbs - 1);
880
881 if (c_index >= last_c_index)
882 last_tx_cn = c_index - last_c_index;
883 else
884 last_tx_cn = num_tx_cbs - last_c_index + c_index;
885
886 netif_dbg(priv, tx_done, ndev,
887 "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
888 ring->index, c_index, last_tx_cn, last_c_index);
889
890 while (last_tx_cn-- > 0) {
891 cb = ring->cbs + last_c_index;
892 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
893
894 ring->desc_count++;
895 last_c_index++;
896 last_c_index &= (num_tx_cbs - 1);
897 }
898
899 u64_stats_update_begin(&priv->syncp);
900 ring->packets += pkts_compl;
901 ring->bytes += bytes_compl;
902 u64_stats_update_end(&priv->syncp);
903
904 ring->c_index = c_index;
905
906 netif_dbg(priv, tx_done, ndev,
907 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
908 ring->index, ring->c_index, pkts_compl, bytes_compl);
909
910 return pkts_compl;
911 }
912
913 /* Locked version of the per-ring TX reclaim routine */
914 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
915 struct bcm_sysport_tx_ring *ring)
916 {
917 struct netdev_queue *txq;
918 unsigned int released;
919 unsigned long flags;
920
921 txq = netdev_get_tx_queue(priv->netdev, ring->index);
922
923 spin_lock_irqsave(&ring->lock, flags);
924 released = __bcm_sysport_tx_reclaim(priv, ring);
925 if (released)
926 netif_tx_wake_queue(txq);
927
928 spin_unlock_irqrestore(&ring->lock, flags);
929
930 return released;
931 }
932
933 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
934 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
935 struct bcm_sysport_tx_ring *ring)
936 {
937 unsigned long flags;
938
939 spin_lock_irqsave(&ring->lock, flags);
940 __bcm_sysport_tx_reclaim(priv, ring);
941 spin_unlock_irqrestore(&ring->lock, flags);
942 }
943
944 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
945 {
946 struct bcm_sysport_tx_ring *ring =
947 container_of(napi, struct bcm_sysport_tx_ring, napi);
948 unsigned int work_done = 0;
949
950 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
951
952 if (work_done == 0) {
953 napi_complete(napi);
954 /* re-enable TX interrupt */
955 if (!ring->priv->is_lite)
956 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
957 else
958 intrl2_0_mask_clear(ring->priv, BIT(ring->index +
959 INTRL2_0_TDMA_MBDONE_SHIFT));
960
961 return 0;
962 }
963
964 return budget;
965 }
966
967 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
968 {
969 unsigned int q;
970
971 for (q = 0; q < priv->netdev->num_tx_queues; q++)
972 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
973 }
974
975 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
976 {
977 struct bcm_sysport_priv *priv =
978 container_of(napi, struct bcm_sysport_priv, napi);
979 unsigned int work_done = 0;
980
981 work_done = bcm_sysport_desc_rx(priv, budget);
982
983 priv->rx_c_index += work_done;
984 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
985
986 /* SYSTEMPORT Lite groups the producer/consumer index, producer is
987 * maintained by HW, but writes to it will be ignore while RDMA
988 * is active
989 */
990 if (!priv->is_lite)
991 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
992 else
993 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
994
995 if (work_done < budget) {
996 napi_complete_done(napi, work_done);
997 /* re-enable RX interrupts */
998 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
999 }
1000
1001 return work_done;
1002 }
1003
1004 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
1005 {
1006 u32 reg;
1007
1008 /* Stop monitoring MPD interrupt */
1009 intrl2_0_mask_set(priv, INTRL2_0_MPD);
1010
1011 /* Clear the MagicPacket detection logic */
1012 reg = umac_readl(priv, UMAC_MPD_CTRL);
1013 reg &= ~MPD_EN;
1014 umac_writel(priv, reg, UMAC_MPD_CTRL);
1015
1016 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
1017 }
1018
1019 /* RX and misc interrupt routine */
1020 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
1021 {
1022 struct net_device *dev = dev_id;
1023 struct bcm_sysport_priv *priv = netdev_priv(dev);
1024 struct bcm_sysport_tx_ring *txr;
1025 unsigned int ring, ring_bit;
1026
1027 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
1028 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
1029 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
1030
1031 if (unlikely(priv->irq0_stat == 0)) {
1032 netdev_warn(priv->netdev, "spurious RX interrupt\n");
1033 return IRQ_NONE;
1034 }
1035
1036 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
1037 if (likely(napi_schedule_prep(&priv->napi))) {
1038 /* disable RX interrupts */
1039 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
1040 __napi_schedule_irqoff(&priv->napi);
1041 }
1042 }
1043
1044 /* TX ring is full, perform a full reclaim since we do not know
1045 * which one would trigger this interrupt
1046 */
1047 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
1048 bcm_sysport_tx_reclaim_all(priv);
1049
1050 if (priv->irq0_stat & INTRL2_0_MPD) {
1051 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
1052 bcm_sysport_resume_from_wol(priv);
1053 }
1054
1055 if (!priv->is_lite)
1056 goto out;
1057
1058 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1059 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
1060 if (!(priv->irq0_stat & ring_bit))
1061 continue;
1062
1063 txr = &priv->tx_rings[ring];
1064
1065 if (likely(napi_schedule_prep(&txr->napi))) {
1066 intrl2_0_mask_set(priv, ring_bit);
1067 __napi_schedule(&txr->napi);
1068 }
1069 }
1070 out:
1071 return IRQ_HANDLED;
1072 }
1073
1074 /* TX interrupt service routine */
1075 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
1076 {
1077 struct net_device *dev = dev_id;
1078 struct bcm_sysport_priv *priv = netdev_priv(dev);
1079 struct bcm_sysport_tx_ring *txr;
1080 unsigned int ring;
1081
1082 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
1083 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
1084 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1085
1086 if (unlikely(priv->irq1_stat == 0)) {
1087 netdev_warn(priv->netdev, "spurious TX interrupt\n");
1088 return IRQ_NONE;
1089 }
1090
1091 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1092 if (!(priv->irq1_stat & BIT(ring)))
1093 continue;
1094
1095 txr = &priv->tx_rings[ring];
1096
1097 if (likely(napi_schedule_prep(&txr->napi))) {
1098 intrl2_1_mask_set(priv, BIT(ring));
1099 __napi_schedule_irqoff(&txr->napi);
1100 }
1101 }
1102
1103 return IRQ_HANDLED;
1104 }
1105
1106 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
1107 {
1108 struct bcm_sysport_priv *priv = dev_id;
1109
1110 pm_wakeup_event(&priv->pdev->dev, 0);
1111
1112 return IRQ_HANDLED;
1113 }
1114
1115 #ifdef CONFIG_NET_POLL_CONTROLLER
1116 static void bcm_sysport_poll_controller(struct net_device *dev)
1117 {
1118 struct bcm_sysport_priv *priv = netdev_priv(dev);
1119
1120 disable_irq(priv->irq0);
1121 bcm_sysport_rx_isr(priv->irq0, priv);
1122 enable_irq(priv->irq0);
1123
1124 if (!priv->is_lite) {
1125 disable_irq(priv->irq1);
1126 bcm_sysport_tx_isr(priv->irq1, priv);
1127 enable_irq(priv->irq1);
1128 }
1129 }
1130 #endif
1131
1132 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
1133 struct net_device *dev)
1134 {
1135 struct sk_buff *nskb;
1136 struct bcm_tsb *tsb;
1137 u32 csum_info;
1138 u8 ip_proto;
1139 u16 csum_start;
1140 u16 ip_ver;
1141
1142 /* Re-allocate SKB if needed */
1143 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
1144 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
1145 dev_kfree_skb(skb);
1146 if (!nskb) {
1147 dev->stats.tx_errors++;
1148 dev->stats.tx_dropped++;
1149 return NULL;
1150 }
1151 skb = nskb;
1152 }
1153
1154 tsb = skb_push(skb, sizeof(*tsb));
1155 /* Zero-out TSB by default */
1156 memset(tsb, 0, sizeof(*tsb));
1157
1158 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1159 ip_ver = htons(skb->protocol);
1160 switch (ip_ver) {
1161 case ETH_P_IP:
1162 ip_proto = ip_hdr(skb)->protocol;
1163 break;
1164 case ETH_P_IPV6:
1165 ip_proto = ipv6_hdr(skb)->nexthdr;
1166 break;
1167 default:
1168 return skb;
1169 }
1170
1171 /* Get the checksum offset and the L4 (transport) offset */
1172 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1173 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1174 csum_info |= (csum_start << L4_PTR_SHIFT);
1175
1176 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1177 csum_info |= L4_LENGTH_VALID;
1178 if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
1179 csum_info |= L4_UDP;
1180 } else {
1181 csum_info = 0;
1182 }
1183
1184 tsb->l4_ptr_dest_map = csum_info;
1185 }
1186
1187 return skb;
1188 }
1189
1190 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1191 struct net_device *dev)
1192 {
1193 struct bcm_sysport_priv *priv = netdev_priv(dev);
1194 struct device *kdev = &priv->pdev->dev;
1195 struct bcm_sysport_tx_ring *ring;
1196 struct bcm_sysport_cb *cb;
1197 struct netdev_queue *txq;
1198 struct dma_desc *desc;
1199 unsigned int skb_len;
1200 unsigned long flags;
1201 dma_addr_t mapping;
1202 u32 len_status;
1203 u16 queue;
1204 int ret;
1205
1206 queue = skb_get_queue_mapping(skb);
1207 txq = netdev_get_tx_queue(dev, queue);
1208 ring = &priv->tx_rings[queue];
1209
1210 /* lock against tx reclaim in BH context and TX ring full interrupt */
1211 spin_lock_irqsave(&ring->lock, flags);
1212 if (unlikely(ring->desc_count == 0)) {
1213 netif_tx_stop_queue(txq);
1214 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1215 ret = NETDEV_TX_BUSY;
1216 goto out;
1217 }
1218
1219 /* Insert TSB and checksum infos */
1220 if (priv->tsb_en) {
1221 skb = bcm_sysport_insert_tsb(skb, dev);
1222 if (!skb) {
1223 ret = NETDEV_TX_OK;
1224 goto out;
1225 }
1226 }
1227
1228 skb_len = skb->len;
1229
1230 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1231 if (dma_mapping_error(kdev, mapping)) {
1232 priv->mib.tx_dma_failed++;
1233 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1234 skb->data, skb_len);
1235 ret = NETDEV_TX_OK;
1236 goto out;
1237 }
1238
1239 /* Remember the SKB for future freeing */
1240 cb = &ring->cbs[ring->curr_desc];
1241 cb->skb = skb;
1242 dma_unmap_addr_set(cb, dma_addr, mapping);
1243 dma_unmap_len_set(cb, dma_len, skb_len);
1244
1245 /* Fetch a descriptor entry from our pool */
1246 desc = ring->desc_cpu;
1247
1248 desc->addr_lo = lower_32_bits(mapping);
1249 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1250 len_status |= (skb_len << DESC_LEN_SHIFT);
1251 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1252 DESC_STATUS_SHIFT;
1253 if (skb->ip_summed == CHECKSUM_PARTIAL)
1254 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1255
1256 ring->curr_desc++;
1257 if (ring->curr_desc == ring->size)
1258 ring->curr_desc = 0;
1259 ring->desc_count--;
1260
1261 /* Ensure write completion of the descriptor status/length
1262 * in DRAM before the System Port WRITE_PORT register latches
1263 * the value
1264 */
1265 wmb();
1266 desc->addr_status_len = len_status;
1267 wmb();
1268
1269 /* Write this descriptor address to the RING write port */
1270 tdma_port_write_desc_addr(priv, desc, ring->index);
1271
1272 /* Check ring space and update SW control flow */
1273 if (ring->desc_count == 0)
1274 netif_tx_stop_queue(txq);
1275
1276 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1277 ring->index, ring->desc_count, ring->curr_desc);
1278
1279 ret = NETDEV_TX_OK;
1280 out:
1281 spin_unlock_irqrestore(&ring->lock, flags);
1282 return ret;
1283 }
1284
1285 static void bcm_sysport_tx_timeout(struct net_device *dev)
1286 {
1287 netdev_warn(dev, "transmit timeout!\n");
1288
1289 netif_trans_update(dev);
1290 dev->stats.tx_errors++;
1291
1292 netif_tx_wake_all_queues(dev);
1293 }
1294
1295 /* phylib adjust link callback */
1296 static void bcm_sysport_adj_link(struct net_device *dev)
1297 {
1298 struct bcm_sysport_priv *priv = netdev_priv(dev);
1299 struct phy_device *phydev = dev->phydev;
1300 unsigned int changed = 0;
1301 u32 cmd_bits = 0, reg;
1302
1303 if (priv->old_link != phydev->link) {
1304 changed = 1;
1305 priv->old_link = phydev->link;
1306 }
1307
1308 if (priv->old_duplex != phydev->duplex) {
1309 changed = 1;
1310 priv->old_duplex = phydev->duplex;
1311 }
1312
1313 if (priv->is_lite)
1314 goto out;
1315
1316 switch (phydev->speed) {
1317 case SPEED_2500:
1318 cmd_bits = CMD_SPEED_2500;
1319 break;
1320 case SPEED_1000:
1321 cmd_bits = CMD_SPEED_1000;
1322 break;
1323 case SPEED_100:
1324 cmd_bits = CMD_SPEED_100;
1325 break;
1326 case SPEED_10:
1327 cmd_bits = CMD_SPEED_10;
1328 break;
1329 default:
1330 break;
1331 }
1332 cmd_bits <<= CMD_SPEED_SHIFT;
1333
1334 if (phydev->duplex == DUPLEX_HALF)
1335 cmd_bits |= CMD_HD_EN;
1336
1337 if (priv->old_pause != phydev->pause) {
1338 changed = 1;
1339 priv->old_pause = phydev->pause;
1340 }
1341
1342 if (!phydev->pause)
1343 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1344
1345 if (!changed)
1346 return;
1347
1348 if (phydev->link) {
1349 reg = umac_readl(priv, UMAC_CMD);
1350 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1351 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1352 CMD_TX_PAUSE_IGNORE);
1353 reg |= cmd_bits;
1354 umac_writel(priv, reg, UMAC_CMD);
1355 }
1356 out:
1357 if (changed)
1358 phy_print_status(phydev);
1359 }
1360
1361 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1362 unsigned int index)
1363 {
1364 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1365 struct device *kdev = &priv->pdev->dev;
1366 size_t size;
1367 void *p;
1368 u32 reg;
1369
1370 /* Simple descriptors partitioning for now */
1371 size = 256;
1372
1373 /* We just need one DMA descriptor which is DMA-able, since writing to
1374 * the port will allocate a new descriptor in its internal linked-list
1375 */
1376 p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1377 GFP_KERNEL);
1378 if (!p) {
1379 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1380 return -ENOMEM;
1381 }
1382
1383 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1384 if (!ring->cbs) {
1385 dma_free_coherent(kdev, sizeof(struct dma_desc),
1386 ring->desc_cpu, ring->desc_dma);
1387 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1388 return -ENOMEM;
1389 }
1390
1391 /* Initialize SW view of the ring */
1392 spin_lock_init(&ring->lock);
1393 ring->priv = priv;
1394 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1395 ring->index = index;
1396 ring->size = size;
1397 ring->alloc_size = ring->size;
1398 ring->desc_cpu = p;
1399 ring->desc_count = ring->size;
1400 ring->curr_desc = 0;
1401
1402 /* Initialize HW ring */
1403 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1404 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1405 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1406 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1407
1408 /* Configure QID and port mapping */
1409 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index));
1410 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT);
1411 if (ring->inspect) {
1412 reg |= ring->switch_queue & RING_QID_MASK;
1413 reg |= ring->switch_port << RING_PORT_ID_SHIFT;
1414 } else {
1415 reg |= RING_IGNORE_STATUS;
1416 }
1417 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index));
1418 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1419
1420 /* Enable ACB algorithm 2 */
1421 reg = tdma_readl(priv, TDMA_CONTROL);
1422 reg |= tdma_control_bit(priv, ACB_ALGO);
1423 tdma_writel(priv, reg, TDMA_CONTROL);
1424
1425 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
1426 * with the original definition of ACB_ALGO
1427 */
1428 reg = tdma_readl(priv, TDMA_CONTROL);
1429 if (priv->is_lite)
1430 reg &= ~BIT(TSB_SWAP1);
1431 /* Set a correct TSB format based on host endian */
1432 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1433 reg |= tdma_control_bit(priv, TSB_SWAP0);
1434 else
1435 reg &= ~tdma_control_bit(priv, TSB_SWAP0);
1436 tdma_writel(priv, reg, TDMA_CONTROL);
1437
1438 /* Program the number of descriptors as MAX_THRESHOLD and half of
1439 * its size for the hysteresis trigger
1440 */
1441 tdma_writel(priv, ring->size |
1442 1 << RING_HYST_THRESH_SHIFT,
1443 TDMA_DESC_RING_MAX_HYST(index));
1444
1445 /* Enable the ring queue in the arbiter */
1446 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1447 reg |= (1 << index);
1448 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1449
1450 napi_enable(&ring->napi);
1451
1452 netif_dbg(priv, hw, priv->netdev,
1453 "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n",
1454 ring->size, ring->desc_cpu, ring->switch_queue,
1455 ring->switch_port);
1456
1457 return 0;
1458 }
1459
1460 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1461 unsigned int index)
1462 {
1463 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1464 struct device *kdev = &priv->pdev->dev;
1465 u32 reg;
1466
1467 /* Caller should stop the TDMA engine */
1468 reg = tdma_readl(priv, TDMA_STATUS);
1469 if (!(reg & TDMA_DISABLED))
1470 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1471
1472 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1473 * fail, so by checking this pointer we know whether the TX ring was
1474 * fully initialized or not.
1475 */
1476 if (!ring->cbs)
1477 return;
1478
1479 napi_disable(&ring->napi);
1480 netif_napi_del(&ring->napi);
1481
1482 bcm_sysport_tx_clean(priv, ring);
1483
1484 kfree(ring->cbs);
1485 ring->cbs = NULL;
1486
1487 if (ring->desc_dma) {
1488 dma_free_coherent(kdev, sizeof(struct dma_desc),
1489 ring->desc_cpu, ring->desc_dma);
1490 ring->desc_dma = 0;
1491 }
1492 ring->size = 0;
1493 ring->alloc_size = 0;
1494
1495 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1496 }
1497
1498 /* RDMA helper */
1499 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1500 unsigned int enable)
1501 {
1502 unsigned int timeout = 1000;
1503 u32 reg;
1504
1505 reg = rdma_readl(priv, RDMA_CONTROL);
1506 if (enable)
1507 reg |= RDMA_EN;
1508 else
1509 reg &= ~RDMA_EN;
1510 rdma_writel(priv, reg, RDMA_CONTROL);
1511
1512 /* Poll for RMDA disabling completion */
1513 do {
1514 reg = rdma_readl(priv, RDMA_STATUS);
1515 if (!!(reg & RDMA_DISABLED) == !enable)
1516 return 0;
1517 usleep_range(1000, 2000);
1518 } while (timeout-- > 0);
1519
1520 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1521
1522 return -ETIMEDOUT;
1523 }
1524
1525 /* TDMA helper */
1526 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1527 unsigned int enable)
1528 {
1529 unsigned int timeout = 1000;
1530 u32 reg;
1531
1532 reg = tdma_readl(priv, TDMA_CONTROL);
1533 if (enable)
1534 reg |= tdma_control_bit(priv, TDMA_EN);
1535 else
1536 reg &= ~tdma_control_bit(priv, TDMA_EN);
1537 tdma_writel(priv, reg, TDMA_CONTROL);
1538
1539 /* Poll for TMDA disabling completion */
1540 do {
1541 reg = tdma_readl(priv, TDMA_STATUS);
1542 if (!!(reg & TDMA_DISABLED) == !enable)
1543 return 0;
1544
1545 usleep_range(1000, 2000);
1546 } while (timeout-- > 0);
1547
1548 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1549
1550 return -ETIMEDOUT;
1551 }
1552
1553 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1554 {
1555 struct bcm_sysport_cb *cb;
1556 u32 reg;
1557 int ret;
1558 int i;
1559
1560 /* Initialize SW view of the RX ring */
1561 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
1562 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1563 priv->rx_c_index = 0;
1564 priv->rx_read_ptr = 0;
1565 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1566 GFP_KERNEL);
1567 if (!priv->rx_cbs) {
1568 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1569 return -ENOMEM;
1570 }
1571
1572 for (i = 0; i < priv->num_rx_bds; i++) {
1573 cb = priv->rx_cbs + i;
1574 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1575 }
1576
1577 ret = bcm_sysport_alloc_rx_bufs(priv);
1578 if (ret) {
1579 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1580 return ret;
1581 }
1582
1583 /* Initialize HW, ensure RDMA is disabled */
1584 reg = rdma_readl(priv, RDMA_STATUS);
1585 if (!(reg & RDMA_DISABLED))
1586 rdma_enable_set(priv, 0);
1587
1588 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1589 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1590 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1591 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1592 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1593 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1594 /* Operate the queue in ring mode */
1595 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1596 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1597 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1598 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
1599
1600 rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1601
1602 netif_dbg(priv, hw, priv->netdev,
1603 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1604 priv->num_rx_bds, priv->rx_bds);
1605
1606 return 0;
1607 }
1608
1609 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1610 {
1611 struct bcm_sysport_cb *cb;
1612 unsigned int i;
1613 u32 reg;
1614
1615 /* Caller should ensure RDMA is disabled */
1616 reg = rdma_readl(priv, RDMA_STATUS);
1617 if (!(reg & RDMA_DISABLED))
1618 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1619
1620 for (i = 0; i < priv->num_rx_bds; i++) {
1621 cb = &priv->rx_cbs[i];
1622 if (dma_unmap_addr(cb, dma_addr))
1623 dma_unmap_single(&priv->pdev->dev,
1624 dma_unmap_addr(cb, dma_addr),
1625 RX_BUF_LENGTH, DMA_FROM_DEVICE);
1626 bcm_sysport_free_cb(cb);
1627 }
1628
1629 kfree(priv->rx_cbs);
1630 priv->rx_cbs = NULL;
1631
1632 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1633 }
1634
1635 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1636 {
1637 struct bcm_sysport_priv *priv = netdev_priv(dev);
1638 u32 reg;
1639
1640 if (priv->is_lite)
1641 return;
1642
1643 reg = umac_readl(priv, UMAC_CMD);
1644 if (dev->flags & IFF_PROMISC)
1645 reg |= CMD_PROMISC;
1646 else
1647 reg &= ~CMD_PROMISC;
1648 umac_writel(priv, reg, UMAC_CMD);
1649
1650 /* No support for ALLMULTI */
1651 if (dev->flags & IFF_ALLMULTI)
1652 return;
1653 }
1654
1655 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1656 u32 mask, unsigned int enable)
1657 {
1658 u32 reg;
1659
1660 if (!priv->is_lite) {
1661 reg = umac_readl(priv, UMAC_CMD);
1662 if (enable)
1663 reg |= mask;
1664 else
1665 reg &= ~mask;
1666 umac_writel(priv, reg, UMAC_CMD);
1667 } else {
1668 reg = gib_readl(priv, GIB_CONTROL);
1669 if (enable)
1670 reg |= mask;
1671 else
1672 reg &= ~mask;
1673 gib_writel(priv, reg, GIB_CONTROL);
1674 }
1675
1676 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1677 * to be processed (1 msec).
1678 */
1679 if (enable == 0)
1680 usleep_range(1000, 2000);
1681 }
1682
1683 static inline void umac_reset(struct bcm_sysport_priv *priv)
1684 {
1685 u32 reg;
1686
1687 if (priv->is_lite)
1688 return;
1689
1690 reg = umac_readl(priv, UMAC_CMD);
1691 reg |= CMD_SW_RESET;
1692 umac_writel(priv, reg, UMAC_CMD);
1693 udelay(10);
1694 reg = umac_readl(priv, UMAC_CMD);
1695 reg &= ~CMD_SW_RESET;
1696 umac_writel(priv, reg, UMAC_CMD);
1697 }
1698
1699 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1700 unsigned char *addr)
1701 {
1702 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
1703 addr[3];
1704 u32 mac1 = (addr[4] << 8) | addr[5];
1705
1706 if (!priv->is_lite) {
1707 umac_writel(priv, mac0, UMAC_MAC0);
1708 umac_writel(priv, mac1, UMAC_MAC1);
1709 } else {
1710 gib_writel(priv, mac0, GIB_MAC0);
1711 gib_writel(priv, mac1, GIB_MAC1);
1712 }
1713 }
1714
1715 static void topctrl_flush(struct bcm_sysport_priv *priv)
1716 {
1717 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1718 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1719 mdelay(1);
1720 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1721 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1722 }
1723
1724 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1725 {
1726 struct bcm_sysport_priv *priv = netdev_priv(dev);
1727 struct sockaddr *addr = p;
1728
1729 if (!is_valid_ether_addr(addr->sa_data))
1730 return -EINVAL;
1731
1732 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1733
1734 /* interface is disabled, changes to MAC will be reflected on next
1735 * open call
1736 */
1737 if (!netif_running(dev))
1738 return 0;
1739
1740 umac_set_hw_addr(priv, dev->dev_addr);
1741
1742 return 0;
1743 }
1744
1745 static void bcm_sysport_get_stats64(struct net_device *dev,
1746 struct rtnl_link_stats64 *stats)
1747 {
1748 struct bcm_sysport_priv *priv = netdev_priv(dev);
1749 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
1750 unsigned int start;
1751
1752 netdev_stats_to_stats64(stats, &dev->stats);
1753
1754 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
1755 &stats->tx_packets);
1756
1757 do {
1758 start = u64_stats_fetch_begin_irq(&priv->syncp);
1759 stats->rx_packets = stats64->rx_packets;
1760 stats->rx_bytes = stats64->rx_bytes;
1761 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
1762 }
1763
1764 static void bcm_sysport_netif_start(struct net_device *dev)
1765 {
1766 struct bcm_sysport_priv *priv = netdev_priv(dev);
1767
1768 /* Enable NAPI */
1769 napi_enable(&priv->napi);
1770
1771 /* Enable RX interrupt and TX ring full interrupt */
1772 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1773
1774 phy_start(dev->phydev);
1775
1776 /* Enable TX interrupts for the TXQs */
1777 if (!priv->is_lite)
1778 intrl2_1_mask_clear(priv, 0xffffffff);
1779 else
1780 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
1781
1782 /* Last call before we start the real business */
1783 netif_tx_start_all_queues(dev);
1784 }
1785
1786 static void rbuf_init(struct bcm_sysport_priv *priv)
1787 {
1788 u32 reg;
1789
1790 reg = rbuf_readl(priv, RBUF_CONTROL);
1791 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1792 /* Set a correct RSB format on SYSTEMPORT Lite */
1793 if (priv->is_lite)
1794 reg &= ~RBUF_RSB_SWAP1;
1795
1796 /* Set a correct RSB format based on host endian */
1797 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1798 reg |= RBUF_RSB_SWAP0;
1799 else
1800 reg &= ~RBUF_RSB_SWAP0;
1801 rbuf_writel(priv, reg, RBUF_CONTROL);
1802 }
1803
1804 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
1805 {
1806 intrl2_0_mask_set(priv, 0xffffffff);
1807 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1808 if (!priv->is_lite) {
1809 intrl2_1_mask_set(priv, 0xffffffff);
1810 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1811 }
1812 }
1813
1814 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
1815 {
1816 u32 reg;
1817
1818 reg = gib_readl(priv, GIB_CONTROL);
1819 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
1820 if (netdev_uses_dsa(priv->netdev)) {
1821 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
1822 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
1823 }
1824 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
1825 reg |= 12 << GIB_IPG_LEN_SHIFT;
1826 gib_writel(priv, reg, GIB_CONTROL);
1827 }
1828
1829 static int bcm_sysport_open(struct net_device *dev)
1830 {
1831 struct bcm_sysport_priv *priv = netdev_priv(dev);
1832 struct phy_device *phydev;
1833 unsigned int i;
1834 int ret;
1835
1836 /* Reset UniMAC */
1837 umac_reset(priv);
1838
1839 /* Flush TX and RX FIFOs at TOPCTRL level */
1840 topctrl_flush(priv);
1841
1842 /* Disable the UniMAC RX/TX */
1843 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1844
1845 /* Enable RBUF 2bytes alignment and Receive Status Block */
1846 rbuf_init(priv);
1847
1848 /* Set maximum frame length */
1849 if (!priv->is_lite)
1850 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1851 else
1852 gib_set_pad_extension(priv);
1853
1854 /* Set MAC address */
1855 umac_set_hw_addr(priv, dev->dev_addr);
1856
1857 /* Read CRC forward */
1858 if (!priv->is_lite)
1859 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1860 else
1861 priv->crc_fwd = !!(gib_readl(priv, GIB_CONTROL) &
1862 GIB_FCS_STRIP);
1863
1864 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1865 0, priv->phy_interface);
1866 if (!phydev) {
1867 netdev_err(dev, "could not attach to PHY\n");
1868 return -ENODEV;
1869 }
1870
1871 /* Reset house keeping link status */
1872 priv->old_duplex = -1;
1873 priv->old_link = -1;
1874 priv->old_pause = -1;
1875
1876 /* mask all interrupts and request them */
1877 bcm_sysport_mask_all_intrs(priv);
1878
1879 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1880 if (ret) {
1881 netdev_err(dev, "failed to request RX interrupt\n");
1882 goto out_phy_disconnect;
1883 }
1884
1885 if (!priv->is_lite) {
1886 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
1887 dev->name, dev);
1888 if (ret) {
1889 netdev_err(dev, "failed to request TX interrupt\n");
1890 goto out_free_irq0;
1891 }
1892 }
1893
1894 /* Initialize both hardware and software ring */
1895 for (i = 0; i < dev->num_tx_queues; i++) {
1896 ret = bcm_sysport_init_tx_ring(priv, i);
1897 if (ret) {
1898 netdev_err(dev, "failed to initialize TX ring %d\n",
1899 i);
1900 goto out_free_tx_ring;
1901 }
1902 }
1903
1904 /* Initialize linked-list */
1905 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1906
1907 /* Initialize RX ring */
1908 ret = bcm_sysport_init_rx_ring(priv);
1909 if (ret) {
1910 netdev_err(dev, "failed to initialize RX ring\n");
1911 goto out_free_rx_ring;
1912 }
1913
1914 /* Turn on RDMA */
1915 ret = rdma_enable_set(priv, 1);
1916 if (ret)
1917 goto out_free_rx_ring;
1918
1919 /* Turn on TDMA */
1920 ret = tdma_enable_set(priv, 1);
1921 if (ret)
1922 goto out_clear_rx_int;
1923
1924 /* Turn on UniMAC TX/RX */
1925 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1926
1927 bcm_sysport_netif_start(dev);
1928
1929 return 0;
1930
1931 out_clear_rx_int:
1932 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1933 out_free_rx_ring:
1934 bcm_sysport_fini_rx_ring(priv);
1935 out_free_tx_ring:
1936 for (i = 0; i < dev->num_tx_queues; i++)
1937 bcm_sysport_fini_tx_ring(priv, i);
1938 if (!priv->is_lite)
1939 free_irq(priv->irq1, dev);
1940 out_free_irq0:
1941 free_irq(priv->irq0, dev);
1942 out_phy_disconnect:
1943 phy_disconnect(phydev);
1944 return ret;
1945 }
1946
1947 static void bcm_sysport_netif_stop(struct net_device *dev)
1948 {
1949 struct bcm_sysport_priv *priv = netdev_priv(dev);
1950
1951 /* stop all software from updating hardware */
1952 netif_tx_stop_all_queues(dev);
1953 napi_disable(&priv->napi);
1954 phy_stop(dev->phydev);
1955
1956 /* mask all interrupts */
1957 bcm_sysport_mask_all_intrs(priv);
1958 }
1959
1960 static int bcm_sysport_stop(struct net_device *dev)
1961 {
1962 struct bcm_sysport_priv *priv = netdev_priv(dev);
1963 unsigned int i;
1964 int ret;
1965
1966 bcm_sysport_netif_stop(dev);
1967
1968 /* Disable UniMAC RX */
1969 umac_enable_set(priv, CMD_RX_EN, 0);
1970
1971 ret = tdma_enable_set(priv, 0);
1972 if (ret) {
1973 netdev_err(dev, "timeout disabling RDMA\n");
1974 return ret;
1975 }
1976
1977 /* Wait for a maximum packet size to be drained */
1978 usleep_range(2000, 3000);
1979
1980 ret = rdma_enable_set(priv, 0);
1981 if (ret) {
1982 netdev_err(dev, "timeout disabling TDMA\n");
1983 return ret;
1984 }
1985
1986 /* Disable UniMAC TX */
1987 umac_enable_set(priv, CMD_TX_EN, 0);
1988
1989 /* Free RX/TX rings SW structures */
1990 for (i = 0; i < dev->num_tx_queues; i++)
1991 bcm_sysport_fini_tx_ring(priv, i);
1992 bcm_sysport_fini_rx_ring(priv);
1993
1994 free_irq(priv->irq0, dev);
1995 if (!priv->is_lite)
1996 free_irq(priv->irq1, dev);
1997
1998 /* Disconnect from PHY */
1999 phy_disconnect(dev->phydev);
2000
2001 return 0;
2002 }
2003
2004 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
2005 .get_drvinfo = bcm_sysport_get_drvinfo,
2006 .get_msglevel = bcm_sysport_get_msglvl,
2007 .set_msglevel = bcm_sysport_set_msglvl,
2008 .get_link = ethtool_op_get_link,
2009 .get_strings = bcm_sysport_get_strings,
2010 .get_ethtool_stats = bcm_sysport_get_stats,
2011 .get_sset_count = bcm_sysport_get_sset_count,
2012 .get_wol = bcm_sysport_get_wol,
2013 .set_wol = bcm_sysport_set_wol,
2014 .get_coalesce = bcm_sysport_get_coalesce,
2015 .set_coalesce = bcm_sysport_set_coalesce,
2016 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2017 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2018 };
2019
2020 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb,
2021 void *accel_priv,
2022 select_queue_fallback_t fallback)
2023 {
2024 struct bcm_sysport_priv *priv = netdev_priv(dev);
2025 u16 queue = skb_get_queue_mapping(skb);
2026 struct bcm_sysport_tx_ring *tx_ring;
2027 unsigned int q, port;
2028
2029 if (!netdev_uses_dsa(dev))
2030 return fallback(dev, skb);
2031
2032 /* DSA tagging layer will have configured the correct queue */
2033 q = BRCM_TAG_GET_QUEUE(queue);
2034 port = BRCM_TAG_GET_PORT(queue);
2035 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
2036
2037 if (unlikely(!tx_ring))
2038 return fallback(dev, skb);
2039
2040 return tx_ring->index;
2041 }
2042
2043 static const struct net_device_ops bcm_sysport_netdev_ops = {
2044 .ndo_start_xmit = bcm_sysport_xmit,
2045 .ndo_tx_timeout = bcm_sysport_tx_timeout,
2046 .ndo_open = bcm_sysport_open,
2047 .ndo_stop = bcm_sysport_stop,
2048 .ndo_set_features = bcm_sysport_set_features,
2049 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
2050 .ndo_set_mac_address = bcm_sysport_change_mac,
2051 #ifdef CONFIG_NET_POLL_CONTROLLER
2052 .ndo_poll_controller = bcm_sysport_poll_controller,
2053 #endif
2054 .ndo_get_stats64 = bcm_sysport_get_stats64,
2055 .ndo_select_queue = bcm_sysport_select_queue,
2056 };
2057
2058 static int bcm_sysport_map_queues(struct net_device *dev,
2059 struct dsa_notifier_register_info *info)
2060 {
2061 struct bcm_sysport_priv *priv = netdev_priv(dev);
2062 struct bcm_sysport_tx_ring *ring;
2063 struct net_device *slave_dev;
2064 unsigned int num_tx_queues;
2065 unsigned int q, start, port;
2066
2067 /* We can't be setting up queue inspection for non directly attached
2068 * switches
2069 */
2070 if (info->switch_number)
2071 return 0;
2072
2073 if (dev->netdev_ops != &bcm_sysport_netdev_ops)
2074 return 0;
2075
2076 port = info->port_number;
2077 slave_dev = info->info.dev;
2078
2079 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a
2080 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of
2081 * per-port (slave_dev) network devices queue, we achieve just that.
2082 * This need to happen now before any slave network device is used such
2083 * it accurately reflects the number of real TX queues.
2084 */
2085 if (priv->is_lite)
2086 netif_set_real_num_tx_queues(slave_dev,
2087 slave_dev->num_tx_queues / 2);
2088 num_tx_queues = slave_dev->real_num_tx_queues;
2089
2090 if (priv->per_port_num_tx_queues &&
2091 priv->per_port_num_tx_queues != num_tx_queues)
2092 netdev_warn(slave_dev, "asymetric number of per-port queues\n");
2093
2094 priv->per_port_num_tx_queues = num_tx_queues;
2095
2096 start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues);
2097 for (q = 0; q < num_tx_queues; q++) {
2098 ring = &priv->tx_rings[q + start];
2099
2100 /* Just remember the mapping actual programming done
2101 * during bcm_sysport_init_tx_ring
2102 */
2103 ring->switch_queue = q;
2104 ring->switch_port = port;
2105 ring->inspect = true;
2106 priv->ring_map[q + port * num_tx_queues] = ring;
2107
2108 /* Set all queues as being used now */
2109 set_bit(q + start, &priv->queue_bitmap);
2110 }
2111
2112 return 0;
2113 }
2114
2115 static int bcm_sysport_dsa_notifier(struct notifier_block *unused,
2116 unsigned long event, void *ptr)
2117 {
2118 struct dsa_notifier_register_info *info;
2119
2120 if (event != DSA_PORT_REGISTER)
2121 return NOTIFY_DONE;
2122
2123 info = ptr;
2124
2125 return notifier_from_errno(bcm_sysport_map_queues(info->master, info));
2126 }
2127
2128 #define REV_FMT "v%2x.%02x"
2129
2130 static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
2131 [SYSTEMPORT] = {
2132 .is_lite = false,
2133 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
2134 },
2135 [SYSTEMPORT_LITE] = {
2136 .is_lite = true,
2137 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
2138 },
2139 };
2140
2141 static const struct of_device_id bcm_sysport_of_match[] = {
2142 { .compatible = "brcm,systemportlite-v1.00",
2143 .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
2144 { .compatible = "brcm,systemport-v1.00",
2145 .data = &bcm_sysport_params[SYSTEMPORT] },
2146 { .compatible = "brcm,systemport",
2147 .data = &bcm_sysport_params[SYSTEMPORT] },
2148 { /* sentinel */ }
2149 };
2150 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2151
2152 static int bcm_sysport_probe(struct platform_device *pdev)
2153 {
2154 const struct bcm_sysport_hw_params *params;
2155 const struct of_device_id *of_id = NULL;
2156 struct bcm_sysport_priv *priv;
2157 struct device_node *dn;
2158 struct net_device *dev;
2159 const void *macaddr;
2160 struct resource *r;
2161 u32 txq, rxq;
2162 int ret;
2163
2164 dn = pdev->dev.of_node;
2165 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2166 of_id = of_match_node(bcm_sysport_of_match, dn);
2167 if (!of_id || !of_id->data)
2168 return -EINVAL;
2169
2170 /* Fairly quickly we need to know the type of adapter we have */
2171 params = of_id->data;
2172
2173 /* Read the Transmit/Receive Queue properties */
2174 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
2175 txq = TDMA_NUM_RINGS;
2176 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
2177 rxq = 1;
2178
2179 /* Sanity check the number of transmit queues */
2180 if (!txq || txq > TDMA_NUM_RINGS)
2181 return -EINVAL;
2182
2183 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
2184 if (!dev)
2185 return -ENOMEM;
2186
2187 /* Initialize private members */
2188 priv = netdev_priv(dev);
2189
2190 /* Allocate number of TX rings */
2191 priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2192 sizeof(struct bcm_sysport_tx_ring),
2193 GFP_KERNEL);
2194 if (!priv->tx_rings)
2195 return -ENOMEM;
2196
2197 priv->is_lite = params->is_lite;
2198 priv->num_rx_desc_words = params->num_rx_desc_words;
2199
2200 priv->irq0 = platform_get_irq(pdev, 0);
2201 if (!priv->is_lite) {
2202 priv->irq1 = platform_get_irq(pdev, 1);
2203 priv->wol_irq = platform_get_irq(pdev, 2);
2204 } else {
2205 priv->wol_irq = platform_get_irq(pdev, 1);
2206 }
2207 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
2208 dev_err(&pdev->dev, "invalid interrupts\n");
2209 ret = -EINVAL;
2210 goto err_free_netdev;
2211 }
2212
2213 priv->base = devm_ioremap_resource(&pdev->dev, r);
2214 if (IS_ERR(priv->base)) {
2215 ret = PTR_ERR(priv->base);
2216 goto err_free_netdev;
2217 }
2218
2219 priv->netdev = dev;
2220 priv->pdev = pdev;
2221
2222 priv->phy_interface = of_get_phy_mode(dn);
2223 /* Default to GMII interface mode */
2224 if (priv->phy_interface < 0)
2225 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
2226
2227 /* In the case of a fixed PHY, the DT node associated
2228 * to the PHY is the Ethernet MAC DT node.
2229 */
2230 if (of_phy_is_fixed_link(dn)) {
2231 ret = of_phy_register_fixed_link(dn);
2232 if (ret) {
2233 dev_err(&pdev->dev, "failed to register fixed PHY\n");
2234 goto err_free_netdev;
2235 }
2236
2237 priv->phy_dn = dn;
2238 }
2239
2240 /* Initialize netdevice members */
2241 macaddr = of_get_mac_address(dn);
2242 if (!macaddr || !is_valid_ether_addr(macaddr)) {
2243 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
2244 eth_hw_addr_random(dev);
2245 } else {
2246 ether_addr_copy(dev->dev_addr, macaddr);
2247 }
2248
2249 SET_NETDEV_DEV(dev, &pdev->dev);
2250 dev_set_drvdata(&pdev->dev, dev);
2251 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
2252 dev->netdev_ops = &bcm_sysport_netdev_ops;
2253 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
2254
2255 /* HW supported features, none enabled by default */
2256 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
2257 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2258
2259 /* Request the WOL interrupt and advertise suspend if available */
2260 priv->wol_irq_disabled = 1;
2261 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
2262 bcm_sysport_wol_isr, 0, dev->name, priv);
2263 if (!ret)
2264 device_set_wakeup_capable(&pdev->dev, 1);
2265
2266 /* Set the needed headroom once and for all */
2267 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
2268 dev->needed_headroom += sizeof(struct bcm_tsb);
2269
2270 /* libphy will adjust the link state accordingly */
2271 netif_carrier_off(dev);
2272
2273 u64_stats_init(&priv->syncp);
2274
2275 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier;
2276
2277 ret = register_dsa_notifier(&priv->dsa_notifier);
2278 if (ret) {
2279 dev_err(&pdev->dev, "failed to register DSA notifier\n");
2280 goto err_deregister_fixed_link;
2281 }
2282
2283 ret = register_netdev(dev);
2284 if (ret) {
2285 dev_err(&pdev->dev, "failed to register net_device\n");
2286 goto err_deregister_notifier;
2287 }
2288
2289 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
2290 dev_info(&pdev->dev,
2291 "Broadcom SYSTEMPORT%s" REV_FMT
2292 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
2293 priv->is_lite ? " Lite" : "",
2294 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
2295 priv->base, priv->irq0, priv->irq1, txq, rxq);
2296
2297 return 0;
2298
2299 err_deregister_notifier:
2300 unregister_dsa_notifier(&priv->dsa_notifier);
2301 err_deregister_fixed_link:
2302 if (of_phy_is_fixed_link(dn))
2303 of_phy_deregister_fixed_link(dn);
2304 err_free_netdev:
2305 free_netdev(dev);
2306 return ret;
2307 }
2308
2309 static int bcm_sysport_remove(struct platform_device *pdev)
2310 {
2311 struct net_device *dev = dev_get_drvdata(&pdev->dev);
2312 struct bcm_sysport_priv *priv = netdev_priv(dev);
2313 struct device_node *dn = pdev->dev.of_node;
2314
2315 /* Not much to do, ndo_close has been called
2316 * and we use managed allocations
2317 */
2318 unregister_dsa_notifier(&priv->dsa_notifier);
2319 unregister_netdev(dev);
2320 if (of_phy_is_fixed_link(dn))
2321 of_phy_deregister_fixed_link(dn);
2322 free_netdev(dev);
2323 dev_set_drvdata(&pdev->dev, NULL);
2324
2325 return 0;
2326 }
2327
2328 #ifdef CONFIG_PM_SLEEP
2329 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
2330 {
2331 struct net_device *ndev = priv->netdev;
2332 unsigned int timeout = 1000;
2333 u32 reg;
2334
2335 /* Password has already been programmed */
2336 reg = umac_readl(priv, UMAC_MPD_CTRL);
2337 reg |= MPD_EN;
2338 reg &= ~PSW_EN;
2339 if (priv->wolopts & WAKE_MAGICSECURE)
2340 reg |= PSW_EN;
2341 umac_writel(priv, reg, UMAC_MPD_CTRL);
2342
2343 /* Make sure RBUF entered WoL mode as result */
2344 do {
2345 reg = rbuf_readl(priv, RBUF_STATUS);
2346 if (reg & RBUF_WOL_MODE)
2347 break;
2348
2349 udelay(10);
2350 } while (timeout-- > 0);
2351
2352 /* Do not leave the UniMAC RBUF matching only MPD packets */
2353 if (!timeout) {
2354 reg = umac_readl(priv, UMAC_MPD_CTRL);
2355 reg &= ~MPD_EN;
2356 umac_writel(priv, reg, UMAC_MPD_CTRL);
2357 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
2358 return -ETIMEDOUT;
2359 }
2360
2361 /* UniMAC receive needs to be turned on */
2362 umac_enable_set(priv, CMD_RX_EN, 1);
2363
2364 /* Enable the interrupt wake-up source */
2365 intrl2_0_mask_clear(priv, INTRL2_0_MPD);
2366
2367 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
2368
2369 return 0;
2370 }
2371
2372 static int bcm_sysport_suspend(struct device *d)
2373 {
2374 struct net_device *dev = dev_get_drvdata(d);
2375 struct bcm_sysport_priv *priv = netdev_priv(dev);
2376 unsigned int i;
2377 int ret = 0;
2378 u32 reg;
2379
2380 if (!netif_running(dev))
2381 return 0;
2382
2383 bcm_sysport_netif_stop(dev);
2384
2385 phy_suspend(dev->phydev);
2386
2387 netif_device_detach(dev);
2388
2389 /* Disable UniMAC RX */
2390 umac_enable_set(priv, CMD_RX_EN, 0);
2391
2392 ret = rdma_enable_set(priv, 0);
2393 if (ret) {
2394 netdev_err(dev, "RDMA timeout!\n");
2395 return ret;
2396 }
2397
2398 /* Disable RXCHK if enabled */
2399 if (priv->rx_chk_en) {
2400 reg = rxchk_readl(priv, RXCHK_CONTROL);
2401 reg &= ~RXCHK_EN;
2402 rxchk_writel(priv, reg, RXCHK_CONTROL);
2403 }
2404
2405 /* Flush RX pipe */
2406 if (!priv->wolopts)
2407 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
2408
2409 ret = tdma_enable_set(priv, 0);
2410 if (ret) {
2411 netdev_err(dev, "TDMA timeout!\n");
2412 return ret;
2413 }
2414
2415 /* Wait for a packet boundary */
2416 usleep_range(2000, 3000);
2417
2418 umac_enable_set(priv, CMD_TX_EN, 0);
2419
2420 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
2421
2422 /* Free RX/TX rings SW structures */
2423 for (i = 0; i < dev->num_tx_queues; i++)
2424 bcm_sysport_fini_tx_ring(priv, i);
2425 bcm_sysport_fini_rx_ring(priv);
2426
2427 /* Get prepared for Wake-on-LAN */
2428 if (device_may_wakeup(d) && priv->wolopts)
2429 ret = bcm_sysport_suspend_to_wol(priv);
2430
2431 return ret;
2432 }
2433
2434 static int bcm_sysport_resume(struct device *d)
2435 {
2436 struct net_device *dev = dev_get_drvdata(d);
2437 struct bcm_sysport_priv *priv = netdev_priv(dev);
2438 unsigned int i;
2439 u32 reg;
2440 int ret;
2441
2442 if (!netif_running(dev))
2443 return 0;
2444
2445 umac_reset(priv);
2446
2447 /* We may have been suspended and never received a WOL event that
2448 * would turn off MPD detection, take care of that now
2449 */
2450 bcm_sysport_resume_from_wol(priv);
2451
2452 /* Initialize both hardware and software ring */
2453 for (i = 0; i < dev->num_tx_queues; i++) {
2454 ret = bcm_sysport_init_tx_ring(priv, i);
2455 if (ret) {
2456 netdev_err(dev, "failed to initialize TX ring %d\n",
2457 i);
2458 goto out_free_tx_rings;
2459 }
2460 }
2461
2462 /* Initialize linked-list */
2463 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2464
2465 /* Initialize RX ring */
2466 ret = bcm_sysport_init_rx_ring(priv);
2467 if (ret) {
2468 netdev_err(dev, "failed to initialize RX ring\n");
2469 goto out_free_rx_ring;
2470 }
2471
2472 netif_device_attach(dev);
2473
2474 /* RX pipe enable */
2475 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2476
2477 ret = rdma_enable_set(priv, 1);
2478 if (ret) {
2479 netdev_err(dev, "failed to enable RDMA\n");
2480 goto out_free_rx_ring;
2481 }
2482
2483 /* Enable rxhck */
2484 if (priv->rx_chk_en) {
2485 reg = rxchk_readl(priv, RXCHK_CONTROL);
2486 reg |= RXCHK_EN;
2487 rxchk_writel(priv, reg, RXCHK_CONTROL);
2488 }
2489
2490 rbuf_init(priv);
2491
2492 /* Set maximum frame length */
2493 if (!priv->is_lite)
2494 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2495 else
2496 gib_set_pad_extension(priv);
2497
2498 /* Set MAC address */
2499 umac_set_hw_addr(priv, dev->dev_addr);
2500
2501 umac_enable_set(priv, CMD_RX_EN, 1);
2502
2503 /* TX pipe enable */
2504 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2505
2506 umac_enable_set(priv, CMD_TX_EN, 1);
2507
2508 ret = tdma_enable_set(priv, 1);
2509 if (ret) {
2510 netdev_err(dev, "TDMA timeout!\n");
2511 goto out_free_rx_ring;
2512 }
2513
2514 phy_resume(dev->phydev);
2515
2516 bcm_sysport_netif_start(dev);
2517
2518 return 0;
2519
2520 out_free_rx_ring:
2521 bcm_sysport_fini_rx_ring(priv);
2522 out_free_tx_rings:
2523 for (i = 0; i < dev->num_tx_queues; i++)
2524 bcm_sysport_fini_tx_ring(priv, i);
2525 return ret;
2526 }
2527 #endif
2528
2529 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2530 bcm_sysport_suspend, bcm_sysport_resume);
2531
2532 static struct platform_driver bcm_sysport_driver = {
2533 .probe = bcm_sysport_probe,
2534 .remove = bcm_sysport_remove,
2535 .driver = {
2536 .name = "brcm-systemport",
2537 .of_match_table = bcm_sysport_of_match,
2538 .pm = &bcm_sysport_pm_ops,
2539 },
2540 };
2541 module_platform_driver(bcm_sysport_driver);
2542
2543 MODULE_AUTHOR("Broadcom Corporation");
2544 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2545 MODULE_ALIAS("platform:brcm-systemport");
2546 MODULE_LICENSE("GPL");
CRIS linux kernel tree