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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / net / ethernet / dec / tulip / de2104x.c
blob13430f75496cc3e2b981b02adb3b32275578c3ce
1 /* de2104x.c: A Linux PCI Ethernet driver for Intel/Digital 21040/1 chips. */
2 /*
3 Copyright 2001,2003 Jeff Garzik <jgarzik@pobox.com>
4
5 Copyright 1994, 1995 Digital Equipment Corporation. [de4x5.c]
6 Written/copyright 1994-2001 by Donald Becker. [tulip.c]
7
8 This software may be used and distributed according to the terms of
9 the GNU General Public License (GPL), incorporated herein by reference.
10 Drivers based on or derived from this code fall under the GPL and must
11 retain the authorship, copyright and license notice. This file is not
12 a complete program and may only be used when the entire operating
13 system is licensed under the GPL.
14
15 See the file COPYING in this distribution for more information.
16
17 TODO, in rough priority order:
18 * Support forcing media type with a module parameter,
19 like dl2k.c/sundance.c
20 * Constants (module parms?) for Rx work limit
21 * Complete reset on PciErr
22 * Jumbo frames / dev->change_mtu
23 * Adjust Rx FIFO threshold and Max Rx DMA burst on Rx FIFO error
24 * Adjust Tx FIFO threshold and Max Tx DMA burst on Tx FIFO error
25 * Implement Tx software interrupt mitigation via
26 Tx descriptor bit
27
28 */
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #define DRV_NAME "de2104x"
33 #define DRV_VERSION "0.7"
34 #define DRV_RELDATE "Mar 17, 2004"
35
36 #include <linux/module.h>
37 #include <linux/kernel.h>
38 #include <linux/netdevice.h>
39 #include <linux/etherdevice.h>
40 #include <linux/init.h>
41 #include <linux/interrupt.h>
42 #include <linux/pci.h>
43 #include <linux/delay.h>
44 #include <linux/ethtool.h>
45 #include <linux/compiler.h>
46 #include <linux/rtnetlink.h>
47 #include <linux/crc32.h>
48 #include <linux/slab.h>
49
50 #include <asm/io.h>
51 #include <asm/irq.h>
52 #include <linux/uaccess.h>
53 #include <asm/unaligned.h>
54
55 /* These identify the driver base version and may not be removed. */
56 static char version[] =
57 "PCI Ethernet driver v" DRV_VERSION " (" DRV_RELDATE ")";
58
59 MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>");
60 MODULE_DESCRIPTION("Intel/Digital 21040/1 series PCI Ethernet driver");
61 MODULE_LICENSE("GPL");
62 MODULE_VERSION(DRV_VERSION);
63
64 static int debug = -1;
65 module_param (debug, int, 0);
66 MODULE_PARM_DESC (debug, "de2104x bitmapped message enable number");
67
68 /* Set the copy breakpoint for the copy-only-tiny-buffer Rx structure. */
69 #if defined(__alpha__) || defined(__arm__) || defined(__hppa__) || \
70 defined(CONFIG_SPARC) || defined(__ia64__) || \
71 defined(__sh__) || defined(__mips__)
72 static int rx_copybreak = 1518;
73 #else
74 static int rx_copybreak = 100;
75 #endif
76 module_param (rx_copybreak, int, 0);
77 MODULE_PARM_DESC (rx_copybreak, "de2104x Breakpoint at which Rx packets are copied");
78
79 #define DE_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
80 NETIF_MSG_PROBE | \
81 NETIF_MSG_LINK | \
82 NETIF_MSG_IFDOWN | \
83 NETIF_MSG_IFUP | \
84 NETIF_MSG_RX_ERR | \
85 NETIF_MSG_TX_ERR)
86
87 /* Descriptor skip length in 32 bit longwords. */
88 #ifndef CONFIG_DE2104X_DSL
89 #define DSL 0
90 #else
91 #define DSL CONFIG_DE2104X_DSL
92 #endif
93
94 #define DE_RX_RING_SIZE 64
95 #define DE_TX_RING_SIZE 64
96 #define DE_RING_BYTES \
97 ((sizeof(struct de_desc) * DE_RX_RING_SIZE) + \
98 (sizeof(struct de_desc) * DE_TX_RING_SIZE))
99 #define NEXT_TX(N) (((N) + 1) & (DE_TX_RING_SIZE - 1))
100 #define NEXT_RX(N) (((N) + 1) & (DE_RX_RING_SIZE - 1))
101 #define TX_BUFFS_AVAIL(CP) \
102 (((CP)->tx_tail <= (CP)->tx_head) ? \
103 (CP)->tx_tail + (DE_TX_RING_SIZE - 1) - (CP)->tx_head : \
104 (CP)->tx_tail - (CP)->tx_head - 1)
105
106 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
107 #define RX_OFFSET 2
108
109 #define DE_SETUP_SKB ((struct sk_buff *) 1)
110 #define DE_DUMMY_SKB ((struct sk_buff *) 2)
111 #define DE_SETUP_FRAME_WORDS 96
112 #define DE_EEPROM_WORDS 256
113 #define DE_EEPROM_SIZE (DE_EEPROM_WORDS * sizeof(u16))
114 #define DE_MAX_MEDIA 5
115
116 #define DE_MEDIA_TP_AUTO 0
117 #define DE_MEDIA_BNC 1
118 #define DE_MEDIA_AUI 2
119 #define DE_MEDIA_TP 3
120 #define DE_MEDIA_TP_FD 4
121 #define DE_MEDIA_INVALID DE_MAX_MEDIA
122 #define DE_MEDIA_FIRST 0
123 #define DE_MEDIA_LAST (DE_MAX_MEDIA - 1)
124 #define DE_AUI_BNC (SUPPORTED_AUI | SUPPORTED_BNC)
125
126 #define DE_TIMER_LINK (60 * HZ)
127 #define DE_TIMER_NO_LINK (5 * HZ)
128
129 #define DE_NUM_REGS 16
130 #define DE_REGS_SIZE (DE_NUM_REGS * sizeof(u32))
131 #define DE_REGS_VER 1
132
133 /* Time in jiffies before concluding the transmitter is hung. */
134 #define TX_TIMEOUT (6*HZ)
135
136 /* This is a mysterious value that can be written to CSR11 in the 21040 (only)
137 to support a pre-NWay full-duplex signaling mechanism using short frames.
138 No one knows what it should be, but if left at its default value some
139 10base2(!) packets trigger a full-duplex-request interrupt. */
140 #define FULL_DUPLEX_MAGIC 0x6969
141
142 enum {
143 /* NIC registers */
144 BusMode = 0x00,
145 TxPoll = 0x08,
146 RxPoll = 0x10,
147 RxRingAddr = 0x18,
148 TxRingAddr = 0x20,
149 MacStatus = 0x28,
150 MacMode = 0x30,
151 IntrMask = 0x38,
152 RxMissed = 0x40,
153 ROMCmd = 0x48,
154 CSR11 = 0x58,
155 SIAStatus = 0x60,
156 CSR13 = 0x68,
157 CSR14 = 0x70,
158 CSR15 = 0x78,
159 PCIPM = 0x40,
160
161 /* BusMode bits */
162 CmdReset = (1 << 0),
163 CacheAlign16 = 0x00008000,
164 BurstLen4 = 0x00000400,
165 DescSkipLen = (DSL << 2),
166
167 /* Rx/TxPoll bits */
168 NormalTxPoll = (1 << 0),
169 NormalRxPoll = (1 << 0),
170
171 /* Tx/Rx descriptor status bits */
172 DescOwn = (1 << 31),
173 RxError = (1 << 15),
174 RxErrLong = (1 << 7),
175 RxErrCRC = (1 << 1),
176 RxErrFIFO = (1 << 0),
177 RxErrRunt = (1 << 11),
178 RxErrFrame = (1 << 14),
179 RingEnd = (1 << 25),
180 FirstFrag = (1 << 29),
181 LastFrag = (1 << 30),
182 TxError = (1 << 15),
183 TxFIFOUnder = (1 << 1),
184 TxLinkFail = (1 << 2) | (1 << 10) | (1 << 11),
185 TxMaxCol = (1 << 8),
186 TxOWC = (1 << 9),
187 TxJabber = (1 << 14),
188 SetupFrame = (1 << 27),
189 TxSwInt = (1 << 31),
190
191 /* MacStatus bits */
192 IntrOK = (1 << 16),
193 IntrErr = (1 << 15),
194 RxIntr = (1 << 6),
195 RxEmpty = (1 << 7),
196 TxIntr = (1 << 0),
197 TxEmpty = (1 << 2),
198 PciErr = (1 << 13),
199 TxState = (1 << 22) | (1 << 21) | (1 << 20),
200 RxState = (1 << 19) | (1 << 18) | (1 << 17),
201 LinkFail = (1 << 12),
202 LinkPass = (1 << 4),
203 RxStopped = (1 << 8),
204 TxStopped = (1 << 1),
205
206 /* MacMode bits */
207 TxEnable = (1 << 13),
208 RxEnable = (1 << 1),
209 RxTx = TxEnable | RxEnable,
210 FullDuplex = (1 << 9),
211 AcceptAllMulticast = (1 << 7),
212 AcceptAllPhys = (1 << 6),
213 BOCnt = (1 << 5),
214 MacModeClear = (1<<12) | (1<<11) | (1<<10) | (1<<8) | (1<<3) |
215 RxTx | BOCnt | AcceptAllPhys | AcceptAllMulticast,
216
217 /* ROMCmd bits */
218 EE_SHIFT_CLK = 0x02, /* EEPROM shift clock. */
219 EE_CS = 0x01, /* EEPROM chip select. */
220 EE_DATA_WRITE = 0x04, /* Data from the Tulip to EEPROM. */
221 EE_WRITE_0 = 0x01,
222 EE_WRITE_1 = 0x05,
223 EE_DATA_READ = 0x08, /* Data from the EEPROM chip. */
224 EE_ENB = (0x4800 | EE_CS),
225
226 /* The EEPROM commands include the alway-set leading bit. */
227 EE_READ_CMD = 6,
228
229 /* RxMissed bits */
230 RxMissedOver = (1 << 16),
231 RxMissedMask = 0xffff,
232
233 /* SROM-related bits */
234 SROMC0InfoLeaf = 27,
235 MediaBlockMask = 0x3f,
236 MediaCustomCSRs = (1 << 6),
237
238 /* PCIPM bits */
239 PM_Sleep = (1 << 31),
240 PM_Snooze = (1 << 30),
241 PM_Mask = PM_Sleep | PM_Snooze,
242
243 /* SIAStatus bits */
244 NWayState = (1 << 14) | (1 << 13) | (1 << 12),
245 NWayRestart = (1 << 12),
246 NonselPortActive = (1 << 9),
247 SelPortActive = (1 << 8),
248 LinkFailStatus = (1 << 2),
249 NetCxnErr = (1 << 1),
250 };
251
252 static const u32 de_intr_mask =
253 IntrOK | IntrErr | RxIntr | RxEmpty | TxIntr | TxEmpty |
254 LinkPass | LinkFail | PciErr;
255
256 /*
257 * Set the programmable burst length to 4 longwords for all:
258 * DMA errors result without these values. Cache align 16 long.
259 */
260 static const u32 de_bus_mode = CacheAlign16 | BurstLen4 | DescSkipLen;
261
262 struct de_srom_media_block {
263 u8 opts;
264 u16 csr13;
265 u16 csr14;
266 u16 csr15;
267 } __packed;
268
269 struct de_srom_info_leaf {
270 u16 default_media;
271 u8 n_blocks;
272 u8 unused;
273 } __packed;
274
275 struct de_desc {
276 __le32 opts1;
277 __le32 opts2;
278 __le32 addr1;
279 __le32 addr2;
280 #if DSL
281 __le32 skip[DSL];
282 #endif
283 };
284
285 struct media_info {
286 u16 type; /* DE_MEDIA_xxx */
287 u16 csr13;
288 u16 csr14;
289 u16 csr15;
290 };
291
292 struct ring_info {
293 struct sk_buff *skb;
294 dma_addr_t mapping;
295 };
296
297 struct de_private {
298 unsigned tx_head;
299 unsigned tx_tail;
300 unsigned rx_tail;
301
302 void __iomem *regs;
303 struct net_device *dev;
304 spinlock_t lock;
305
306 struct de_desc *rx_ring;
307 struct de_desc *tx_ring;
308 struct ring_info tx_skb[DE_TX_RING_SIZE];
309 struct ring_info rx_skb[DE_RX_RING_SIZE];
310 unsigned rx_buf_sz;
311 dma_addr_t ring_dma;
312
313 u32 msg_enable;
314
315 struct pci_dev *pdev;
316
317 u16 setup_frame[DE_SETUP_FRAME_WORDS];
318
319 u32 media_type;
320 u32 media_supported;
321 u32 media_advertise;
322 struct media_info media[DE_MAX_MEDIA];
323 struct timer_list media_timer;
324
325 u8 *ee_data;
326 unsigned board_idx;
327 unsigned de21040 : 1;
328 unsigned media_lock : 1;
329 };
330
331
332 static void de_set_rx_mode (struct net_device *dev);
333 static void de_tx (struct de_private *de);
334 static void de_clean_rings (struct de_private *de);
335 static void de_media_interrupt (struct de_private *de, u32 status);
336 static void de21040_media_timer (struct timer_list *t);
337 static void de21041_media_timer (struct timer_list *t);
338 static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media);
339
340
341 static const struct pci_device_id de_pci_tbl[] = {
342 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP,
343 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
344 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_PLUS,
345 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
346 { },
347 };
348 MODULE_DEVICE_TABLE(pci, de_pci_tbl);
349
350 static const char * const media_name[DE_MAX_MEDIA] = {
351 "10baseT auto",
352 "BNC",
353 "AUI",
354 "10baseT-HD",
355 "10baseT-FD"
356 };
357
358 /* 21040 transceiver register settings:
359 * TP AUTO(unused), BNC(unused), AUI, TP, TP FD*/
360 static u16 t21040_csr13[] = { 0, 0, 0x8F09, 0x8F01, 0x8F01, };
361 static u16 t21040_csr14[] = { 0, 0, 0x0705, 0xFFFF, 0xFFFD, };
362 static u16 t21040_csr15[] = { 0, 0, 0x0006, 0x0000, 0x0000, };
363
364 /* 21041 transceiver register settings: TP AUTO, BNC, AUI, TP, TP FD*/
365 static u16 t21041_csr13[] = { 0xEF01, 0xEF09, 0xEF09, 0xEF01, 0xEF09, };
366 static u16 t21041_csr14[] = { 0xFFFF, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
367 /* If on-chip autonegotiation is broken, use half-duplex (FF3F) instead */
368 static u16 t21041_csr14_brk[] = { 0xFF3F, 0xF7FD, 0xF7FD, 0x7F3F, 0x7F3D, };
369 static u16 t21041_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, };
370
371
372 #define dr32(reg) ioread32(de->regs + (reg))
373 #define dw32(reg, val) iowrite32((val), de->regs + (reg))
374
375
376 static void de_rx_err_acct (struct de_private *de, unsigned rx_tail,
377 u32 status, u32 len)
378 {
379 netif_dbg(de, rx_err, de->dev,
380 "rx err, slot %d status 0x%x len %d\n",
381 rx_tail, status, len);
382
383 if ((status & 0x38000300) != 0x0300) {
384 /* Ingore earlier buffers. */
385 if ((status & 0xffff) != 0x7fff) {
386 netif_warn(de, rx_err, de->dev,
387 "Oversized Ethernet frame spanned multiple buffers, status %08x!\n",
388 status);
389 de->dev->stats.rx_length_errors++;
390 }
391 } else if (status & RxError) {
392 /* There was a fatal error. */
393 de->dev->stats.rx_errors++; /* end of a packet.*/
394 if (status & 0x0890) de->dev->stats.rx_length_errors++;
395 if (status & RxErrCRC) de->dev->stats.rx_crc_errors++;
396 if (status & RxErrFIFO) de->dev->stats.rx_fifo_errors++;
397 }
398 }
399
400 static void de_rx (struct de_private *de)
401 {
402 unsigned rx_tail = de->rx_tail;
403 unsigned rx_work = DE_RX_RING_SIZE;
404 unsigned drop = 0;
405 int rc;
406
407 while (--rx_work) {
408 u32 status, len;
409 dma_addr_t mapping;
410 struct sk_buff *skb, *copy_skb;
411 unsigned copying_skb, buflen;
412
413 skb = de->rx_skb[rx_tail].skb;
414 BUG_ON(!skb);
415 rmb();
416 status = le32_to_cpu(de->rx_ring[rx_tail].opts1);
417 if (status & DescOwn)
418 break;
419
420 len = ((status >> 16) & 0x7ff) - 4;
421 mapping = de->rx_skb[rx_tail].mapping;
422
423 if (unlikely(drop)) {
424 de->dev->stats.rx_dropped++;
425 goto rx_next;
426 }
427
428 if (unlikely((status & 0x38008300) != 0x0300)) {
429 de_rx_err_acct(de, rx_tail, status, len);
430 goto rx_next;
431 }
432
433 copying_skb = (len <= rx_copybreak);
434
435 netif_dbg(de, rx_status, de->dev,
436 "rx slot %d status 0x%x len %d copying? %d\n",
437 rx_tail, status, len, copying_skb);
438
439 buflen = copying_skb ? (len + RX_OFFSET) : de->rx_buf_sz;
440 copy_skb = netdev_alloc_skb(de->dev, buflen);
441 if (unlikely(!copy_skb)) {
442 de->dev->stats.rx_dropped++;
443 drop = 1;
444 rx_work = 100;
445 goto rx_next;
446 }
447
448 if (!copying_skb) {
449 pci_unmap_single(de->pdev, mapping,
450 buflen, PCI_DMA_FROMDEVICE);
451 skb_put(skb, len);
452
453 mapping =
454 de->rx_skb[rx_tail].mapping =
455 pci_map_single(de->pdev, copy_skb->data,
456 buflen, PCI_DMA_FROMDEVICE);
457 de->rx_skb[rx_tail].skb = copy_skb;
458 } else {
459 pci_dma_sync_single_for_cpu(de->pdev, mapping, len, PCI_DMA_FROMDEVICE);
460 skb_reserve(copy_skb, RX_OFFSET);
461 skb_copy_from_linear_data(skb, skb_put(copy_skb, len),
462 len);
463 pci_dma_sync_single_for_device(de->pdev, mapping, len, PCI_DMA_FROMDEVICE);
464
465 /* We'll reuse the original ring buffer. */
466 skb = copy_skb;
467 }
468
469 skb->protocol = eth_type_trans (skb, de->dev);
470
471 de->dev->stats.rx_packets++;
472 de->dev->stats.rx_bytes += skb->len;
473 rc = netif_rx (skb);
474 if (rc == NET_RX_DROP)
475 drop = 1;
476
477 rx_next:
478 if (rx_tail == (DE_RX_RING_SIZE - 1))
479 de->rx_ring[rx_tail].opts2 =
480 cpu_to_le32(RingEnd | de->rx_buf_sz);
481 else
482 de->rx_ring[rx_tail].opts2 = cpu_to_le32(de->rx_buf_sz);
483 de->rx_ring[rx_tail].addr1 = cpu_to_le32(mapping);
484 wmb();
485 de->rx_ring[rx_tail].opts1 = cpu_to_le32(DescOwn);
486 rx_tail = NEXT_RX(rx_tail);
487 }
488
489 if (!rx_work)
490 netdev_warn(de->dev, "rx work limit reached\n");
491
492 de->rx_tail = rx_tail;
493 }
494
495 static irqreturn_t de_interrupt (int irq, void *dev_instance)
496 {
497 struct net_device *dev = dev_instance;
498 struct de_private *de = netdev_priv(dev);
499 u32 status;
500
501 status = dr32(MacStatus);
502 if ((!(status & (IntrOK|IntrErr))) || (status == 0xFFFF))
503 return IRQ_NONE;
504
505 netif_dbg(de, intr, dev, "intr, status %08x mode %08x desc %u/%u/%u\n",
506 status, dr32(MacMode),
507 de->rx_tail, de->tx_head, de->tx_tail);
508
509 dw32(MacStatus, status);
510
511 if (status & (RxIntr | RxEmpty)) {
512 de_rx(de);
513 if (status & RxEmpty)
514 dw32(RxPoll, NormalRxPoll);
515 }
516
517 spin_lock(&de->lock);
518
519 if (status & (TxIntr | TxEmpty))
520 de_tx(de);
521
522 if (status & (LinkPass | LinkFail))
523 de_media_interrupt(de, status);
524
525 spin_unlock(&de->lock);
526
527 if (status & PciErr) {
528 u16 pci_status;
529
530 pci_read_config_word(de->pdev, PCI_STATUS, &pci_status);
531 pci_write_config_word(de->pdev, PCI_STATUS, pci_status);
532 netdev_err(de->dev,
533 "PCI bus error, status=%08x, PCI status=%04x\n",
534 status, pci_status);
535 }
536
537 return IRQ_HANDLED;
538 }
539
540 static void de_tx (struct de_private *de)
541 {
542 unsigned tx_head = de->tx_head;
543 unsigned tx_tail = de->tx_tail;
544
545 while (tx_tail != tx_head) {
546 struct sk_buff *skb;
547 u32 status;
548
549 rmb();
550 status = le32_to_cpu(de->tx_ring[tx_tail].opts1);
551 if (status & DescOwn)
552 break;
553
554 skb = de->tx_skb[tx_tail].skb;
555 BUG_ON(!skb);
556 if (unlikely(skb == DE_DUMMY_SKB))
557 goto next;
558
559 if (unlikely(skb == DE_SETUP_SKB)) {
560 pci_unmap_single(de->pdev, de->tx_skb[tx_tail].mapping,
561 sizeof(de->setup_frame), PCI_DMA_TODEVICE);
562 goto next;
563 }
564
565 pci_unmap_single(de->pdev, de->tx_skb[tx_tail].mapping,
566 skb->len, PCI_DMA_TODEVICE);
567
568 if (status & LastFrag) {
569 if (status & TxError) {
570 netif_dbg(de, tx_err, de->dev,
571 "tx err, status 0x%x\n",
572 status);
573 de->dev->stats.tx_errors++;
574 if (status & TxOWC)
575 de->dev->stats.tx_window_errors++;
576 if (status & TxMaxCol)
577 de->dev->stats.tx_aborted_errors++;
578 if (status & TxLinkFail)
579 de->dev->stats.tx_carrier_errors++;
580 if (status & TxFIFOUnder)
581 de->dev->stats.tx_fifo_errors++;
582 } else {
583 de->dev->stats.tx_packets++;
584 de->dev->stats.tx_bytes += skb->len;
585 netif_dbg(de, tx_done, de->dev,
586 "tx done, slot %d\n", tx_tail);
587 }
588 dev_kfree_skb_irq(skb);
589 }
590
591 next:
592 de->tx_skb[tx_tail].skb = NULL;
593
594 tx_tail = NEXT_TX(tx_tail);
595 }
596
597 de->tx_tail = tx_tail;
598
599 if (netif_queue_stopped(de->dev) && (TX_BUFFS_AVAIL(de) > (DE_TX_RING_SIZE / 4)))
600 netif_wake_queue(de->dev);
601 }
602
603 static netdev_tx_t de_start_xmit (struct sk_buff *skb,
604 struct net_device *dev)
605 {
606 struct de_private *de = netdev_priv(dev);
607 unsigned int entry, tx_free;
608 u32 mapping, len, flags = FirstFrag | LastFrag;
609 struct de_desc *txd;
610
611 spin_lock_irq(&de->lock);
612
613 tx_free = TX_BUFFS_AVAIL(de);
614 if (tx_free == 0) {
615 netif_stop_queue(dev);
616 spin_unlock_irq(&de->lock);
617 return NETDEV_TX_BUSY;
618 }
619 tx_free--;
620
621 entry = de->tx_head;
622
623 txd = &de->tx_ring[entry];
624
625 len = skb->len;
626 mapping = pci_map_single(de->pdev, skb->data, len, PCI_DMA_TODEVICE);
627 if (entry == (DE_TX_RING_SIZE - 1))
628 flags |= RingEnd;
629 if (!tx_free || (tx_free == (DE_TX_RING_SIZE / 2)))
630 flags |= TxSwInt;
631 flags |= len;
632 txd->opts2 = cpu_to_le32(flags);
633 txd->addr1 = cpu_to_le32(mapping);
634
635 de->tx_skb[entry].skb = skb;
636 de->tx_skb[entry].mapping = mapping;
637 wmb();
638
639 txd->opts1 = cpu_to_le32(DescOwn);
640 wmb();
641
642 de->tx_head = NEXT_TX(entry);
643 netif_dbg(de, tx_queued, dev, "tx queued, slot %d, skblen %d\n",
644 entry, skb->len);
645
646 if (tx_free == 0)
647 netif_stop_queue(dev);
648
649 spin_unlock_irq(&de->lock);
650
651 /* Trigger an immediate transmit demand. */
652 dw32(TxPoll, NormalTxPoll);
653
654 return NETDEV_TX_OK;
655 }
656
657 /* Set or clear the multicast filter for this adaptor.
658 Note that we only use exclusion around actually queueing the
659 new frame, not around filling de->setup_frame. This is non-deterministic
660 when re-entered but still correct. */
661
662 static void build_setup_frame_hash(u16 *setup_frm, struct net_device *dev)
663 {
664 struct de_private *de = netdev_priv(dev);
665 u16 hash_table[32];
666 struct netdev_hw_addr *ha;
667 int i;
668 u16 *eaddrs;
669
670 memset(hash_table, 0, sizeof(hash_table));
671 __set_bit_le(255, hash_table); /* Broadcast entry */
672 /* This should work on big-endian machines as well. */
673 netdev_for_each_mc_addr(ha, dev) {
674 int index = ether_crc_le(ETH_ALEN, ha->addr) & 0x1ff;
675
676 __set_bit_le(index, hash_table);
677 }
678
679 for (i = 0; i < 32; i++) {
680 *setup_frm++ = hash_table[i];
681 *setup_frm++ = hash_table[i];
682 }
683 setup_frm = &de->setup_frame[13*6];
684
685 /* Fill the final entry with our physical address. */
686 eaddrs = (u16 *)dev->dev_addr;
687 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
688 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
689 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
690 }
691
692 static void build_setup_frame_perfect(u16 *setup_frm, struct net_device *dev)
693 {
694 struct de_private *de = netdev_priv(dev);
695 struct netdev_hw_addr *ha;
696 u16 *eaddrs;
697
698 /* We have <= 14 addresses so we can use the wonderful
699 16 address perfect filtering of the Tulip. */
700 netdev_for_each_mc_addr(ha, dev) {
701 eaddrs = (u16 *) ha->addr;
702 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
703 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
704 *setup_frm++ = *eaddrs; *setup_frm++ = *eaddrs++;
705 }
706 /* Fill the unused entries with the broadcast address. */
707 memset(setup_frm, 0xff, (15 - netdev_mc_count(dev)) * 12);
708 setup_frm = &de->setup_frame[15*6];
709
710 /* Fill the final entry with our physical address. */
711 eaddrs = (u16 *)dev->dev_addr;
712 *setup_frm++ = eaddrs[0]; *setup_frm++ = eaddrs[0];
713 *setup_frm++ = eaddrs[1]; *setup_frm++ = eaddrs[1];
714 *setup_frm++ = eaddrs[2]; *setup_frm++ = eaddrs[2];
715 }
716
717
718 static void __de_set_rx_mode (struct net_device *dev)
719 {
720 struct de_private *de = netdev_priv(dev);
721 u32 macmode;
722 unsigned int entry;
723 u32 mapping;
724 struct de_desc *txd;
725 struct de_desc *dummy_txd = NULL;
726
727 macmode = dr32(MacMode) & ~(AcceptAllMulticast | AcceptAllPhys);
728
729 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
730 macmode |= AcceptAllMulticast | AcceptAllPhys;
731 goto out;
732 }
733
734 if ((netdev_mc_count(dev) > 1000) || (dev->flags & IFF_ALLMULTI)) {
735 /* Too many to filter well -- accept all multicasts. */
736 macmode |= AcceptAllMulticast;
737 goto out;
738 }
739
740 /* Note that only the low-address shortword of setup_frame is valid!
741 The values are doubled for big-endian architectures. */
742 if (netdev_mc_count(dev) > 14) /* Must use a multicast hash table. */
743 build_setup_frame_hash (de->setup_frame, dev);
744 else
745 build_setup_frame_perfect (de->setup_frame, dev);
746
747 /*
748 * Now add this frame to the Tx list.
749 */
750
751 entry = de->tx_head;
752
753 /* Avoid a chip errata by prefixing a dummy entry. */
754 if (entry != 0) {
755 de->tx_skb[entry].skb = DE_DUMMY_SKB;
756
757 dummy_txd = &de->tx_ring[entry];
758 dummy_txd->opts2 = (entry == (DE_TX_RING_SIZE - 1)) ?
759 cpu_to_le32(RingEnd) : 0;
760 dummy_txd->addr1 = 0;
761
762 /* Must set DescOwned later to avoid race with chip */
763
764 entry = NEXT_TX(entry);
765 }
766
767 de->tx_skb[entry].skb = DE_SETUP_SKB;
768 de->tx_skb[entry].mapping = mapping =
769 pci_map_single (de->pdev, de->setup_frame,
770 sizeof (de->setup_frame), PCI_DMA_TODEVICE);
771
772 /* Put the setup frame on the Tx list. */
773 txd = &de->tx_ring[entry];
774 if (entry == (DE_TX_RING_SIZE - 1))
775 txd->opts2 = cpu_to_le32(SetupFrame | RingEnd | sizeof (de->setup_frame));
776 else
777 txd->opts2 = cpu_to_le32(SetupFrame | sizeof (de->setup_frame));
778 txd->addr1 = cpu_to_le32(mapping);
779 wmb();
780
781 txd->opts1 = cpu_to_le32(DescOwn);
782 wmb();
783
784 if (dummy_txd) {
785 dummy_txd->opts1 = cpu_to_le32(DescOwn);
786 wmb();
787 }
788
789 de->tx_head = NEXT_TX(entry);
790
791 if (TX_BUFFS_AVAIL(de) == 0)
792 netif_stop_queue(dev);
793
794 /* Trigger an immediate transmit demand. */
795 dw32(TxPoll, NormalTxPoll);
796
797 out:
798 if (macmode != dr32(MacMode))
799 dw32(MacMode, macmode);
800 }
801
802 static void de_set_rx_mode (struct net_device *dev)
803 {
804 unsigned long flags;
805 struct de_private *de = netdev_priv(dev);
806
807 spin_lock_irqsave (&de->lock, flags);
808 __de_set_rx_mode(dev);
809 spin_unlock_irqrestore (&de->lock, flags);
810 }
811
812 static inline void de_rx_missed(struct de_private *de, u32 rx_missed)
813 {
814 if (unlikely(rx_missed & RxMissedOver))
815 de->dev->stats.rx_missed_errors += RxMissedMask;
816 else
817 de->dev->stats.rx_missed_errors += (rx_missed & RxMissedMask);
818 }
819
820 static void __de_get_stats(struct de_private *de)
821 {
822 u32 tmp = dr32(RxMissed); /* self-clearing */
823
824 de_rx_missed(de, tmp);
825 }
826
827 static struct net_device_stats *de_get_stats(struct net_device *dev)
828 {
829 struct de_private *de = netdev_priv(dev);
830
831 /* The chip only need report frame silently dropped. */
832 spin_lock_irq(&de->lock);
833 if (netif_running(dev) && netif_device_present(dev))
834 __de_get_stats(de);
835 spin_unlock_irq(&de->lock);
836
837 return &dev->stats;
838 }
839
840 static inline int de_is_running (struct de_private *de)
841 {
842 return (dr32(MacStatus) & (RxState | TxState)) ? 1 : 0;
843 }
844
845 static void de_stop_rxtx (struct de_private *de)
846 {
847 u32 macmode;
848 unsigned int i = 1300/100;
849
850 macmode = dr32(MacMode);
851 if (macmode & RxTx) {
852 dw32(MacMode, macmode & ~RxTx);
853 dr32(MacMode);
854 }
855
856 /* wait until in-flight frame completes.
857 * Max time @ 10BT: 1500*8b/10Mbps == 1200us (+ 100us margin)
858 * Typically expect this loop to end in < 50 us on 100BT.
859 */
860 while (--i) {
861 if (!de_is_running(de))
862 return;
863 udelay(100);
864 }
865
866 netdev_warn(de->dev, "timeout expired, stopping DMA\n");
867 }
868
869 static inline void de_start_rxtx (struct de_private *de)
870 {
871 u32 macmode;
872
873 macmode = dr32(MacMode);
874 if ((macmode & RxTx) != RxTx) {
875 dw32(MacMode, macmode | RxTx);
876 dr32(MacMode);
877 }
878 }
879
880 static void de_stop_hw (struct de_private *de)
881 {
882
883 udelay(5);
884 dw32(IntrMask, 0);
885
886 de_stop_rxtx(de);
887
888 dw32(MacStatus, dr32(MacStatus));
889
890 udelay(10);
891
892 de->rx_tail = 0;
893 de->tx_head = de->tx_tail = 0;
894 }
895
896 static void de_link_up(struct de_private *de)
897 {
898 if (!netif_carrier_ok(de->dev)) {
899 netif_carrier_on(de->dev);
900 netif_info(de, link, de->dev, "link up, media %s\n",
901 media_name[de->media_type]);
902 }
903 }
904
905 static void de_link_down(struct de_private *de)
906 {
907 if (netif_carrier_ok(de->dev)) {
908 netif_carrier_off(de->dev);
909 netif_info(de, link, de->dev, "link down\n");
910 }
911 }
912
913 static void de_set_media (struct de_private *de)
914 {
915 unsigned media = de->media_type;
916 u32 macmode = dr32(MacMode);
917
918 if (de_is_running(de))
919 netdev_warn(de->dev, "chip is running while changing media!\n");
920
921 if (de->de21040)
922 dw32(CSR11, FULL_DUPLEX_MAGIC);
923 dw32(CSR13, 0); /* Reset phy */
924 dw32(CSR14, de->media[media].csr14);
925 dw32(CSR15, de->media[media].csr15);
926 dw32(CSR13, de->media[media].csr13);
927
928 /* must delay 10ms before writing to other registers,
929 * especially CSR6
930 */
931 mdelay(10);
932
933 if (media == DE_MEDIA_TP_FD)
934 macmode |= FullDuplex;
935 else
936 macmode &= ~FullDuplex;
937
938 netif_info(de, link, de->dev, "set link %s\n", media_name[media]);
939 netif_info(de, hw, de->dev, "mode 0x%x, sia 0x%x,0x%x,0x%x,0x%x\n",
940 dr32(MacMode), dr32(SIAStatus),
941 dr32(CSR13), dr32(CSR14), dr32(CSR15));
942 netif_info(de, hw, de->dev, "set mode 0x%x, set sia 0x%x,0x%x,0x%x\n",
943 macmode, de->media[media].csr13,
944 de->media[media].csr14, de->media[media].csr15);
945 if (macmode != dr32(MacMode))
946 dw32(MacMode, macmode);
947 }
948
949 static void de_next_media (struct de_private *de, const u32 *media,
950 unsigned int n_media)
951 {
952 unsigned int i;
953
954 for (i = 0; i < n_media; i++) {
955 if (de_ok_to_advertise(de, media[i])) {
956 de->media_type = media[i];
957 return;
958 }
959 }
960 }
961
962 static void de21040_media_timer (struct timer_list *t)
963 {
964 struct de_private *de = from_timer(de, t, media_timer);
965 struct net_device *dev = de->dev;
966 u32 status = dr32(SIAStatus);
967 unsigned int carrier;
968 unsigned long flags;
969
970 carrier = (status & NetCxnErr) ? 0 : 1;
971
972 if (carrier) {
973 if (de->media_type != DE_MEDIA_AUI && (status & LinkFailStatus))
974 goto no_link_yet;
975
976 de->media_timer.expires = jiffies + DE_TIMER_LINK;
977 add_timer(&de->media_timer);
978 if (!netif_carrier_ok(dev))
979 de_link_up(de);
980 else
981 netif_info(de, timer, dev, "%s link ok, status %x\n",
982 media_name[de->media_type], status);
983 return;
984 }
985
986 de_link_down(de);
987
988 if (de->media_lock)
989 return;
990
991 if (de->media_type == DE_MEDIA_AUI) {
992 static const u32 next_state = DE_MEDIA_TP;
993 de_next_media(de, &next_state, 1);
994 } else {
995 static const u32 next_state = DE_MEDIA_AUI;
996 de_next_media(de, &next_state, 1);
997 }
998
999 spin_lock_irqsave(&de->lock, flags);
1000 de_stop_rxtx(de);
1001 spin_unlock_irqrestore(&de->lock, flags);
1002 de_set_media(de);
1003 de_start_rxtx(de);
1004
1005 no_link_yet:
1006 de->media_timer.expires = jiffies + DE_TIMER_NO_LINK;
1007 add_timer(&de->media_timer);
1008
1009 netif_info(de, timer, dev, "no link, trying media %s, status %x\n",
1010 media_name[de->media_type], status);
1011 }
1012
1013 static unsigned int de_ok_to_advertise (struct de_private *de, u32 new_media)
1014 {
1015 switch (new_media) {
1016 case DE_MEDIA_TP_AUTO:
1017 if (!(de->media_advertise & ADVERTISED_Autoneg))
1018 return 0;
1019 if (!(de->media_advertise & (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full)))
1020 return 0;
1021 break;
1022 case DE_MEDIA_BNC:
1023 if (!(de->media_advertise & ADVERTISED_BNC))
1024 return 0;
1025 break;
1026 case DE_MEDIA_AUI:
1027 if (!(de->media_advertise & ADVERTISED_AUI))
1028 return 0;
1029 break;
1030 case DE_MEDIA_TP:
1031 if (!(de->media_advertise & ADVERTISED_10baseT_Half))
1032 return 0;
1033 break;
1034 case DE_MEDIA_TP_FD:
1035 if (!(de->media_advertise & ADVERTISED_10baseT_Full))
1036 return 0;
1037 break;
1038 }
1039
1040 return 1;
1041 }
1042
1043 static void de21041_media_timer (struct timer_list *t)
1044 {
1045 struct de_private *de = from_timer(de, t, media_timer);
1046 struct net_device *dev = de->dev;
1047 u32 status = dr32(SIAStatus);
1048 unsigned int carrier;
1049 unsigned long flags;
1050
1051 /* clear port active bits */
1052 dw32(SIAStatus, NonselPortActive | SelPortActive);
1053
1054 carrier = (status & NetCxnErr) ? 0 : 1;
1055
1056 if (carrier) {
1057 if ((de->media_type == DE_MEDIA_TP_AUTO ||
1058 de->media_type == DE_MEDIA_TP ||
1059 de->media_type == DE_MEDIA_TP_FD) &&
1060 (status & LinkFailStatus))
1061 goto no_link_yet;
1062
1063 de->media_timer.expires = jiffies + DE_TIMER_LINK;
1064 add_timer(&de->media_timer);
1065 if (!netif_carrier_ok(dev))
1066 de_link_up(de);
1067 else
1068 netif_info(de, timer, dev,
1069 "%s link ok, mode %x status %x\n",
1070 media_name[de->media_type],
1071 dr32(MacMode), status);
1072 return;
1073 }
1074
1075 de_link_down(de);
1076
1077 /* if media type locked, don't switch media */
1078 if (de->media_lock)
1079 goto set_media;
1080
1081 /* if activity detected, use that as hint for new media type */
1082 if (status & NonselPortActive) {
1083 unsigned int have_media = 1;
1084
1085 /* if AUI/BNC selected, then activity is on TP port */
1086 if (de->media_type == DE_MEDIA_AUI ||
1087 de->media_type == DE_MEDIA_BNC) {
1088 if (de_ok_to_advertise(de, DE_MEDIA_TP_AUTO))
1089 de->media_type = DE_MEDIA_TP_AUTO;
1090 else
1091 have_media = 0;
1092 }
1093
1094 /* TP selected. If there is only TP and BNC, then it's BNC */
1095 else if (((de->media_supported & DE_AUI_BNC) == SUPPORTED_BNC) &&
1096 de_ok_to_advertise(de, DE_MEDIA_BNC))
1097 de->media_type = DE_MEDIA_BNC;
1098
1099 /* TP selected. If there is only TP and AUI, then it's AUI */
1100 else if (((de->media_supported & DE_AUI_BNC) == SUPPORTED_AUI) &&
1101 de_ok_to_advertise(de, DE_MEDIA_AUI))
1102 de->media_type = DE_MEDIA_AUI;
1103
1104 /* otherwise, ignore the hint */
1105 else
1106 have_media = 0;
1107
1108 if (have_media)
1109 goto set_media;
1110 }
1111
1112 /*
1113 * Absent or ambiguous activity hint, move to next advertised
1114 * media state. If de->media_type is left unchanged, this
1115 * simply resets the PHY and reloads the current media settings.
1116 */
1117 if (de->media_type == DE_MEDIA_AUI) {
1118 static const u32 next_states[] = {
1119 DE_MEDIA_BNC, DE_MEDIA_TP_AUTO
1120 };
1121 de_next_media(de, next_states, ARRAY_SIZE(next_states));
1122 } else if (de->media_type == DE_MEDIA_BNC) {
1123 static const u32 next_states[] = {
1124 DE_MEDIA_TP_AUTO, DE_MEDIA_AUI
1125 };
1126 de_next_media(de, next_states, ARRAY_SIZE(next_states));
1127 } else {
1128 static const u32 next_states[] = {
1129 DE_MEDIA_AUI, DE_MEDIA_BNC, DE_MEDIA_TP_AUTO
1130 };
1131 de_next_media(de, next_states, ARRAY_SIZE(next_states));
1132 }
1133
1134 set_media:
1135 spin_lock_irqsave(&de->lock, flags);
1136 de_stop_rxtx(de);
1137 spin_unlock_irqrestore(&de->lock, flags);
1138 de_set_media(de);
1139 de_start_rxtx(de);
1140
1141 no_link_yet:
1142 de->media_timer.expires = jiffies + DE_TIMER_NO_LINK;
1143 add_timer(&de->media_timer);
1144
1145 netif_info(de, timer, dev, "no link, trying media %s, status %x\n",
1146 media_name[de->media_type], status);
1147 }
1148
1149 static void de_media_interrupt (struct de_private *de, u32 status)
1150 {
1151 if (status & LinkPass) {
1152 /* Ignore if current media is AUI or BNC and we can't use TP */
1153 if ((de->media_type == DE_MEDIA_AUI ||
1154 de->media_type == DE_MEDIA_BNC) &&
1155 (de->media_lock ||
1156 !de_ok_to_advertise(de, DE_MEDIA_TP_AUTO)))
1157 return;
1158 /* If current media is not TP, change it to TP */
1159 if ((de->media_type == DE_MEDIA_AUI ||
1160 de->media_type == DE_MEDIA_BNC)) {
1161 de->media_type = DE_MEDIA_TP_AUTO;
1162 de_stop_rxtx(de);
1163 de_set_media(de);
1164 de_start_rxtx(de);
1165 }
1166 de_link_up(de);
1167 mod_timer(&de->media_timer, jiffies + DE_TIMER_LINK);
1168 return;
1169 }
1170
1171 BUG_ON(!(status & LinkFail));
1172 /* Mark the link as down only if current media is TP */
1173 if (netif_carrier_ok(de->dev) && de->media_type != DE_MEDIA_AUI &&
1174 de->media_type != DE_MEDIA_BNC) {
1175 de_link_down(de);
1176 mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1177 }
1178 }
1179
1180 static int de_reset_mac (struct de_private *de)
1181 {
1182 u32 status, tmp;
1183
1184 /*
1185 * Reset MAC. de4x5.c and tulip.c examined for "advice"
1186 * in this area.
1187 */
1188
1189 if (dr32(BusMode) == 0xffffffff)
1190 return -EBUSY;
1191
1192 /* Reset the chip, holding bit 0 set at least 50 PCI cycles. */
1193 dw32 (BusMode, CmdReset);
1194 mdelay (1);
1195
1196 dw32 (BusMode, de_bus_mode);
1197 mdelay (1);
1198
1199 for (tmp = 0; tmp < 5; tmp++) {
1200 dr32 (BusMode);
1201 mdelay (1);
1202 }
1203
1204 mdelay (1);
1205
1206 status = dr32(MacStatus);
1207 if (status & (RxState | TxState))
1208 return -EBUSY;
1209 if (status == 0xffffffff)
1210 return -ENODEV;
1211 return 0;
1212 }
1213
1214 static void de_adapter_wake (struct de_private *de)
1215 {
1216 u32 pmctl;
1217
1218 if (de->de21040)
1219 return;
1220
1221 pci_read_config_dword(de->pdev, PCIPM, &pmctl);
1222 if (pmctl & PM_Mask) {
1223 pmctl &= ~PM_Mask;
1224 pci_write_config_dword(de->pdev, PCIPM, pmctl);
1225
1226 /* de4x5.c delays, so we do too */
1227 msleep(10);
1228 }
1229 }
1230
1231 static void de_adapter_sleep (struct de_private *de)
1232 {
1233 u32 pmctl;
1234
1235 if (de->de21040)
1236 return;
1237
1238 dw32(CSR13, 0); /* Reset phy */
1239 pci_read_config_dword(de->pdev, PCIPM, &pmctl);
1240 pmctl |= PM_Sleep;
1241 pci_write_config_dword(de->pdev, PCIPM, pmctl);
1242 }
1243
1244 static int de_init_hw (struct de_private *de)
1245 {
1246 struct net_device *dev = de->dev;
1247 u32 macmode;
1248 int rc;
1249
1250 de_adapter_wake(de);
1251
1252 macmode = dr32(MacMode) & ~MacModeClear;
1253
1254 rc = de_reset_mac(de);
1255 if (rc)
1256 return rc;
1257
1258 de_set_media(de); /* reset phy */
1259
1260 dw32(RxRingAddr, de->ring_dma);
1261 dw32(TxRingAddr, de->ring_dma + (sizeof(struct de_desc) * DE_RX_RING_SIZE));
1262
1263 dw32(MacMode, RxTx | macmode);
1264
1265 dr32(RxMissed); /* self-clearing */
1266
1267 dw32(IntrMask, de_intr_mask);
1268
1269 de_set_rx_mode(dev);
1270
1271 return 0;
1272 }
1273
1274 static int de_refill_rx (struct de_private *de)
1275 {
1276 unsigned i;
1277
1278 for (i = 0; i < DE_RX_RING_SIZE; i++) {
1279 struct sk_buff *skb;
1280
1281 skb = netdev_alloc_skb(de->dev, de->rx_buf_sz);
1282 if (!skb)
1283 goto err_out;
1284
1285 de->rx_skb[i].mapping = pci_map_single(de->pdev,
1286 skb->data, de->rx_buf_sz, PCI_DMA_FROMDEVICE);
1287 de->rx_skb[i].skb = skb;
1288
1289 de->rx_ring[i].opts1 = cpu_to_le32(DescOwn);
1290 if (i == (DE_RX_RING_SIZE - 1))
1291 de->rx_ring[i].opts2 =
1292 cpu_to_le32(RingEnd | de->rx_buf_sz);
1293 else
1294 de->rx_ring[i].opts2 = cpu_to_le32(de->rx_buf_sz);
1295 de->rx_ring[i].addr1 = cpu_to_le32(de->rx_skb[i].mapping);
1296 de->rx_ring[i].addr2 = 0;
1297 }
1298
1299 return 0;
1300
1301 err_out:
1302 de_clean_rings(de);
1303 return -ENOMEM;
1304 }
1305
1306 static int de_init_rings (struct de_private *de)
1307 {
1308 memset(de->tx_ring, 0, sizeof(struct de_desc) * DE_TX_RING_SIZE);
1309 de->tx_ring[DE_TX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1310
1311 de->rx_tail = 0;
1312 de->tx_head = de->tx_tail = 0;
1313
1314 return de_refill_rx (de);
1315 }
1316
1317 static int de_alloc_rings (struct de_private *de)
1318 {
1319 de->rx_ring = pci_alloc_consistent(de->pdev, DE_RING_BYTES, &de->ring_dma);
1320 if (!de->rx_ring)
1321 return -ENOMEM;
1322 de->tx_ring = &de->rx_ring[DE_RX_RING_SIZE];
1323 return de_init_rings(de);
1324 }
1325
1326 static void de_clean_rings (struct de_private *de)
1327 {
1328 unsigned i;
1329
1330 memset(de->rx_ring, 0, sizeof(struct de_desc) * DE_RX_RING_SIZE);
1331 de->rx_ring[DE_RX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1332 wmb();
1333 memset(de->tx_ring, 0, sizeof(struct de_desc) * DE_TX_RING_SIZE);
1334 de->tx_ring[DE_TX_RING_SIZE - 1].opts2 = cpu_to_le32(RingEnd);
1335 wmb();
1336
1337 for (i = 0; i < DE_RX_RING_SIZE; i++) {
1338 if (de->rx_skb[i].skb) {
1339 pci_unmap_single(de->pdev, de->rx_skb[i].mapping,
1340 de->rx_buf_sz, PCI_DMA_FROMDEVICE);
1341 dev_kfree_skb(de->rx_skb[i].skb);
1342 }
1343 }
1344
1345 for (i = 0; i < DE_TX_RING_SIZE; i++) {
1346 struct sk_buff *skb = de->tx_skb[i].skb;
1347 if ((skb) && (skb != DE_DUMMY_SKB)) {
1348 if (skb != DE_SETUP_SKB) {
1349 de->dev->stats.tx_dropped++;
1350 pci_unmap_single(de->pdev,
1351 de->tx_skb[i].mapping,
1352 skb->len, PCI_DMA_TODEVICE);
1353 dev_kfree_skb(skb);
1354 } else {
1355 pci_unmap_single(de->pdev,
1356 de->tx_skb[i].mapping,
1357 sizeof(de->setup_frame),
1358 PCI_DMA_TODEVICE);
1359 }
1360 }
1361 }
1362
1363 memset(&de->rx_skb, 0, sizeof(struct ring_info) * DE_RX_RING_SIZE);
1364 memset(&de->tx_skb, 0, sizeof(struct ring_info) * DE_TX_RING_SIZE);
1365 }
1366
1367 static void de_free_rings (struct de_private *de)
1368 {
1369 de_clean_rings(de);
1370 pci_free_consistent(de->pdev, DE_RING_BYTES, de->rx_ring, de->ring_dma);
1371 de->rx_ring = NULL;
1372 de->tx_ring = NULL;
1373 }
1374
1375 static int de_open (struct net_device *dev)
1376 {
1377 struct de_private *de = netdev_priv(dev);
1378 const int irq = de->pdev->irq;
1379 int rc;
1380
1381 netif_dbg(de, ifup, dev, "enabling interface\n");
1382
1383 de->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
1384
1385 rc = de_alloc_rings(de);
1386 if (rc) {
1387 netdev_err(dev, "ring allocation failure, err=%d\n", rc);
1388 return rc;
1389 }
1390
1391 dw32(IntrMask, 0);
1392
1393 rc = request_irq(irq, de_interrupt, IRQF_SHARED, dev->name, dev);
1394 if (rc) {
1395 netdev_err(dev, "IRQ %d request failure, err=%d\n", irq, rc);
1396 goto err_out_free;
1397 }
1398
1399 rc = de_init_hw(de);
1400 if (rc) {
1401 netdev_err(dev, "h/w init failure, err=%d\n", rc);
1402 goto err_out_free_irq;
1403 }
1404
1405 netif_start_queue(dev);
1406 mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1407
1408 return 0;
1409
1410 err_out_free_irq:
1411 free_irq(irq, dev);
1412 err_out_free:
1413 de_free_rings(de);
1414 return rc;
1415 }
1416
1417 static int de_close (struct net_device *dev)
1418 {
1419 struct de_private *de = netdev_priv(dev);
1420 unsigned long flags;
1421
1422 netif_dbg(de, ifdown, dev, "disabling interface\n");
1423
1424 del_timer_sync(&de->media_timer);
1425
1426 spin_lock_irqsave(&de->lock, flags);
1427 de_stop_hw(de);
1428 netif_stop_queue(dev);
1429 netif_carrier_off(dev);
1430 spin_unlock_irqrestore(&de->lock, flags);
1431
1432 free_irq(de->pdev->irq, dev);
1433
1434 de_free_rings(de);
1435 de_adapter_sleep(de);
1436 return 0;
1437 }
1438
1439 static void de_tx_timeout (struct net_device *dev)
1440 {
1441 struct de_private *de = netdev_priv(dev);
1442 const int irq = de->pdev->irq;
1443
1444 netdev_dbg(dev, "NIC status %08x mode %08x sia %08x desc %u/%u/%u\n",
1445 dr32(MacStatus), dr32(MacMode), dr32(SIAStatus),
1446 de->rx_tail, de->tx_head, de->tx_tail);
1447
1448 del_timer_sync(&de->media_timer);
1449
1450 disable_irq(irq);
1451 spin_lock_irq(&de->lock);
1452
1453 de_stop_hw(de);
1454 netif_stop_queue(dev);
1455 netif_carrier_off(dev);
1456
1457 spin_unlock_irq(&de->lock);
1458 enable_irq(irq);
1459
1460 /* Update the error counts. */
1461 __de_get_stats(de);
1462
1463 synchronize_irq(irq);
1464 de_clean_rings(de);
1465
1466 de_init_rings(de);
1467
1468 de_init_hw(de);
1469
1470 netif_wake_queue(dev);
1471 }
1472
1473 static void __de_get_regs(struct de_private *de, u8 *buf)
1474 {
1475 int i;
1476 u32 *rbuf = (u32 *)buf;
1477
1478 /* read all CSRs */
1479 for (i = 0; i < DE_NUM_REGS; i++)
1480 rbuf[i] = dr32(i * 8);
1481
1482 /* handle self-clearing RxMissed counter, CSR8 */
1483 de_rx_missed(de, rbuf[8]);
1484 }
1485
1486 static void __de_get_link_ksettings(struct de_private *de,
1487 struct ethtool_link_ksettings *cmd)
1488 {
1489 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
1490 de->media_supported);
1491 cmd->base.phy_address = 0;
1492 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
1493 de->media_advertise);
1494
1495 switch (de->media_type) {
1496 case DE_MEDIA_AUI:
1497 cmd->base.port = PORT_AUI;
1498 break;
1499 case DE_MEDIA_BNC:
1500 cmd->base.port = PORT_BNC;
1501 break;
1502 default:
1503 cmd->base.port = PORT_TP;
1504 break;
1505 }
1506
1507 cmd->base.speed = 10;
1508
1509 if (dr32(MacMode) & FullDuplex)
1510 cmd->base.duplex = DUPLEX_FULL;
1511 else
1512 cmd->base.duplex = DUPLEX_HALF;
1513
1514 if (de->media_lock)
1515 cmd->base.autoneg = AUTONEG_DISABLE;
1516 else
1517 cmd->base.autoneg = AUTONEG_ENABLE;
1518
1519 /* ignore maxtxpkt, maxrxpkt for now */
1520 }
1521
1522 static int __de_set_link_ksettings(struct de_private *de,
1523 const struct ethtool_link_ksettings *cmd)
1524 {
1525 u32 new_media;
1526 unsigned int media_lock;
1527 u8 duplex = cmd->base.duplex;
1528 u8 port = cmd->base.port;
1529 u8 autoneg = cmd->base.autoneg;
1530 u32 advertising;
1531
1532 ethtool_convert_link_mode_to_legacy_u32(&advertising,
1533 cmd->link_modes.advertising);
1534
1535 if (cmd->base.speed != 10)
1536 return -EINVAL;
1537 if (duplex != DUPLEX_HALF && duplex != DUPLEX_FULL)
1538 return -EINVAL;
1539 if (port != PORT_TP && port != PORT_AUI && port != PORT_BNC)
1540 return -EINVAL;
1541 if (de->de21040 && port == PORT_BNC)
1542 return -EINVAL;
1543 if (autoneg != AUTONEG_DISABLE && autoneg != AUTONEG_ENABLE)
1544 return -EINVAL;
1545 if (advertising & ~de->media_supported)
1546 return -EINVAL;
1547 if (autoneg == AUTONEG_ENABLE &&
1548 (!(advertising & ADVERTISED_Autoneg)))
1549 return -EINVAL;
1550
1551 switch (port) {
1552 case PORT_AUI:
1553 new_media = DE_MEDIA_AUI;
1554 if (!(advertising & ADVERTISED_AUI))
1555 return -EINVAL;
1556 break;
1557 case PORT_BNC:
1558 new_media = DE_MEDIA_BNC;
1559 if (!(advertising & ADVERTISED_BNC))
1560 return -EINVAL;
1561 break;
1562 default:
1563 if (autoneg == AUTONEG_ENABLE)
1564 new_media = DE_MEDIA_TP_AUTO;
1565 else if (duplex == DUPLEX_FULL)
1566 new_media = DE_MEDIA_TP_FD;
1567 else
1568 new_media = DE_MEDIA_TP;
1569 if (!(advertising & ADVERTISED_TP))
1570 return -EINVAL;
1571 if (!(advertising & (ADVERTISED_10baseT_Full |
1572 ADVERTISED_10baseT_Half)))
1573 return -EINVAL;
1574 break;
1575 }
1576
1577 media_lock = (autoneg == AUTONEG_ENABLE) ? 0 : 1;
1578
1579 if ((new_media == de->media_type) &&
1580 (media_lock == de->media_lock) &&
1581 (advertising == de->media_advertise))
1582 return 0; /* nothing to change */
1583
1584 de_link_down(de);
1585 mod_timer(&de->media_timer, jiffies + DE_TIMER_NO_LINK);
1586 de_stop_rxtx(de);
1587
1588 de->media_type = new_media;
1589 de->media_lock = media_lock;
1590 de->media_advertise = advertising;
1591 de_set_media(de);
1592 if (netif_running(de->dev))
1593 de_start_rxtx(de);
1594
1595 return 0;
1596 }
1597
1598 static void de_get_drvinfo (struct net_device *dev,struct ethtool_drvinfo *info)
1599 {
1600 struct de_private *de = netdev_priv(dev);
1601
1602 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1603 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1604 strlcpy(info->bus_info, pci_name(de->pdev), sizeof(info->bus_info));
1605 }
1606
1607 static int de_get_regs_len(struct net_device *dev)
1608 {
1609 return DE_REGS_SIZE;
1610 }
1611
1612 static int de_get_link_ksettings(struct net_device *dev,
1613 struct ethtool_link_ksettings *cmd)
1614 {
1615 struct de_private *de = netdev_priv(dev);
1616
1617 spin_lock_irq(&de->lock);
1618 __de_get_link_ksettings(de, cmd);
1619 spin_unlock_irq(&de->lock);
1620
1621 return 0;
1622 }
1623
1624 static int de_set_link_ksettings(struct net_device *dev,
1625 const struct ethtool_link_ksettings *cmd)
1626 {
1627 struct de_private *de = netdev_priv(dev);
1628 int rc;
1629
1630 spin_lock_irq(&de->lock);
1631 rc = __de_set_link_ksettings(de, cmd);
1632 spin_unlock_irq(&de->lock);
1633
1634 return rc;
1635 }
1636
1637 static u32 de_get_msglevel(struct net_device *dev)
1638 {
1639 struct de_private *de = netdev_priv(dev);
1640
1641 return de->msg_enable;
1642 }
1643
1644 static void de_set_msglevel(struct net_device *dev, u32 msglvl)
1645 {
1646 struct de_private *de = netdev_priv(dev);
1647
1648 de->msg_enable = msglvl;
1649 }
1650
1651 static int de_get_eeprom(struct net_device *dev,
1652 struct ethtool_eeprom *eeprom, u8 *data)
1653 {
1654 struct de_private *de = netdev_priv(dev);
1655
1656 if (!de->ee_data)
1657 return -EOPNOTSUPP;
1658 if ((eeprom->offset != 0) || (eeprom->magic != 0) ||
1659 (eeprom->len != DE_EEPROM_SIZE))
1660 return -EINVAL;
1661 memcpy(data, de->ee_data, eeprom->len);
1662
1663 return 0;
1664 }
1665
1666 static int de_nway_reset(struct net_device *dev)
1667 {
1668 struct de_private *de = netdev_priv(dev);
1669 u32 status;
1670
1671 if (de->media_type != DE_MEDIA_TP_AUTO)
1672 return -EINVAL;
1673 if (netif_carrier_ok(de->dev))
1674 de_link_down(de);
1675
1676 status = dr32(SIAStatus);
1677 dw32(SIAStatus, (status & ~NWayState) | NWayRestart);
1678 netif_info(de, link, dev, "link nway restart, status %x,%x\n",
1679 status, dr32(SIAStatus));
1680 return 0;
1681 }
1682
1683 static void de_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1684 void *data)
1685 {
1686 struct de_private *de = netdev_priv(dev);
1687
1688 regs->version = (DE_REGS_VER << 2) | de->de21040;
1689
1690 spin_lock_irq(&de->lock);
1691 __de_get_regs(de, data);
1692 spin_unlock_irq(&de->lock);
1693 }
1694
1695 static const struct ethtool_ops de_ethtool_ops = {
1696 .get_link = ethtool_op_get_link,
1697 .get_drvinfo = de_get_drvinfo,
1698 .get_regs_len = de_get_regs_len,
1699 .get_msglevel = de_get_msglevel,
1700 .set_msglevel = de_set_msglevel,
1701 .get_eeprom = de_get_eeprom,
1702 .nway_reset = de_nway_reset,
1703 .get_regs = de_get_regs,
1704 .get_link_ksettings = de_get_link_ksettings,
1705 .set_link_ksettings = de_set_link_ksettings,
1706 };
1707
1708 static void de21040_get_mac_address(struct de_private *de)
1709 {
1710 unsigned i;
1711
1712 dw32 (ROMCmd, 0); /* Reset the pointer with a dummy write. */
1713 udelay(5);
1714
1715 for (i = 0; i < 6; i++) {
1716 int value, boguscnt = 100000;
1717 do {
1718 value = dr32(ROMCmd);
1719 rmb();
1720 } while (value < 0 && --boguscnt > 0);
1721 de->dev->dev_addr[i] = value;
1722 udelay(1);
1723 if (boguscnt <= 0)
1724 pr_warn("timeout reading 21040 MAC address byte %u\n",
1725 i);
1726 }
1727 }
1728
1729 static void de21040_get_media_info(struct de_private *de)
1730 {
1731 unsigned int i;
1732
1733 de->media_type = DE_MEDIA_TP;
1734 de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Full |
1735 SUPPORTED_10baseT_Half | SUPPORTED_AUI;
1736 de->media_advertise = de->media_supported;
1737
1738 for (i = 0; i < DE_MAX_MEDIA; i++) {
1739 switch (i) {
1740 case DE_MEDIA_AUI:
1741 case DE_MEDIA_TP:
1742 case DE_MEDIA_TP_FD:
1743 de->media[i].type = i;
1744 de->media[i].csr13 = t21040_csr13[i];
1745 de->media[i].csr14 = t21040_csr14[i];
1746 de->media[i].csr15 = t21040_csr15[i];
1747 break;
1748 default:
1749 de->media[i].type = DE_MEDIA_INVALID;
1750 break;
1751 }
1752 }
1753 }
1754
1755 /* Note: this routine returns extra data bits for size detection. */
1756 static unsigned tulip_read_eeprom(void __iomem *regs, int location,
1757 int addr_len)
1758 {
1759 int i;
1760 unsigned retval = 0;
1761 void __iomem *ee_addr = regs + ROMCmd;
1762 int read_cmd = location | (EE_READ_CMD << addr_len);
1763
1764 writel(EE_ENB & ~EE_CS, ee_addr);
1765 writel(EE_ENB, ee_addr);
1766
1767 /* Shift the read command bits out. */
1768 for (i = 4 + addr_len; i >= 0; i--) {
1769 short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
1770 writel(EE_ENB | dataval, ee_addr);
1771 readl(ee_addr);
1772 writel(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
1773 readl(ee_addr);
1774 retval = (retval << 1) | ((readl(ee_addr) & EE_DATA_READ) ? 1 : 0);
1775 }
1776 writel(EE_ENB, ee_addr);
1777 readl(ee_addr);
1778
1779 for (i = 16; i > 0; i--) {
1780 writel(EE_ENB | EE_SHIFT_CLK, ee_addr);
1781 readl(ee_addr);
1782 retval = (retval << 1) | ((readl(ee_addr) & EE_DATA_READ) ? 1 : 0);
1783 writel(EE_ENB, ee_addr);
1784 readl(ee_addr);
1785 }
1786
1787 /* Terminate the EEPROM access. */
1788 writel(EE_ENB & ~EE_CS, ee_addr);
1789 return retval;
1790 }
1791
1792 static void de21041_get_srom_info(struct de_private *de)
1793 {
1794 unsigned i, sa_offset = 0, ofs;
1795 u8 ee_data[DE_EEPROM_SIZE + 6] = {};
1796 unsigned ee_addr_size = tulip_read_eeprom(de->regs, 0xff, 8) & 0x40000 ? 8 : 6;
1797 struct de_srom_info_leaf *il;
1798 void *bufp;
1799
1800 /* download entire eeprom */
1801 for (i = 0; i < DE_EEPROM_WORDS; i++)
1802 ((__le16 *)ee_data)[i] =
1803 cpu_to_le16(tulip_read_eeprom(de->regs, i, ee_addr_size));
1804
1805 /* DEC now has a specification but early board makers
1806 just put the address in the first EEPROM locations. */
1807 /* This does memcmp(eedata, eedata+16, 8) */
1808
1809 #ifndef CONFIG_MIPS_COBALT
1810
1811 for (i = 0; i < 8; i ++)
1812 if (ee_data[i] != ee_data[16+i])
1813 sa_offset = 20;
1814
1815 #endif
1816
1817 /* store MAC address */
1818 for (i = 0; i < 6; i ++)
1819 de->dev->dev_addr[i] = ee_data[i + sa_offset];
1820
1821 /* get offset of controller 0 info leaf. ignore 2nd byte. */
1822 ofs = ee_data[SROMC0InfoLeaf];
1823 if (ofs >= (sizeof(ee_data) - sizeof(struct de_srom_info_leaf) - sizeof(struct de_srom_media_block)))
1824 goto bad_srom;
1825
1826 /* get pointer to info leaf */
1827 il = (struct de_srom_info_leaf *) &ee_data[ofs];
1828
1829 /* paranoia checks */
1830 if (il->n_blocks == 0)
1831 goto bad_srom;
1832 if ((sizeof(ee_data) - ofs) <
1833 (sizeof(struct de_srom_info_leaf) + (sizeof(struct de_srom_media_block) * il->n_blocks)))
1834 goto bad_srom;
1835
1836 /* get default media type */
1837 switch (get_unaligned(&il->default_media)) {
1838 case 0x0001: de->media_type = DE_MEDIA_BNC; break;
1839 case 0x0002: de->media_type = DE_MEDIA_AUI; break;
1840 case 0x0204: de->media_type = DE_MEDIA_TP_FD; break;
1841 default: de->media_type = DE_MEDIA_TP_AUTO; break;
1842 }
1843
1844 if (netif_msg_probe(de))
1845 pr_info("de%d: SROM leaf offset %u, default media %s\n",
1846 de->board_idx, ofs, media_name[de->media_type]);
1847
1848 /* init SIA register values to defaults */
1849 for (i = 0; i < DE_MAX_MEDIA; i++) {
1850 de->media[i].type = DE_MEDIA_INVALID;
1851 de->media[i].csr13 = 0xffff;
1852 de->media[i].csr14 = 0xffff;
1853 de->media[i].csr15 = 0xffff;
1854 }
1855
1856 /* parse media blocks to see what medias are supported,
1857 * and if any custom CSR values are provided
1858 */
1859 bufp = ((void *)il) + sizeof(*il);
1860 for (i = 0; i < il->n_blocks; i++) {
1861 struct de_srom_media_block *ib = bufp;
1862 unsigned idx;
1863
1864 /* index based on media type in media block */
1865 switch(ib->opts & MediaBlockMask) {
1866 case 0: /* 10baseT */
1867 de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Half
1868 | SUPPORTED_Autoneg;
1869 idx = DE_MEDIA_TP;
1870 de->media[DE_MEDIA_TP_AUTO].type = DE_MEDIA_TP_AUTO;
1871 break;
1872 case 1: /* BNC */
1873 de->media_supported |= SUPPORTED_BNC;
1874 idx = DE_MEDIA_BNC;
1875 break;
1876 case 2: /* AUI */
1877 de->media_supported |= SUPPORTED_AUI;
1878 idx = DE_MEDIA_AUI;
1879 break;
1880 case 4: /* 10baseT-FD */
1881 de->media_supported |= SUPPORTED_TP | SUPPORTED_10baseT_Full
1882 | SUPPORTED_Autoneg;
1883 idx = DE_MEDIA_TP_FD;
1884 de->media[DE_MEDIA_TP_AUTO].type = DE_MEDIA_TP_AUTO;
1885 break;
1886 default:
1887 goto bad_srom;
1888 }
1889
1890 de->media[idx].type = idx;
1891
1892 if (netif_msg_probe(de))
1893 pr_info("de%d: media block #%u: %s",
1894 de->board_idx, i,
1895 media_name[de->media[idx].type]);
1896
1897 bufp += sizeof (ib->opts);
1898
1899 if (ib->opts & MediaCustomCSRs) {
1900 de->media[idx].csr13 = get_unaligned(&ib->csr13);
1901 de->media[idx].csr14 = get_unaligned(&ib->csr14);
1902 de->media[idx].csr15 = get_unaligned(&ib->csr15);
1903 bufp += sizeof(ib->csr13) + sizeof(ib->csr14) +
1904 sizeof(ib->csr15);
1905
1906 if (netif_msg_probe(de))
1907 pr_cont(" (%x,%x,%x)\n",
1908 de->media[idx].csr13,
1909 de->media[idx].csr14,
1910 de->media[idx].csr15);
1911
1912 } else {
1913 if (netif_msg_probe(de))
1914 pr_cont("\n");
1915 }
1916
1917 if (bufp > ((void *)&ee_data[DE_EEPROM_SIZE - 3]))
1918 break;
1919 }
1920
1921 de->media_advertise = de->media_supported;
1922
1923 fill_defaults:
1924 /* fill in defaults, for cases where custom CSRs not used */
1925 for (i = 0; i < DE_MAX_MEDIA; i++) {
1926 if (de->media[i].csr13 == 0xffff)
1927 de->media[i].csr13 = t21041_csr13[i];
1928 if (de->media[i].csr14 == 0xffff) {
1929 /* autonegotiation is broken at least on some chip
1930 revisions - rev. 0x21 works, 0x11 does not */
1931 if (de->pdev->revision < 0x20)
1932 de->media[i].csr14 = t21041_csr14_brk[i];
1933 else
1934 de->media[i].csr14 = t21041_csr14[i];
1935 }
1936 if (de->media[i].csr15 == 0xffff)
1937 de->media[i].csr15 = t21041_csr15[i];
1938 }
1939
1940 de->ee_data = kmemdup(&ee_data[0], DE_EEPROM_SIZE, GFP_KERNEL);
1941
1942 return;
1943
1944 bad_srom:
1945 /* for error cases, it's ok to assume we support all these */
1946 for (i = 0; i < DE_MAX_MEDIA; i++)
1947 de->media[i].type = i;
1948 de->media_supported =
1949 SUPPORTED_10baseT_Half |
1950 SUPPORTED_10baseT_Full |
1951 SUPPORTED_Autoneg |
1952 SUPPORTED_TP |
1953 SUPPORTED_AUI |
1954 SUPPORTED_BNC;
1955 goto fill_defaults;
1956 }
1957
1958 static const struct net_device_ops de_netdev_ops = {
1959 .ndo_open = de_open,
1960 .ndo_stop = de_close,
1961 .ndo_set_rx_mode = de_set_rx_mode,
1962 .ndo_start_xmit = de_start_xmit,
1963 .ndo_get_stats = de_get_stats,
1964 .ndo_tx_timeout = de_tx_timeout,
1965 .ndo_set_mac_address = eth_mac_addr,
1966 .ndo_validate_addr = eth_validate_addr,
1967 };
1968
1969 static int de_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1970 {
1971 struct net_device *dev;
1972 struct de_private *de;
1973 int rc;
1974 void __iomem *regs;
1975 unsigned long pciaddr;
1976 static int board_idx = -1;
1977
1978 board_idx++;
1979
1980 #ifndef MODULE
1981 if (board_idx == 0)
1982 pr_info("%s\n", version);
1983 #endif
1984
1985 /* allocate a new ethernet device structure, and fill in defaults */
1986 dev = alloc_etherdev(sizeof(struct de_private));
1987 if (!dev)
1988 return -ENOMEM;
1989
1990 dev->netdev_ops = &de_netdev_ops;
1991 SET_NETDEV_DEV(dev, &pdev->dev);
1992 dev->ethtool_ops = &de_ethtool_ops;
1993 dev->watchdog_timeo = TX_TIMEOUT;
1994
1995 de = netdev_priv(dev);
1996 de->de21040 = ent->driver_data == 0 ? 1 : 0;
1997 de->pdev = pdev;
1998 de->dev = dev;
1999 de->msg_enable = (debug < 0 ? DE_DEF_MSG_ENABLE : debug);
2000 de->board_idx = board_idx;
2001 spin_lock_init (&de->lock);
2002 timer_setup(&de->media_timer,
2003 de->de21040 ? de21040_media_timer : de21041_media_timer,
2004 0);
2005
2006 netif_carrier_off(dev);
2007
2008 /* wake up device, assign resources */
2009 rc = pci_enable_device(pdev);
2010 if (rc)
2011 goto err_out_free;
2012
2013 /* reserve PCI resources to ensure driver atomicity */
2014 rc = pci_request_regions(pdev, DRV_NAME);
2015 if (rc)
2016 goto err_out_disable;
2017
2018 /* check for invalid IRQ value */
2019 if (pdev->irq < 2) {
2020 rc = -EIO;
2021 pr_err("invalid irq (%d) for pci dev %s\n",
2022 pdev->irq, pci_name(pdev));
2023 goto err_out_res;
2024 }
2025
2026 /* obtain and check validity of PCI I/O address */
2027 pciaddr = pci_resource_start(pdev, 1);
2028 if (!pciaddr) {
2029 rc = -EIO;
2030 pr_err("no MMIO resource for pci dev %s\n", pci_name(pdev));
2031 goto err_out_res;
2032 }
2033 if (pci_resource_len(pdev, 1) < DE_REGS_SIZE) {
2034 rc = -EIO;
2035 pr_err("MMIO resource (%llx) too small on pci dev %s\n",
2036 (unsigned long long)pci_resource_len(pdev, 1),
2037 pci_name(pdev));
2038 goto err_out_res;
2039 }
2040
2041 /* remap CSR registers */
2042 regs = ioremap_nocache(pciaddr, DE_REGS_SIZE);
2043 if (!regs) {
2044 rc = -EIO;
2045 pr_err("Cannot map PCI MMIO (%llx@%lx) on pci dev %s\n",
2046 (unsigned long long)pci_resource_len(pdev, 1),
2047 pciaddr, pci_name(pdev));
2048 goto err_out_res;
2049 }
2050 de->regs = regs;
2051
2052 de_adapter_wake(de);
2053
2054 /* make sure hardware is not running */
2055 rc = de_reset_mac(de);
2056 if (rc) {
2057 pr_err("Cannot reset MAC, pci dev %s\n", pci_name(pdev));
2058 goto err_out_iomap;
2059 }
2060
2061 /* get MAC address, initialize default media type and
2062 * get list of supported media
2063 */
2064 if (de->de21040) {
2065 de21040_get_mac_address(de);
2066 de21040_get_media_info(de);
2067 } else {
2068 de21041_get_srom_info(de);
2069 }
2070
2071 /* register new network interface with kernel */
2072 rc = register_netdev(dev);
2073 if (rc)
2074 goto err_out_iomap;
2075
2076 /* print info about board and interface just registered */
2077 netdev_info(dev, "%s at %p, %pM, IRQ %d\n",
2078 de->de21040 ? "21040" : "21041",
2079 regs, dev->dev_addr, pdev->irq);
2080
2081 pci_set_drvdata(pdev, dev);
2082
2083 /* enable busmastering */
2084 pci_set_master(pdev);
2085
2086 /* put adapter to sleep */
2087 de_adapter_sleep(de);
2088
2089 return 0;
2090
2091 err_out_iomap:
2092 kfree(de->ee_data);
2093 iounmap(regs);
2094 err_out_res:
2095 pci_release_regions(pdev);
2096 err_out_disable:
2097 pci_disable_device(pdev);
2098 err_out_free:
2099 free_netdev(dev);
2100 return rc;
2101 }
2102
2103 static void de_remove_one(struct pci_dev *pdev)
2104 {
2105 struct net_device *dev = pci_get_drvdata(pdev);
2106 struct de_private *de = netdev_priv(dev);
2107
2108 BUG_ON(!dev);
2109 unregister_netdev(dev);
2110 kfree(de->ee_data);
2111 iounmap(de->regs);
2112 pci_release_regions(pdev);
2113 pci_disable_device(pdev);
2114 free_netdev(dev);
2115 }
2116
2117 #ifdef CONFIG_PM
2118
2119 static int de_suspend (struct pci_dev *pdev, pm_message_t state)
2120 {
2121 struct net_device *dev = pci_get_drvdata (pdev);
2122 struct de_private *de = netdev_priv(dev);
2123
2124 rtnl_lock();
2125 if (netif_running (dev)) {
2126 const int irq = pdev->irq;
2127
2128 del_timer_sync(&de->media_timer);
2129
2130 disable_irq(irq);
2131 spin_lock_irq(&de->lock);
2132
2133 de_stop_hw(de);
2134 netif_stop_queue(dev);
2135 netif_device_detach(dev);
2136 netif_carrier_off(dev);
2137
2138 spin_unlock_irq(&de->lock);
2139 enable_irq(irq);
2140
2141 /* Update the error counts. */
2142 __de_get_stats(de);
2143
2144 synchronize_irq(irq);
2145 de_clean_rings(de);
2146
2147 de_adapter_sleep(de);
2148 pci_disable_device(pdev);
2149 } else {
2150 netif_device_detach(dev);
2151 }
2152 rtnl_unlock();
2153 return 0;
2154 }
2155
2156 static int de_resume (struct pci_dev *pdev)
2157 {
2158 struct net_device *dev = pci_get_drvdata (pdev);
2159 struct de_private *de = netdev_priv(dev);
2160 int retval = 0;
2161
2162 rtnl_lock();
2163 if (netif_device_present(dev))
2164 goto out;
2165 if (!netif_running(dev))
2166 goto out_attach;
2167 if ((retval = pci_enable_device(pdev))) {
2168 netdev_err(dev, "pci_enable_device failed in resume\n");
2169 goto out;
2170 }
2171 pci_set_master(pdev);
2172 de_init_rings(de);
2173 de_init_hw(de);
2174 out_attach:
2175 netif_device_attach(dev);
2176 out:
2177 rtnl_unlock();
2178 return 0;
2179 }
2180
2181 #endif /* CONFIG_PM */
2182
2183 static struct pci_driver de_driver = {
2184 .name = DRV_NAME,
2185 .id_table = de_pci_tbl,
2186 .probe = de_init_one,
2187 .remove = de_remove_one,
2188 #ifdef CONFIG_PM
2189 .suspend = de_suspend,
2190 .resume = de_resume,
2191 #endif
2192 };
2193
2194 static int __init de_init (void)
2195 {
2196 #ifdef MODULE
2197 pr_info("%s\n", version);
2198 #endif
2199 return pci_register_driver(&de_driver);
2200 }
2201
2202 static void __exit de_exit (void)
2203 {
2204 pci_unregister_driver (&de_driver);
2205 }
2206
2207 module_init(de_init);
2208 module_exit(de_exit);
CRIS linux kernel tree