drivers/net/ethernet/intel/ixgbe/ixgbe_common.h

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #ifndef _IXGBE_COMMON_H_
  30 #define _IXGBE_COMMON_H_
  31
  32 #include "ixgbe_type.h"
  33 #include "ixgbe.h"
  34
  35 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
  36 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
  37 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
  38 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
  39 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
  40 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
  41 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
  42                                   u32 pba_num_size);
  43 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
  44 enum ixgbe_bus_width ixgbe_convert_bus_width(u16 link_status);
  45 enum ixgbe_bus_speed ixgbe_convert_bus_speed(u16 link_status);
  46 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
  47 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
  48 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
  49
  50 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
  51 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
  52 s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);
  53
  54 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
  55 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
  56 s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  57                                                u16 words, u16 *data);
  58 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
  59 s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
  60                                    u16 words, u16 *data);
  61 s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
  62 s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
  63                                     u16 words, u16 *data);
  64 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  65                                        u16 *data);
  66 s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
  67                                               u16 words, u16 *data);
  68 s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
  69 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
  70                                            u16 *checksum_val);
  71 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
  72
  73 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  74                           u32 enable_addr);
  75 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
  76 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
  77 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw,
  78                                       struct net_device *netdev);
  79 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
  80 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
  81 s32 ixgbe_disable_rx_buff_generic(struct ixgbe_hw *hw);
  82 s32 ixgbe_enable_rx_buff_generic(struct ixgbe_hw *hw);
  83 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
  84 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
  85 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *);
  86 bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
  87 void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
  88
  89 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
  90 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
  91 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
  92 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
  93 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
  94 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
  95 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
  96 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
  97                            u32 vind, bool vlan_on, bool vlvf_bypass);
  98 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
  99 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
 100                                  ixgbe_link_speed *speed,
 101                                  bool *link_up, bool link_up_wait_to_complete);
 102 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
 103                                  u16 *wwpn_prefix);
 104
 105 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
 106 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
 107
 108 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
 109 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
 110 void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
 111 void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
 112 s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
 113 s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
 114                                  u8 build, u8 ver, u16 len, const char *str);
 115 u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
 116 s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, void *, u32 length,
 117                                  u32 timeout, bool return_data);
 118 s32 ixgbe_hic_unlocked(struct ixgbe_hw *hw, u32 *buffer, u32 len, u32 timeout);
 119 s32 ixgbe_fw_phy_activity(struct ixgbe_hw *hw, u16 activity,
 120                           u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
 121 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
 122 bool ixgbe_mng_present(struct ixgbe_hw *hw);
 123 bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
 124
 125 void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb,
 126                              u32 headroom, int strategy);
 127
 128 extern const u32 ixgbe_mvals_8259X[IXGBE_MVALS_IDX_LIMIT];
 129
 130 #define IXGBE_I2C_THERMAL_SENSOR_ADDR   0xF8
 131 #define IXGBE_EMC_INTERNAL_DATA         0x00
 132 #define IXGBE_EMC_INTERNAL_THERM_LIMIT  0x20
 133 #define IXGBE_EMC_DIODE1_DATA           0x01
 134 #define IXGBE_EMC_DIODE1_THERM_LIMIT    0x19
 135 #define IXGBE_EMC_DIODE2_DATA           0x23
 136 #define IXGBE_EMC_DIODE2_THERM_LIMIT    0x1A
 137 #define IXGBE_EMC_DIODE3_DATA           0x2A
 138 #define IXGBE_EMC_DIODE3_THERM_LIMIT    0x30
 139
 140 s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
 141 s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
 142 void ixgbe_get_etk_id(struct ixgbe_hw *hw,
 143                       struct ixgbe_nvm_version *nvm_ver);
 144 void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
 145                                 struct ixgbe_nvm_version *nvm_ver);
 146 void ixgbe_get_orom_version(struct ixgbe_hw *hw,
 147                             struct ixgbe_nvm_version *nvm_ver);
 148 void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
 149 void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
 150 s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
 151                                           ixgbe_link_speed speed,
 152                                           bool autoneg_wait_to_complete);
 153 void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
 154                                       ixgbe_link_speed speed);
 155
 156 #define IXGBE_FAILED_READ_REG 0xffffffffU
 157 #define IXGBE_FAILED_READ_CFG_DWORD 0xffffffffU
 158 #define IXGBE_FAILED_READ_CFG_WORD 0xffffU
 159
 160 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg);
 161 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value);
 162
 163 static inline bool ixgbe_removed(void __iomem *addr)
 164 {
 165         return unlikely(!addr);
 166 }
 167
 168 static inline void ixgbe_write_reg(struct ixgbe_hw *hw, u32 reg, u32 value)
 169 {
 170         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 171
 172         if (ixgbe_removed(reg_addr))
 173                 return;
 174         writel(value, reg_addr + reg);
 175 }
 176 #define IXGBE_WRITE_REG(a, reg, value) ixgbe_write_reg((a), (reg), (value))
 177
 178 #ifndef writeq
 179 #define writeq writeq
 180 static inline void writeq(u64 val, void __iomem *addr)
 181 {
 182         writel((u32)val, addr);
 183         writel((u32)(val >> 32), addr + 4);
 184 }
 185 #endif
 186
 187 static inline void ixgbe_write_reg64(struct ixgbe_hw *hw, u32 reg, u64 value)
 188 {
 189         u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
 190
 191         if (ixgbe_removed(reg_addr))
 192                 return;
 193         writeq(value, reg_addr + reg);
 194 }
 195 #define IXGBE_WRITE_REG64(a, reg, value) ixgbe_write_reg64((a), (reg), (value))
 196
 197 u32 ixgbe_read_reg(struct ixgbe_hw *hw, u32 reg);
 198 #define IXGBE_READ_REG(a, reg) ixgbe_read_reg((a), (reg))
 199
 200 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) \
 201                 ixgbe_write_reg((a), (reg) + ((offset) << 2), (value))
 202
 203 #define IXGBE_READ_REG_ARRAY(a, reg, offset) \
 204                 ixgbe_read_reg((a), (reg) + ((offset) << 2))
 205
 206 #define IXGBE_WRITE_FLUSH(a) ixgbe_read_reg((a), IXGBE_STATUS)
 207
 208 #define ixgbe_hw_to_netdev(hw) (((struct ixgbe_adapter *)(hw)->back)->netdev)
 209
 210 #define hw_dbg(hw, format, arg...) \
 211         netdev_dbg(ixgbe_hw_to_netdev(hw), format, ## arg)
 212 #define hw_err(hw, format, arg...) \
 213         netdev_err(ixgbe_hw_to_netdev(hw), format, ## arg)
 214 #define e_dev_info(format, arg...) \
 215         dev_info(&adapter->pdev->dev, format, ## arg)
 216 #define e_dev_warn(format, arg...) \
 217         dev_warn(&adapter->pdev->dev, format, ## arg)
 218 #define e_dev_err(format, arg...) \
 219         dev_err(&adapter->pdev->dev, format, ## arg)
 220 #define e_dev_notice(format, arg...) \
 221         dev_notice(&adapter->pdev->dev, format, ## arg)
 222 #define e_info(msglvl, format, arg...) \
 223         netif_info(adapter, msglvl, adapter->netdev, format, ## arg)
 224 #define e_err(msglvl, format, arg...) \
 225         netif_err(adapter, msglvl, adapter->netdev, format, ## arg)
 226 #define e_warn(msglvl, format, arg...) \
 227         netif_warn(adapter, msglvl, adapter->netdev, format, ## arg)
 228 #define e_crit(msglvl, format, arg...) \
 229         netif_crit(adapter, msglvl, adapter->netdev, format, ## arg)
 230 #endif /* IXGBE_COMMON */