drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.h

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 2017 Oracle and/or its affiliates. All rights reserved.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program.  If not, see <http://www.gnu.org/licenses/>.
  17
  18   The full GNU General Public License is included in this distribution in
  19   the file called "COPYING".
  20
  21   Contact Information:
  22   Linux NICS <linux.nics@intel.com>
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #ifndef _IXGBE_IPSEC_H_
  29 #define _IXGBE_IPSEC_H_
  30
  31 #define IXGBE_IPSEC_MAX_SA_COUNT        1024
  32 #define IXGBE_IPSEC_MAX_RX_IP_COUNT     128
  33 #define IXGBE_IPSEC_BASE_RX_INDEX       0
  34 #define IXGBE_IPSEC_BASE_TX_INDEX       IXGBE_IPSEC_MAX_SA_COUNT
  35
  36 #define IXGBE_RXTXIDX_IPS_EN            0x00000001
  37 #define IXGBE_RXIDX_TBL_SHIFT           1
  38 enum ixgbe_ipsec_tbl_sel {
  39         ips_rx_ip_tbl   =       0x01,
  40         ips_rx_spi_tbl  =       0x02,
  41         ips_rx_key_tbl  =       0x03,
  42 };
  43
  44 #define IXGBE_RXTXIDX_IDX_SHIFT         3
  45 #define IXGBE_RXTXIDX_READ              0x40000000
  46 #define IXGBE_RXTXIDX_WRITE             0x80000000
  47
  48 #define IXGBE_RXMOD_VALID               0x00000001
  49 #define IXGBE_RXMOD_PROTO_ESP           0x00000004
  50 #define IXGBE_RXMOD_DECRYPT             0x00000008
  51 #define IXGBE_RXMOD_IPV6                0x00000010
  52
  53 struct rx_sa {
  54         struct hlist_node hlist;
  55         struct xfrm_state *xs;
  56         __be32 ipaddr[4];
  57         u32 key[4];
  58         u32 salt;
  59         u32 mode;
  60         u8  iptbl_ind;
  61         bool used;
  62         bool decrypt;
  63 };
  64
  65 struct rx_ip_sa {
  66         __be32 ipaddr[4];
  67         u32 ref_cnt;
  68         bool used;
  69 };
  70
  71 struct tx_sa {
  72         struct xfrm_state *xs;
  73         u32 key[4];
  74         u32 salt;
  75         bool encrypt;
  76         bool used;
  77 };
  78
  79 struct ixgbe_ipsec_tx_data {
  80         u32 flags;
  81         u16 trailer_len;
  82         u16 sa_idx;
  83 };
  84
  85 struct ixgbe_ipsec {
  86         u16 num_rx_sa;
  87         u16 num_tx_sa;
  88         struct rx_ip_sa *ip_tbl;
  89         struct rx_sa *rx_tbl;
  90         struct tx_sa *tx_tbl;
  91         DECLARE_HASHTABLE(rx_sa_list, 10);
  92 };
  93 #endif /* _IXGBE_IPSEC_H_ */