Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / net / ethernet / mellanox / mlxsw / core.h
blob5ddafd74dc00b48783e88c8d40e8f4667670f85c
1 /*
2 * drivers/net/ethernet/mellanox/mlxsw/core.h
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
37 #ifndef _MLXSW_CORE_H
38 #define _MLXSW_CORE_H
40 #include <linux/module.h>
41 #include <linux/device.h>
42 #include <linux/slab.h>
43 #include <linux/gfp.h>
44 #include <linux/types.h>
45 #include <linux/skbuff.h>
46 #include <linux/workqueue.h>
47 #include <net/devlink.h>
49 #include "trap.h"
50 #include "reg.h"
51 #include "cmd.h"
52 #include "resources.h"
54 struct mlxsw_core;
55 struct mlxsw_core_port;
56 struct mlxsw_driver;
57 struct mlxsw_bus;
58 struct mlxsw_bus_info;
60 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
62 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);
64 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
65 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
67 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
68 const struct mlxsw_bus *mlxsw_bus,
69 void *bus_priv, bool reload,
70 struct devlink *devlink);
71 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);
73 struct mlxsw_tx_info {
74 u8 local_port;
75 bool is_emad;
78 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
79 const struct mlxsw_tx_info *tx_info);
80 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
81 const struct mlxsw_tx_info *tx_info);
83 struct mlxsw_rx_listener {
84 void (*func)(struct sk_buff *skb, u8 local_port, void *priv);
85 u8 local_port;
86 u16 trap_id;
87 enum mlxsw_reg_hpkt_action action;
90 struct mlxsw_event_listener {
91 void (*func)(const struct mlxsw_reg_info *reg,
92 char *payload, void *priv);
93 enum mlxsw_event_trap_id trap_id;
96 struct mlxsw_listener {
97 u16 trap_id;
98 union {
99 struct mlxsw_rx_listener rx_listener;
100 struct mlxsw_event_listener event_listener;
101 } u;
102 enum mlxsw_reg_hpkt_action action;
103 enum mlxsw_reg_hpkt_action unreg_action;
104 u8 trap_group;
105 bool is_ctrl; /* should go via control buffer or not */
106 bool is_event;
109 #define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _trap_group, \
110 _unreg_action) \
112 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
113 .u.rx_listener = \
115 .func = _func, \
116 .local_port = MLXSW_PORT_DONT_CARE, \
117 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
118 }, \
119 .action = MLXSW_REG_HPKT_ACTION_##_action, \
120 .unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action, \
121 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \
122 .is_ctrl = _is_ctrl, \
123 .is_event = false, \
126 #define MLXSW_EVENTL(_func, _trap_id, _trap_group) \
128 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
129 .u.event_listener = \
131 .func = _func, \
132 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
133 }, \
134 .action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \
135 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \
136 .is_ctrl = false, \
137 .is_event = true, \
140 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
141 const struct mlxsw_rx_listener *rxl,
142 void *priv);
143 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
144 const struct mlxsw_rx_listener *rxl,
145 void *priv);
147 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
148 const struct mlxsw_event_listener *el,
149 void *priv);
150 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
151 const struct mlxsw_event_listener *el,
152 void *priv);
154 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
155 const struct mlxsw_listener *listener,
156 void *priv);
157 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
158 const struct mlxsw_listener *listener,
159 void *priv);
161 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
162 size_t payload_len, unsigned long cb_priv);
164 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
165 const struct mlxsw_reg_info *reg, char *payload,
166 struct list_head *bulk_list,
167 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
168 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
169 const struct mlxsw_reg_info *reg, char *payload,
170 struct list_head *bulk_list,
171 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
172 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
174 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
175 const struct mlxsw_reg_info *reg, char *payload);
176 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
177 const struct mlxsw_reg_info *reg, char *payload);
179 struct mlxsw_rx_info {
180 bool is_lag;
181 union {
182 u16 sys_port;
183 u16 lag_id;
184 } u;
185 u8 lag_port_index;
186 int trap_id;
189 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
190 struct mlxsw_rx_info *rx_info);
192 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
193 u16 lag_id, u8 port_index, u8 local_port);
194 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
195 u16 lag_id, u8 port_index);
196 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
197 u16 lag_id, u8 local_port);
199 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
200 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port);
201 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port);
202 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
203 void *port_driver_priv, struct net_device *dev,
204 bool split, u32 split_group);
205 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
206 void *port_driver_priv);
207 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
208 void *port_driver_priv);
209 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
210 u8 local_port);
212 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
213 bool mlxsw_core_schedule_work(struct work_struct *work);
214 void mlxsw_core_flush_owq(void);
216 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
218 struct mlxsw_swid_config {
219 u8 used_type:1,
220 used_properties:1;
221 u8 type;
222 u8 properties;
225 struct mlxsw_config_profile {
226 u16 used_max_vepa_channels:1,
227 used_max_mid:1,
228 used_max_pgt:1,
229 used_max_system_port:1,
230 used_max_vlan_groups:1,
231 used_max_regions:1,
232 used_flood_tables:1,
233 used_flood_mode:1,
234 used_max_ib_mc:1,
235 used_max_pkey:1,
236 used_ar_sec:1,
237 used_adaptive_routing_group_cap:1,
238 used_kvd_split_data:1; /* indicate for the kvd's values */
240 u8 max_vepa_channels;
241 u16 max_mid;
242 u16 max_pgt;
243 u16 max_system_port;
244 u16 max_vlan_groups;
245 u16 max_regions;
246 u8 max_flood_tables;
247 u8 max_vid_flood_tables;
248 u8 flood_mode;
249 u8 max_fid_offset_flood_tables;
250 u16 fid_offset_flood_table_size;
251 u8 max_fid_flood_tables;
252 u16 fid_flood_table_size;
253 u16 max_ib_mc;
254 u16 max_pkey;
255 u8 ar_sec;
256 u16 adaptive_routing_group_cap;
257 u8 arn;
258 u32 kvd_linear_size;
259 u16 kvd_hash_granularity;
260 u8 kvd_hash_single_parts;
261 u8 kvd_hash_double_parts;
262 u8 resource_query_enable;
263 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
266 struct mlxsw_driver {
267 struct list_head list;
268 const char *kind;
269 size_t priv_size;
270 int (*init)(struct mlxsw_core *mlxsw_core,
271 const struct mlxsw_bus_info *mlxsw_bus_info);
272 void (*fini)(struct mlxsw_core *mlxsw_core);
273 int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core);
274 int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port,
275 enum devlink_port_type new_type);
276 int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port,
277 unsigned int count);
278 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port);
279 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
280 unsigned int sb_index, u16 pool_index,
281 struct devlink_sb_pool_info *pool_info);
282 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
283 unsigned int sb_index, u16 pool_index, u32 size,
284 enum devlink_sb_threshold_type threshold_type);
285 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
286 unsigned int sb_index, u16 pool_index,
287 u32 *p_threshold);
288 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
289 unsigned int sb_index, u16 pool_index,
290 u32 threshold);
291 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
292 unsigned int sb_index, u16 tc_index,
293 enum devlink_sb_pool_type pool_type,
294 u16 *p_pool_index, u32 *p_threshold);
295 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
296 unsigned int sb_index, u16 tc_index,
297 enum devlink_sb_pool_type pool_type,
298 u16 pool_index, u32 threshold);
299 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
300 unsigned int sb_index);
301 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
302 unsigned int sb_index);
303 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
304 unsigned int sb_index, u16 pool_index,
305 u32 *p_cur, u32 *p_max);
306 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
307 unsigned int sb_index, u16 tc_index,
308 enum devlink_sb_pool_type pool_type,
309 u32 *p_cur, u32 *p_max);
310 void (*txhdr_construct)(struct sk_buff *skb,
311 const struct mlxsw_tx_info *tx_info);
312 int (*resources_register)(struct mlxsw_core *mlxsw_core);
313 int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core,
314 const struct mlxsw_config_profile *profile,
315 u64 *p_single_size, u64 *p_double_size,
316 u64 *p_linear_size);
317 u8 txhdr_len;
318 const struct mlxsw_config_profile *profile;
321 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
322 const struct mlxsw_config_profile *profile,
323 u64 *p_single_size, u64 *p_double_size,
324 u64 *p_linear_size);
326 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
327 enum mlxsw_res_id res_id);
329 #define MLXSW_CORE_RES_VALID(res, short_res_id) \
330 mlxsw_core_res_valid(res, MLXSW_RES_ID_##short_res_id)
332 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
333 enum mlxsw_res_id res_id);
335 #define MLXSW_CORE_RES_GET(res, short_res_id) \
336 mlxsw_core_res_get(res, MLXSW_RES_ID_##short_res_id)
338 #define MLXSW_BUS_F_TXRX BIT(0)
340 struct mlxsw_bus {
341 const char *kind;
342 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
343 const struct mlxsw_config_profile *profile,
344 struct mlxsw_res *res);
345 void (*fini)(void *bus_priv);
346 void (*reset)(void *bus_priv);
347 bool (*skb_transmit_busy)(void *bus_priv,
348 const struct mlxsw_tx_info *tx_info);
349 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
350 const struct mlxsw_tx_info *tx_info);
351 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
352 u32 in_mod, bool out_mbox_direct,
353 char *in_mbox, size_t in_mbox_size,
354 char *out_mbox, size_t out_mbox_size,
355 u8 *p_status);
356 u8 features;
359 struct mlxsw_fw_rev {
360 u16 major;
361 u16 minor;
362 u16 subminor;
365 struct mlxsw_bus_info {
366 const char *device_kind;
367 const char *device_name;
368 struct device *dev;
369 struct mlxsw_fw_rev fw_rev;
370 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
371 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
374 struct mlxsw_hwmon;
376 #ifdef CONFIG_MLXSW_CORE_HWMON
378 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
379 const struct mlxsw_bus_info *mlxsw_bus_info,
380 struct mlxsw_hwmon **p_hwmon);
381 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
383 #else
385 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
386 const struct mlxsw_bus_info *mlxsw_bus_info,
387 struct mlxsw_hwmon **p_hwmon)
389 return 0;
392 #endif
394 struct mlxsw_thermal;
396 #ifdef CONFIG_MLXSW_CORE_THERMAL
398 int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
399 const struct mlxsw_bus_info *mlxsw_bus_info,
400 struct mlxsw_thermal **p_thermal);
401 void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
403 #else
405 static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
406 const struct mlxsw_bus_info *mlxsw_bus_info,
407 struct mlxsw_thermal **p_thermal)
409 return 0;
412 static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
416 #endif
418 #endif