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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / net / ethernet / qualcomm / emac / emac.c
blob13235baf476633df5b3ecfd5b4aa90c1519328b9
1 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13 /* Qualcomm Technologies, Inc. EMAC Gigabit Ethernet Driver */
14
15 #include <linux/if_ether.h>
16 #include <linux/if_vlan.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_net.h>
22 #include <linux/of_device.h>
23 #include <linux/phy.h>
24 #include <linux/platform_device.h>
25 #include <linux/acpi.h>
26 #include "emac.h"
27 #include "emac-mac.h"
28 #include "emac-phy.h"
29 #include "emac-sgmii.h"
30
31 #define EMAC_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
32 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP)
33
34 #define EMAC_RRD_SIZE 4
35 /* The RRD size if timestamping is enabled: */
36 #define EMAC_TS_RRD_SIZE 6
37 #define EMAC_TPD_SIZE 4
38 #define EMAC_RFD_SIZE 2
39
40 #define REG_MAC_RX_STATUS_BIN EMAC_RXMAC_STATC_REG0
41 #define REG_MAC_RX_STATUS_END EMAC_RXMAC_STATC_REG22
42 #define REG_MAC_TX_STATUS_BIN EMAC_TXMAC_STATC_REG0
43 #define REG_MAC_TX_STATUS_END EMAC_TXMAC_STATC_REG24
44
45 #define RXQ0_NUM_RFD_PREF_DEF 8
46 #define TXQ0_NUM_TPD_PREF_DEF 5
47
48 #define EMAC_PREAMBLE_DEF 7
49
50 #define DMAR_DLY_CNT_DEF 15
51 #define DMAW_DLY_CNT_DEF 4
52
53 #define IMR_NORMAL_MASK (ISR_ERROR | ISR_OVER | ISR_TX_PKT)
54
55 #define ISR_TX_PKT (\
56 TX_PKT_INT |\
57 TX_PKT_INT1 |\
58 TX_PKT_INT2 |\
59 TX_PKT_INT3)
60
61 #define ISR_OVER (\
62 RFD0_UR_INT |\
63 RFD1_UR_INT |\
64 RFD2_UR_INT |\
65 RFD3_UR_INT |\
66 RFD4_UR_INT |\
67 RXF_OF_INT |\
68 TXF_UR_INT)
69
70 #define ISR_ERROR (\
71 DMAR_TO_INT |\
72 DMAW_TO_INT |\
73 TXQ_TO_INT)
74
75 /* in sync with enum emac_clk_id */
76 static const char * const emac_clk_name[] = {
77 "axi_clk", "cfg_ahb_clk", "high_speed_clk", "mdio_clk", "tx_clk",
78 "rx_clk", "sys_clk"
79 };
80
81 void emac_reg_update32(void __iomem *addr, u32 mask, u32 val)
82 {
83 u32 data = readl(addr);
84
85 writel(((data & ~mask) | val), addr);
86 }
87
88 /* reinitialize */
89 int emac_reinit_locked(struct emac_adapter *adpt)
90 {
91 int ret;
92
93 mutex_lock(&adpt->reset_lock);
94
95 emac_mac_down(adpt);
96 emac_sgmii_reset(adpt);
97 ret = emac_mac_up(adpt);
98
99 mutex_unlock(&adpt->reset_lock);
100
101 return ret;
102 }
103
104 /* NAPI */
105 static int emac_napi_rtx(struct napi_struct *napi, int budget)
106 {
107 struct emac_rx_queue *rx_q =
108 container_of(napi, struct emac_rx_queue, napi);
109 struct emac_adapter *adpt = netdev_priv(rx_q->netdev);
110 struct emac_irq *irq = rx_q->irq;
111 int work_done = 0;
112
113 emac_mac_rx_process(adpt, rx_q, &work_done, budget);
114
115 if (work_done < budget) {
116 napi_complete_done(napi, work_done);
117
118 irq->mask |= rx_q->intr;
119 writel(irq->mask, adpt->base + EMAC_INT_MASK);
120 }
121
122 return work_done;
123 }
124
125 /* Transmit the packet */
126 static int emac_start_xmit(struct sk_buff *skb, struct net_device *netdev)
127 {
128 struct emac_adapter *adpt = netdev_priv(netdev);
129
130 return emac_mac_tx_buf_send(adpt, &adpt->tx_q, skb);
131 }
132
133 static irqreturn_t emac_isr(int _irq, void *data)
134 {
135 struct emac_irq *irq = data;
136 struct emac_adapter *adpt =
137 container_of(irq, struct emac_adapter, irq);
138 struct emac_rx_queue *rx_q = &adpt->rx_q;
139 u32 isr, status;
140
141 /* disable the interrupt */
142 writel(0, adpt->base + EMAC_INT_MASK);
143
144 isr = readl_relaxed(adpt->base + EMAC_INT_STATUS);
145
146 status = isr & irq->mask;
147 if (status == 0)
148 goto exit;
149
150 if (status & ISR_ERROR) {
151 net_err_ratelimited("%s: error interrupt 0x%lx\n",
152 adpt->netdev->name, status & ISR_ERROR);
153 /* reset MAC */
154 schedule_work(&adpt->work_thread);
155 }
156
157 /* Schedule the napi for receive queue with interrupt
158 * status bit set
159 */
160 if (status & rx_q->intr) {
161 if (napi_schedule_prep(&rx_q->napi)) {
162 irq->mask &= ~rx_q->intr;
163 __napi_schedule(&rx_q->napi);
164 }
165 }
166
167 if (status & TX_PKT_INT)
168 emac_mac_tx_process(adpt, &adpt->tx_q);
169
170 if (status & ISR_OVER)
171 net_warn_ratelimited("%s: TX/RX overflow interrupt\n",
172 adpt->netdev->name);
173
174 exit:
175 /* enable the interrupt */
176 writel(irq->mask, adpt->base + EMAC_INT_MASK);
177
178 return IRQ_HANDLED;
179 }
180
181 /* Configure VLAN tag strip/insert feature */
182 static int emac_set_features(struct net_device *netdev,
183 netdev_features_t features)
184 {
185 netdev_features_t changed = features ^ netdev->features;
186 struct emac_adapter *adpt = netdev_priv(netdev);
187
188 /* We only need to reprogram the hardware if the VLAN tag features
189 * have changed, and if it's already running.
190 */
191 if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX)))
192 return 0;
193
194 if (!netif_running(netdev))
195 return 0;
196
197 /* emac_mac_mode_config() uses netdev->features to configure the EMAC,
198 * so make sure it's set first.
199 */
200 netdev->features = features;
201
202 return emac_reinit_locked(adpt);
203 }
204
205 /* Configure Multicast and Promiscuous modes */
206 static void emac_rx_mode_set(struct net_device *netdev)
207 {
208 struct emac_adapter *adpt = netdev_priv(netdev);
209 struct netdev_hw_addr *ha;
210
211 emac_mac_mode_config(adpt);
212
213 /* update multicast address filtering */
214 emac_mac_multicast_addr_clear(adpt);
215 netdev_for_each_mc_addr(ha, netdev)
216 emac_mac_multicast_addr_set(adpt, ha->addr);
217 }
218
219 /* Change the Maximum Transfer Unit (MTU) */
220 static int emac_change_mtu(struct net_device *netdev, int new_mtu)
221 {
222 struct emac_adapter *adpt = netdev_priv(netdev);
223
224 netif_info(adpt, hw, adpt->netdev,
225 "changing MTU from %d to %d\n", netdev->mtu,
226 new_mtu);
227 netdev->mtu = new_mtu;
228
229 if (netif_running(netdev))
230 return emac_reinit_locked(adpt);
231
232 return 0;
233 }
234
235 /* Called when the network interface is made active */
236 static int emac_open(struct net_device *netdev)
237 {
238 struct emac_adapter *adpt = netdev_priv(netdev);
239 struct emac_irq *irq = &adpt->irq;
240 int ret;
241
242 ret = request_irq(irq->irq, emac_isr, 0, "emac-core0", irq);
243 if (ret) {
244 netdev_err(adpt->netdev, "could not request emac-core0 irq\n");
245 return ret;
246 }
247
248 /* allocate rx/tx dma buffer & descriptors */
249 ret = emac_mac_rx_tx_rings_alloc_all(adpt);
250 if (ret) {
251 netdev_err(adpt->netdev, "error allocating rx/tx rings\n");
252 free_irq(irq->irq, irq);
253 return ret;
254 }
255
256 ret = adpt->phy.open(adpt);
257 if (ret) {
258 emac_mac_rx_tx_rings_free_all(adpt);
259 free_irq(irq->irq, irq);
260 return ret;
261 }
262
263 ret = emac_mac_up(adpt);
264 if (ret) {
265 emac_mac_rx_tx_rings_free_all(adpt);
266 free_irq(irq->irq, irq);
267 adpt->phy.close(adpt);
268 return ret;
269 }
270
271 return 0;
272 }
273
274 /* Called when the network interface is disabled */
275 static int emac_close(struct net_device *netdev)
276 {
277 struct emac_adapter *adpt = netdev_priv(netdev);
278
279 mutex_lock(&adpt->reset_lock);
280
281 adpt->phy.close(adpt);
282 emac_mac_down(adpt);
283 emac_mac_rx_tx_rings_free_all(adpt);
284
285 free_irq(adpt->irq.irq, &adpt->irq);
286
287 mutex_unlock(&adpt->reset_lock);
288
289 return 0;
290 }
291
292 /* Respond to a TX hang */
293 static void emac_tx_timeout(struct net_device *netdev)
294 {
295 struct emac_adapter *adpt = netdev_priv(netdev);
296
297 schedule_work(&adpt->work_thread);
298 }
299
300 /* IOCTL support for the interface */
301 static int emac_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
302 {
303 if (!netif_running(netdev))
304 return -EINVAL;
305
306 if (!netdev->phydev)
307 return -ENODEV;
308
309 return phy_mii_ioctl(netdev->phydev, ifr, cmd);
310 }
311
312 /**
313 * emac_update_hw_stats - read the EMAC stat registers
314 *
315 * Reads the stats registers and write the values to adpt->stats.
316 *
317 * adpt->stats.lock must be held while calling this function,
318 * and while reading from adpt->stats.
319 */
320 void emac_update_hw_stats(struct emac_adapter *adpt)
321 {
322 struct emac_stats *stats = &adpt->stats;
323 u64 *stats_itr = &adpt->stats.rx_ok;
324 void __iomem *base = adpt->base;
325 unsigned int addr;
326
327 addr = REG_MAC_RX_STATUS_BIN;
328 while (addr <= REG_MAC_RX_STATUS_END) {
329 *stats_itr += readl_relaxed(base + addr);
330 stats_itr++;
331 addr += sizeof(u32);
332 }
333
334 /* additional rx status */
335 stats->rx_crc_align += readl_relaxed(base + EMAC_RXMAC_STATC_REG23);
336 stats->rx_jabbers += readl_relaxed(base + EMAC_RXMAC_STATC_REG24);
337
338 /* update tx status */
339 addr = REG_MAC_TX_STATUS_BIN;
340 stats_itr = &stats->tx_ok;
341
342 while (addr <= REG_MAC_TX_STATUS_END) {
343 *stats_itr += readl_relaxed(base + addr);
344 stats_itr++;
345 addr += sizeof(u32);
346 }
347
348 /* additional tx status */
349 stats->tx_col += readl_relaxed(base + EMAC_TXMAC_STATC_REG25);
350 }
351
352 /* Provide network statistics info for the interface */
353 static void emac_get_stats64(struct net_device *netdev,
354 struct rtnl_link_stats64 *net_stats)
355 {
356 struct emac_adapter *adpt = netdev_priv(netdev);
357 struct emac_stats *stats = &adpt->stats;
358
359 spin_lock(&stats->lock);
360
361 emac_update_hw_stats(adpt);
362
363 /* return parsed statistics */
364 net_stats->rx_packets = stats->rx_ok;
365 net_stats->tx_packets = stats->tx_ok;
366 net_stats->rx_bytes = stats->rx_byte_cnt;
367 net_stats->tx_bytes = stats->tx_byte_cnt;
368 net_stats->multicast = stats->rx_mcast;
369 net_stats->collisions = stats->tx_1_col + stats->tx_2_col * 2 +
370 stats->tx_late_col + stats->tx_abort_col;
371
372 net_stats->rx_errors = stats->rx_frag + stats->rx_fcs_err +
373 stats->rx_len_err + stats->rx_sz_ov +
374 stats->rx_align_err;
375 net_stats->rx_fifo_errors = stats->rx_rxf_ov;
376 net_stats->rx_length_errors = stats->rx_len_err;
377 net_stats->rx_crc_errors = stats->rx_fcs_err;
378 net_stats->rx_frame_errors = stats->rx_align_err;
379 net_stats->rx_over_errors = stats->rx_rxf_ov;
380 net_stats->rx_missed_errors = stats->rx_rxf_ov;
381
382 net_stats->tx_errors = stats->tx_late_col + stats->tx_abort_col +
383 stats->tx_underrun + stats->tx_trunc;
384 net_stats->tx_fifo_errors = stats->tx_underrun;
385 net_stats->tx_aborted_errors = stats->tx_abort_col;
386 net_stats->tx_window_errors = stats->tx_late_col;
387
388 spin_unlock(&stats->lock);
389 }
390
391 static const struct net_device_ops emac_netdev_ops = {
392 .ndo_open = emac_open,
393 .ndo_stop = emac_close,
394 .ndo_validate_addr = eth_validate_addr,
395 .ndo_start_xmit = emac_start_xmit,
396 .ndo_set_mac_address = eth_mac_addr,
397 .ndo_change_mtu = emac_change_mtu,
398 .ndo_do_ioctl = emac_ioctl,
399 .ndo_tx_timeout = emac_tx_timeout,
400 .ndo_get_stats64 = emac_get_stats64,
401 .ndo_set_features = emac_set_features,
402 .ndo_set_rx_mode = emac_rx_mode_set,
403 };
404
405 /* Watchdog task routine, called to reinitialize the EMAC */
406 static void emac_work_thread(struct work_struct *work)
407 {
408 struct emac_adapter *adpt =
409 container_of(work, struct emac_adapter, work_thread);
410
411 emac_reinit_locked(adpt);
412 }
413
414 /* Initialize various data structures */
415 static void emac_init_adapter(struct emac_adapter *adpt)
416 {
417 u32 reg;
418
419 adpt->rrd_size = EMAC_RRD_SIZE;
420 adpt->tpd_size = EMAC_TPD_SIZE;
421 adpt->rfd_size = EMAC_RFD_SIZE;
422
423 /* descriptors */
424 adpt->tx_desc_cnt = EMAC_DEF_TX_DESCS;
425 adpt->rx_desc_cnt = EMAC_DEF_RX_DESCS;
426
427 /* dma */
428 adpt->dma_order = emac_dma_ord_out;
429 adpt->dmar_block = emac_dma_req_4096;
430 adpt->dmaw_block = emac_dma_req_128;
431 adpt->dmar_dly_cnt = DMAR_DLY_CNT_DEF;
432 adpt->dmaw_dly_cnt = DMAW_DLY_CNT_DEF;
433 adpt->tpd_burst = TXQ0_NUM_TPD_PREF_DEF;
434 adpt->rfd_burst = RXQ0_NUM_RFD_PREF_DEF;
435
436 /* irq moderator */
437 reg = ((EMAC_DEF_RX_IRQ_MOD >> 1) << IRQ_MODERATOR2_INIT_SHFT) |
438 ((EMAC_DEF_TX_IRQ_MOD >> 1) << IRQ_MODERATOR_INIT_SHFT);
439 adpt->irq_mod = reg;
440
441 /* others */
442 adpt->preamble = EMAC_PREAMBLE_DEF;
443
444 /* default to automatic flow control */
445 adpt->automatic = true;
446
447 /* Disable single-pause-frame mode by default */
448 adpt->single_pause_mode = false;
449 }
450
451 /* Get the clock */
452 static int emac_clks_get(struct platform_device *pdev,
453 struct emac_adapter *adpt)
454 {
455 unsigned int i;
456
457 for (i = 0; i < EMAC_CLK_CNT; i++) {
458 struct clk *clk = devm_clk_get(&pdev->dev, emac_clk_name[i]);
459
460 if (IS_ERR(clk)) {
461 dev_err(&pdev->dev,
462 "could not claim clock %s (error=%li)\n",
463 emac_clk_name[i], PTR_ERR(clk));
464
465 return PTR_ERR(clk);
466 }
467
468 adpt->clk[i] = clk;
469 }
470
471 return 0;
472 }
473
474 /* Initialize clocks */
475 static int emac_clks_phase1_init(struct platform_device *pdev,
476 struct emac_adapter *adpt)
477 {
478 int ret;
479
480 /* On ACPI platforms, clocks are controlled by firmware and/or
481 * ACPI, not by drivers.
482 */
483 if (has_acpi_companion(&pdev->dev))
484 return 0;
485
486 ret = emac_clks_get(pdev, adpt);
487 if (ret)
488 return ret;
489
490 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_AXI]);
491 if (ret)
492 return ret;
493
494 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_CFG_AHB]);
495 if (ret)
496 return ret;
497
498 ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 19200000);
499 if (ret)
500 return ret;
501
502 return clk_prepare_enable(adpt->clk[EMAC_CLK_HIGH_SPEED]);
503 }
504
505 /* Enable clocks; needs emac_clks_phase1_init to be called before */
506 static int emac_clks_phase2_init(struct platform_device *pdev,
507 struct emac_adapter *adpt)
508 {
509 int ret;
510
511 if (has_acpi_companion(&pdev->dev))
512 return 0;
513
514 ret = clk_set_rate(adpt->clk[EMAC_CLK_TX], 125000000);
515 if (ret)
516 return ret;
517
518 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_TX]);
519 if (ret)
520 return ret;
521
522 ret = clk_set_rate(adpt->clk[EMAC_CLK_HIGH_SPEED], 125000000);
523 if (ret)
524 return ret;
525
526 ret = clk_set_rate(adpt->clk[EMAC_CLK_MDIO], 25000000);
527 if (ret)
528 return ret;
529
530 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_MDIO]);
531 if (ret)
532 return ret;
533
534 ret = clk_prepare_enable(adpt->clk[EMAC_CLK_RX]);
535 if (ret)
536 return ret;
537
538 return clk_prepare_enable(adpt->clk[EMAC_CLK_SYS]);
539 }
540
541 static void emac_clks_teardown(struct emac_adapter *adpt)
542 {
543
544 unsigned int i;
545
546 for (i = 0; i < EMAC_CLK_CNT; i++)
547 clk_disable_unprepare(adpt->clk[i]);
548 }
549
550 /* Get the resources */
551 static int emac_probe_resources(struct platform_device *pdev,
552 struct emac_adapter *adpt)
553 {
554 struct net_device *netdev = adpt->netdev;
555 struct resource *res;
556 char maddr[ETH_ALEN];
557 int ret = 0;
558
559 /* get mac address */
560 if (device_get_mac_address(&pdev->dev, maddr, ETH_ALEN))
561 ether_addr_copy(netdev->dev_addr, maddr);
562 else
563 eth_hw_addr_random(netdev);
564
565 /* Core 0 interrupt */
566 ret = platform_get_irq(pdev, 0);
567 if (ret < 0) {
568 dev_err(&pdev->dev,
569 "error: missing core0 irq resource (error=%i)\n", ret);
570 return ret;
571 }
572 adpt->irq.irq = ret;
573
574 /* base register address */
575 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
576 adpt->base = devm_ioremap_resource(&pdev->dev, res);
577 if (IS_ERR(adpt->base))
578 return PTR_ERR(adpt->base);
579
580 /* CSR register address */
581 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
582 adpt->csr = devm_ioremap_resource(&pdev->dev, res);
583 if (IS_ERR(adpt->csr))
584 return PTR_ERR(adpt->csr);
585
586 netdev->base_addr = (unsigned long)adpt->base;
587
588 return 0;
589 }
590
591 static const struct of_device_id emac_dt_match[] = {
592 {
593 .compatible = "qcom,fsm9900-emac",
594 },
595 {}
596 };
597 MODULE_DEVICE_TABLE(of, emac_dt_match);
598
599 #if IS_ENABLED(CONFIG_ACPI)
600 static const struct acpi_device_id emac_acpi_match[] = {
601 {
602 .id = "QCOM8070",
603 },
604 {}
605 };
606 MODULE_DEVICE_TABLE(acpi, emac_acpi_match);
607 #endif
608
609 static int emac_probe(struct platform_device *pdev)
610 {
611 struct net_device *netdev;
612 struct emac_adapter *adpt;
613 struct emac_sgmii *phy;
614 u16 devid, revid;
615 u32 reg;
616 int ret;
617
618 /* The TPD buffer address is limited to:
619 * 1. PTP: 45bits. (Driver doesn't support yet.)
620 * 2. NON-PTP: 46bits.
621 */
622 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(46));
623 if (ret) {
624 dev_err(&pdev->dev, "could not set DMA mask\n");
625 return ret;
626 }
627
628 netdev = alloc_etherdev(sizeof(struct emac_adapter));
629 if (!netdev)
630 return -ENOMEM;
631
632 dev_set_drvdata(&pdev->dev, netdev);
633 SET_NETDEV_DEV(netdev, &pdev->dev);
634 emac_set_ethtool_ops(netdev);
635
636 adpt = netdev_priv(netdev);
637 adpt->netdev = netdev;
638 adpt->msg_enable = EMAC_MSG_DEFAULT;
639
640 phy = &adpt->phy;
641 atomic_set(&phy->decode_error_count, 0);
642
643 mutex_init(&adpt->reset_lock);
644 spin_lock_init(&adpt->stats.lock);
645
646 adpt->irq.mask = RX_PKT_INT0 | IMR_NORMAL_MASK;
647
648 ret = emac_probe_resources(pdev, adpt);
649 if (ret)
650 goto err_undo_netdev;
651
652 /* initialize clocks */
653 ret = emac_clks_phase1_init(pdev, adpt);
654 if (ret) {
655 dev_err(&pdev->dev, "could not initialize clocks\n");
656 goto err_undo_netdev;
657 }
658
659 netdev->watchdog_timeo = EMAC_WATCHDOG_TIME;
660 netdev->irq = adpt->irq.irq;
661
662 netdev->netdev_ops = &emac_netdev_ops;
663
664 emac_init_adapter(adpt);
665
666 /* init external phy */
667 ret = emac_phy_config(pdev, adpt);
668 if (ret)
669 goto err_undo_clocks;
670
671 /* init internal sgmii phy */
672 ret = emac_sgmii_config(pdev, adpt);
673 if (ret)
674 goto err_undo_mdiobus;
675
676 /* enable clocks */
677 ret = emac_clks_phase2_init(pdev, adpt);
678 if (ret) {
679 dev_err(&pdev->dev, "could not initialize clocks\n");
680 goto err_undo_mdiobus;
681 }
682
683 /* set hw features */
684 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
685 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
686 NETIF_F_HW_VLAN_CTAG_TX;
687 netdev->hw_features = netdev->features;
688
689 netdev->vlan_features |= NETIF_F_SG | NETIF_F_HW_CSUM |
690 NETIF_F_TSO | NETIF_F_TSO6;
691
692 /* MTU range: 46 - 9194 */
693 netdev->min_mtu = EMAC_MIN_ETH_FRAME_SIZE -
694 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
695 netdev->max_mtu = EMAC_MAX_ETH_FRAME_SIZE -
696 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
697
698 INIT_WORK(&adpt->work_thread, emac_work_thread);
699
700 /* Initialize queues */
701 emac_mac_rx_tx_ring_init_all(pdev, adpt);
702
703 netif_napi_add(netdev, &adpt->rx_q.napi, emac_napi_rtx,
704 NAPI_POLL_WEIGHT);
705
706 ret = register_netdev(netdev);
707 if (ret) {
708 dev_err(&pdev->dev, "could not register net device\n");
709 goto err_undo_napi;
710 }
711
712 reg = readl_relaxed(adpt->base + EMAC_DMA_MAS_CTRL);
713 devid = (reg & DEV_ID_NUM_BMSK) >> DEV_ID_NUM_SHFT;
714 revid = (reg & DEV_REV_NUM_BMSK) >> DEV_REV_NUM_SHFT;
715 reg = readl_relaxed(adpt->base + EMAC_CORE_HW_VERSION);
716
717 netif_info(adpt, probe, netdev,
718 "hardware id %d.%d, hardware version %d.%d.%d\n",
719 devid, revid,
720 (reg & MAJOR_BMSK) >> MAJOR_SHFT,
721 (reg & MINOR_BMSK) >> MINOR_SHFT,
722 (reg & STEP_BMSK) >> STEP_SHFT);
723
724 return 0;
725
726 err_undo_napi:
727 netif_napi_del(&adpt->rx_q.napi);
728 err_undo_mdiobus:
729 put_device(&adpt->phydev->mdio.dev);
730 mdiobus_unregister(adpt->mii_bus);
731 err_undo_clocks:
732 emac_clks_teardown(adpt);
733 err_undo_netdev:
734 free_netdev(netdev);
735
736 return ret;
737 }
738
739 static int emac_remove(struct platform_device *pdev)
740 {
741 struct net_device *netdev = dev_get_drvdata(&pdev->dev);
742 struct emac_adapter *adpt = netdev_priv(netdev);
743
744 unregister_netdev(netdev);
745 netif_napi_del(&adpt->rx_q.napi);
746
747 emac_clks_teardown(adpt);
748
749 put_device(&adpt->phydev->mdio.dev);
750 mdiobus_unregister(adpt->mii_bus);
751 free_netdev(netdev);
752
753 if (adpt->phy.digital)
754 iounmap(adpt->phy.digital);
755 iounmap(adpt->phy.base);
756
757 return 0;
758 }
759
760 static void emac_shutdown(struct platform_device *pdev)
761 {
762 struct net_device *netdev = dev_get_drvdata(&pdev->dev);
763 struct emac_adapter *adpt = netdev_priv(netdev);
764 struct emac_sgmii *sgmii = &adpt->phy;
765
766 if (netdev->flags & IFF_UP) {
767 /* Closing the SGMII turns off its interrupts */
768 sgmii->close(adpt);
769
770 /* Resetting the MAC turns off all DMA and its interrupts */
771 emac_mac_reset(adpt);
772 }
773 }
774
775 static struct platform_driver emac_platform_driver = {
776 .probe = emac_probe,
777 .remove = emac_remove,
778 .driver = {
779 .name = "qcom-emac",
780 .of_match_table = emac_dt_match,
781 .acpi_match_table = ACPI_PTR(emac_acpi_match),
782 },
783 .shutdown = emac_shutdown,
784 };
785
786 module_platform_driver(emac_platform_driver);
787
788 MODULE_LICENSE("GPL v2");
789 MODULE_ALIAS("platform:qcom-emac");
CRIS linux kernel tree