drivers/net/wireless/mediatek/mt76/mt76x2_dma.c

   1 /*
   2  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include "mt76x2.h"
  18 #include "mt76x2_dma.h"
  19
  20 int
  21 mt76x2_tx_queue_mcu(struct mt76x2_dev *dev, enum mt76_txq_id qid,
  22                     struct sk_buff *skb, int cmd, int seq)
  23 {
  24         struct mt76_queue *q = &dev->mt76.q_tx[qid];
  25         struct mt76_queue_buf buf;
  26         dma_addr_t addr;
  27         u32 tx_info;
  28
  29         tx_info = MT_MCU_MSG_TYPE_CMD |
  30                   FIELD_PREP(MT_MCU_MSG_CMD_TYPE, cmd) |
  31                   FIELD_PREP(MT_MCU_MSG_CMD_SEQ, seq) |
  32                   FIELD_PREP(MT_MCU_MSG_PORT, CPU_TX_PORT) |
  33                   FIELD_PREP(MT_MCU_MSG_LEN, skb->len);
  34
  35         addr = dma_map_single(dev->mt76.dev, skb->data, skb->len,
  36                               DMA_TO_DEVICE);
  37         if (dma_mapping_error(dev->mt76.dev, addr))
  38                 return -ENOMEM;
  39
  40         buf.addr = addr;
  41         buf.len = skb->len;
  42         spin_lock_bh(&q->lock);
  43         mt76_queue_add_buf(dev, q, &buf, 1, tx_info, skb, NULL);
  44         mt76_queue_kick(dev, q);
  45         spin_unlock_bh(&q->lock);
  46
  47         return 0;
  48 }
  49
  50 static int
  51 mt76x2_init_tx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
  52                      int idx, int n_desc)
  53 {
  54         int ret;
  55
  56         q->regs = dev->mt76.regs + MT_TX_RING_BASE + idx * MT_RING_SIZE;
  57         q->ndesc = n_desc;
  58         q->hw_idx = idx;
  59
  60         ret = mt76_queue_alloc(dev, q);
  61         if (ret)
  62                 return ret;
  63
  64         mt76x2_irq_enable(dev, MT_INT_TX_DONE(idx));
  65
  66         return 0;
  67 }
  68
  69 void mt76x2_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
  70                          struct sk_buff *skb)
  71 {
  72         struct mt76x2_dev *dev = container_of(mdev, struct mt76x2_dev, mt76);
  73         void *rxwi = skb->data;
  74
  75         if (q == MT_RXQ_MCU) {
  76                 skb_queue_tail(&dev->mcu.res_q, skb);
  77                 wake_up(&dev->mcu.wait);
  78                 return;
  79         }
  80
  81         skb_pull(skb, sizeof(struct mt76x2_rxwi));
  82         if (mt76x2_mac_process_rx(dev, skb, rxwi)) {
  83                 dev_kfree_skb(skb);
  84                 return;
  85         }
  86
  87         mt76_rx(&dev->mt76, q, skb);
  88 }
  89
  90 static int
  91 mt76x2_init_rx_queue(struct mt76x2_dev *dev, struct mt76_queue *q,
  92                      int idx, int n_desc, int bufsize)
  93 {
  94         int ret;
  95
  96         q->regs = dev->mt76.regs + MT_RX_RING_BASE + idx * MT_RING_SIZE;
  97         q->ndesc = n_desc;
  98         q->buf_size = bufsize;
  99
 100         ret = mt76_queue_alloc(dev, q);
 101         if (ret)
 102                 return ret;
 103
 104         mt76x2_irq_enable(dev, MT_INT_RX_DONE(idx));
 105
 106         return 0;
 107 }
 108
 109 static void
 110 mt76x2_tx_tasklet(unsigned long data)
 111 {
 112         struct mt76x2_dev *dev = (struct mt76x2_dev *) data;
 113         int i;
 114
 115         mt76x2_mac_process_tx_status_fifo(dev);
 116
 117         for (i = MT_TXQ_MCU; i >= 0; i--)
 118                 mt76_queue_tx_cleanup(dev, i, false);
 119
 120         mt76x2_mac_poll_tx_status(dev, false);
 121         mt76x2_irq_enable(dev, MT_INT_TX_DONE_ALL);
 122 }
 123
 124 int mt76x2_dma_init(struct mt76x2_dev *dev)
 125 {
 126         static const u8 wmm_queue_map[] = {
 127                 [IEEE80211_AC_BE] = 0,
 128                 [IEEE80211_AC_BK] = 1,
 129                 [IEEE80211_AC_VI] = 2,
 130                 [IEEE80211_AC_VO] = 3,
 131         };
 132         int ret;
 133         int i;
 134         struct mt76_txwi_cache __maybe_unused *t;
 135         struct mt76_queue *q;
 136
 137         BUILD_BUG_ON(sizeof(t->txwi) < sizeof(struct mt76x2_txwi));
 138         BUILD_BUG_ON(sizeof(struct mt76x2_rxwi) > MT_RX_HEADROOM);
 139
 140         mt76_dma_attach(&dev->mt76);
 141
 142         init_waitqueue_head(&dev->mcu.wait);
 143         skb_queue_head_init(&dev->mcu.res_q);
 144
 145         tasklet_init(&dev->tx_tasklet, mt76x2_tx_tasklet, (unsigned long) dev);
 146
 147         mt76_wr(dev, MT_WPDMA_RST_IDX, ~0);
 148
 149         for (i = 0; i < ARRAY_SIZE(wmm_queue_map); i++) {
 150                 ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[i],
 151                                            wmm_queue_map[i], MT_TX_RING_SIZE);
 152                 if (ret)
 153                         return ret;
 154         }
 155
 156         ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_PSD],
 157                                    MT_TX_HW_QUEUE_MGMT, MT_TX_RING_SIZE);
 158         if (ret)
 159                 return ret;
 160
 161         ret = mt76x2_init_tx_queue(dev, &dev->mt76.q_tx[MT_TXQ_MCU],
 162                                    MT_TX_HW_QUEUE_MCU, MT_MCU_RING_SIZE);
 163         if (ret)
 164                 return ret;
 165
 166         ret = mt76x2_init_rx_queue(dev, &dev->mt76.q_rx[MT_RXQ_MCU], 1,
 167                                    MT_MCU_RING_SIZE, MT_RX_BUF_SIZE);
 168         if (ret)
 169                 return ret;
 170
 171         q = &dev->mt76.q_rx[MT_RXQ_MAIN];
 172         q->buf_offset = MT_RX_HEADROOM - sizeof(struct mt76x2_rxwi);
 173         ret = mt76x2_init_rx_queue(dev, q, 0, MT76x2_RX_RING_SIZE, MT_RX_BUF_SIZE);
 174         if (ret)
 175                 return ret;
 176
 177         return mt76_init_queues(dev);
 178 }
 179
 180 void mt76x2_dma_cleanup(struct mt76x2_dev *dev)
 181 {
 182         tasklet_kill(&dev->tx_tasklet);
 183         mt76_dma_cleanup(&dev->mt76);
 184 }