drivers/net/wireless/mediatek/mt76/mt76x2_mcu.c

   1 /*
   2  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/firmware.h>
  19 #include <linux/delay.h>
  20
  21 #include "mt76x2.h"
  22 #include "mt76x2_mcu.h"
  23 #include "mt76x2_dma.h"
  24 #include "mt76x2_eeprom.h"
  25
  26 struct mt76x2_fw_header {
  27         __le32 ilm_len;
  28         __le32 dlm_len;
  29         __le16 build_ver;
  30         __le16 fw_ver;
  31         u8 pad[4];
  32         char build_time[16];
  33 };
  34
  35 struct mt76x2_patch_header {
  36         char build_time[16];
  37         char platform[4];
  38         char hw_version[4];
  39         char patch_version[4];
  40         u8 pad[2];
  41 };
  42
  43 static struct sk_buff *mt76x2_mcu_msg_alloc(const void *data, int len)
  44 {
  45         struct sk_buff *skb;
  46
  47         skb = alloc_skb(len, GFP_KERNEL);
  48         if (!skb)
  49                 return NULL;
  50         memcpy(skb_put(skb, len), data, len);
  51
  52         return skb;
  53 }
  54
  55 static struct sk_buff *
  56 mt76x2_mcu_get_response(struct mt76x2_dev *dev, unsigned long expires)
  57 {
  58         unsigned long timeout;
  59
  60         if (!time_is_after_jiffies(expires))
  61                 return NULL;
  62
  63         timeout = expires - jiffies;
  64         wait_event_timeout(dev->mcu.wait, !skb_queue_empty(&dev->mcu.res_q),
  65                            timeout);
  66         return skb_dequeue(&dev->mcu.res_q);
  67 }
  68
  69 static int
  70 mt76x2_mcu_msg_send(struct mt76x2_dev *dev, struct sk_buff *skb,
  71                     enum mcu_cmd cmd)
  72 {
  73         unsigned long expires = jiffies + HZ;
  74         int ret;
  75         u8 seq;
  76
  77         if (!skb)
  78                 return -EINVAL;
  79
  80         mutex_lock(&dev->mcu.mutex);
  81
  82         seq = ++dev->mcu.msg_seq & 0xf;
  83         if (!seq)
  84                 seq = ++dev->mcu.msg_seq & 0xf;
  85
  86         ret = mt76x2_tx_queue_mcu(dev, MT_TXQ_MCU, skb, cmd, seq);
  87         if (ret)
  88                 goto out;
  89
  90         while (1) {
  91                 u32 *rxfce;
  92                 bool check_seq = false;
  93
  94                 skb = mt76x2_mcu_get_response(dev, expires);
  95                 if (!skb) {
  96                         dev_err(dev->mt76.dev,
  97                                 "MCU message %d (seq %d) timed out\n", cmd,
  98                                 seq);
  99                         ret = -ETIMEDOUT;
 100                         break;
 101                 }
 102
 103                 rxfce = (u32 *) skb->cb;
 104
 105                 if (seq == FIELD_GET(MT_RX_FCE_INFO_CMD_SEQ, *rxfce))
 106                         check_seq = true;
 107
 108                 dev_kfree_skb(skb);
 109                 if (check_seq)
 110                         break;
 111         }
 112
 113 out:
 114         mutex_unlock(&dev->mcu.mutex);
 115
 116         return ret;
 117 }
 118
 119 static int
 120 mt76pci_load_rom_patch(struct mt76x2_dev *dev)
 121 {
 122         const struct firmware *fw = NULL;
 123         struct mt76x2_patch_header *hdr;
 124         bool rom_protect = !is_mt7612(dev);
 125         int len, ret = 0;
 126         __le32 *cur;
 127         u32 patch_mask, patch_reg;
 128
 129         if (rom_protect && !mt76_poll(dev, MT_MCU_SEMAPHORE_03, 1, 1, 600)) {
 130                 dev_err(dev->mt76.dev,
 131                         "Could not get hardware semaphore for ROM PATCH\n");
 132                 return -ETIMEDOUT;
 133         }
 134
 135         if (mt76xx_rev(dev) >= MT76XX_REV_E3) {
 136                 patch_mask = BIT(0);
 137                 patch_reg = MT_MCU_CLOCK_CTL;
 138         } else {
 139                 patch_mask = BIT(1);
 140                 patch_reg = MT_MCU_COM_REG0;
 141         }
 142
 143         if (rom_protect && (mt76_rr(dev, patch_reg) & patch_mask)) {
 144                 dev_info(dev->mt76.dev, "ROM patch already applied\n");
 145                 goto out;
 146         }
 147
 148         ret = request_firmware(&fw, MT7662_ROM_PATCH, dev->mt76.dev);
 149         if (ret)
 150                 goto out;
 151
 152         if (!fw || !fw->data || fw->size <= sizeof(*hdr)) {
 153                 ret = -EIO;
 154                 dev_err(dev->mt76.dev, "Failed to load firmware\n");
 155                 goto out;
 156         }
 157
 158         hdr = (struct mt76x2_patch_header *) fw->data;
 159         dev_info(dev->mt76.dev, "ROM patch build: %.15s\n", hdr->build_time);
 160
 161         mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_ROM_PATCH_OFFSET);
 162
 163         cur = (__le32 *) (fw->data + sizeof(*hdr));
 164         len = fw->size - sizeof(*hdr);
 165         mt76_wr_copy(dev, MT_MCU_ROM_PATCH_ADDR, cur, len);
 166
 167         mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, 0);
 168
 169         /* Trigger ROM */
 170         mt76_wr(dev, MT_MCU_INT_LEVEL, 4);
 171
 172         if (!mt76_poll_msec(dev, patch_reg, patch_mask, patch_mask, 2000)) {
 173                 dev_err(dev->mt76.dev, "Failed to load ROM patch\n");
 174                 ret = -ETIMEDOUT;
 175         }
 176
 177 out:
 178         /* release semaphore */
 179         if (rom_protect)
 180                 mt76_wr(dev, MT_MCU_SEMAPHORE_03, 1);
 181         release_firmware(fw);
 182         return ret;
 183 }
 184
 185 static int
 186 mt76pci_load_firmware(struct mt76x2_dev *dev)
 187 {
 188         const struct firmware *fw;
 189         const struct mt76x2_fw_header *hdr;
 190         int i, len, ret;
 191         __le32 *cur;
 192         u32 offset, val;
 193
 194         ret = request_firmware(&fw, MT7662_FIRMWARE, dev->mt76.dev);
 195         if (ret)
 196                 return ret;
 197
 198         if (!fw || !fw->data || fw->size < sizeof(*hdr))
 199                 goto error;
 200
 201         hdr = (const struct mt76x2_fw_header *) fw->data;
 202
 203         len = sizeof(*hdr);
 204         len += le32_to_cpu(hdr->ilm_len);
 205         len += le32_to_cpu(hdr->dlm_len);
 206
 207         if (fw->size != len)
 208                 goto error;
 209
 210         val = le16_to_cpu(hdr->fw_ver);
 211         dev_info(dev->mt76.dev, "Firmware Version: %d.%d.%02d\n",
 212                  (val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf);
 213
 214         val = le16_to_cpu(hdr->build_ver);
 215         dev_info(dev->mt76.dev, "Build: %x\n", val);
 216         dev_info(dev->mt76.dev, "Build Time: %.16s\n", hdr->build_time);
 217
 218         cur = (__le32 *) (fw->data + sizeof(*hdr));
 219         len = le32_to_cpu(hdr->ilm_len);
 220
 221         mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_ILM_OFFSET);
 222         mt76_wr_copy(dev, MT_MCU_ILM_ADDR, cur, len);
 223
 224         cur += len / sizeof(*cur);
 225         len = le32_to_cpu(hdr->dlm_len);
 226
 227         if (mt76xx_rev(dev) >= MT76XX_REV_E3)
 228                 offset = MT_MCU_DLM_ADDR_E3;
 229         else
 230                 offset = MT_MCU_DLM_ADDR;
 231
 232         mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, MT_MCU_DLM_OFFSET);
 233         mt76_wr_copy(dev, offset, cur, len);
 234
 235         mt76_wr(dev, MT_MCU_PCIE_REMAP_BASE4, 0);
 236
 237         val = mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_2);
 238         if (FIELD_GET(MT_EE_NIC_CONF_2_XTAL_OPTION, val) == 1)
 239                 mt76_set(dev, MT_MCU_COM_REG0, BIT(30));
 240
 241         /* trigger firmware */
 242         mt76_wr(dev, MT_MCU_INT_LEVEL, 2);
 243         for (i = 200; i > 0; i--) {
 244                 val = mt76_rr(dev, MT_MCU_COM_REG0);
 245
 246                 if (val & 1)
 247                         break;
 248
 249                 msleep(10);
 250         }
 251
 252         if (!i) {
 253                 dev_err(dev->mt76.dev, "Firmware failed to start\n");
 254                 release_firmware(fw);
 255                 return -ETIMEDOUT;
 256         }
 257
 258         dev_info(dev->mt76.dev, "Firmware running!\n");
 259
 260         release_firmware(fw);
 261
 262         return ret;
 263
 264 error:
 265         dev_err(dev->mt76.dev, "Invalid firmware\n");
 266         release_firmware(fw);
 267         return -ENOENT;
 268 }
 269
 270 static int
 271 mt76x2_mcu_function_select(struct mt76x2_dev *dev, enum mcu_function func,
 272                            u32 val)
 273 {
 274         struct sk_buff *skb;
 275         struct {
 276             __le32 id;
 277             __le32 value;
 278         } __packed __aligned(4) msg = {
 279             .id = cpu_to_le32(func),
 280             .value = cpu_to_le32(val),
 281         };
 282
 283         skb = mt76x2_mcu_msg_alloc(&msg, sizeof(msg));
 284         return mt76x2_mcu_msg_send(dev, skb, CMD_FUN_SET_OP);
 285 }
 286
 287 int mt76x2_mcu_load_cr(struct mt76x2_dev *dev, u8 type, u8 temp_level,
 288                        u8 channel)
 289 {
 290         struct sk_buff *skb;
 291         struct {
 292                 u8 cr_mode;
 293                 u8 temp;
 294                 u8 ch;
 295                 u8 _pad0;
 296
 297                 __le32 cfg;
 298         } __packed __aligned(4) msg = {
 299                 .cr_mode = type,
 300                 .temp = temp_level,
 301                 .ch = channel,
 302         };
 303         u32 val;
 304
 305         val = BIT(31);
 306         val |= (mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_0) >> 8) & 0x00ff;
 307         val |= (mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_1) << 8) & 0xff00;
 308         msg.cfg = cpu_to_le32(val);
 309
 310         /* first set the channel without the extension channel info */
 311         skb = mt76x2_mcu_msg_alloc(&msg, sizeof(msg));
 312         return mt76x2_mcu_msg_send(dev, skb, CMD_LOAD_CR);
 313 }
 314
 315 int mt76x2_mcu_set_channel(struct mt76x2_dev *dev, u8 channel, u8 bw,
 316                            u8 bw_index, bool scan)
 317 {
 318         struct sk_buff *skb;
 319         struct {
 320                 u8 idx;
 321                 u8 scan;
 322                 u8 bw;
 323                 u8 _pad0;
 324
 325                 __le16 chainmask;
 326                 u8 ext_chan;
 327                 u8 _pad1;
 328
 329         } __packed __aligned(4) msg = {
 330                 .idx = channel,
 331                 .scan = scan,
 332                 .bw = bw,
 333                 .chainmask = cpu_to_le16(dev->chainmask),
 334         };
 335
 336         /* first set the channel without the extension channel info */
 337         skb = mt76x2_mcu_msg_alloc(&msg, sizeof(msg));
 338         mt76x2_mcu_msg_send(dev, skb, CMD_SWITCH_CHANNEL_OP);
 339
 340         usleep_range(5000, 10000);
 341
 342         msg.ext_chan = 0xe0 + bw_index;
 343         skb = mt76x2_mcu_msg_alloc(&msg, sizeof(msg));
 344         return mt76x2_mcu_msg_send(dev, skb, CMD_SWITCH_CHANNEL_OP);
 345 }
 346
 347 int mt76x2_mcu_set_radio_state(struct mt76x2_dev *dev, bool on)
 348 {
 349         struct sk_buff *skb;
 350         struct {
 351                 __le32 mode;
 352                 __le32 level;
 353         } __packed __aligned(4) msg = {
 354                 .mode = cpu_to_le32(on ? RADIO_ON : RADIO_OFF),
 355                 .level = cpu_to_le32(0),
 356         };
 357
 358         skb = mt76x2_mcu_msg_alloc(&msg, sizeof(msg));
 359         return mt76x2_mcu_msg_send(dev, skb, CMD_POWER_SAVING_OP);
 360 }
 361
 362 int mt76x2_mcu_calibrate(struct mt76x2_dev *dev, enum mcu_calibration type,
 363                          u32 param)
 364 {
 365         struct sk_buff *skb;
 366         struct {
 367                 __le32 id;
 368                 __le32 value;
 369         } __packed __aligned(4) msg = {
 370                 .id = cpu_to_le32(type),
 371                 .value = cpu_to_le32(param),
 372         };
 373         int ret;
 374
 375         mt76_clear(dev, MT_MCU_COM_REG0, BIT(31));
 376
 377         skb = mt76x2_mcu_msg_alloc(&msg, sizeof(msg));
 378         ret = mt76x2_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP);
 379         if (ret)
 380                 return ret;
 381
 382         if (WARN_ON(!mt76_poll_msec(dev, MT_MCU_COM_REG0,
 383                                     BIT(31), BIT(31), 100)))
 384                 return -ETIMEDOUT;
 385
 386         return 0;
 387 }
 388
 389 int mt76x2_mcu_tssi_comp(struct mt76x2_dev *dev,
 390                          struct mt76x2_tssi_comp *tssi_data)
 391 {
 392         struct sk_buff *skb;
 393         struct {
 394                 __le32 id;
 395                 struct mt76x2_tssi_comp data;
 396         } __packed __aligned(4) msg = {
 397                 .id = cpu_to_le32(MCU_CAL_TSSI_COMP),
 398                 .data = *tssi_data,
 399         };
 400
 401         skb = mt76x2_mcu_msg_alloc(&msg, sizeof(msg));
 402         return mt76x2_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP);
 403 }
 404
 405 int mt76x2_mcu_init_gain(struct mt76x2_dev *dev, u8 channel, u32 gain,
 406                          bool force)
 407 {
 408         struct sk_buff *skb;
 409         struct {
 410                 __le32 channel;
 411                 __le32 gain_val;
 412         } __packed __aligned(4) msg = {
 413                 .channel = cpu_to_le32(channel),
 414                 .gain_val = cpu_to_le32(gain),
 415         };
 416
 417         if (force)
 418                 msg.channel |= cpu_to_le32(BIT(31));
 419
 420         skb = mt76x2_mcu_msg_alloc(&msg, sizeof(msg));
 421         return mt76x2_mcu_msg_send(dev, skb, CMD_INIT_GAIN_OP);
 422 }
 423
 424 int mt76x2_mcu_init(struct mt76x2_dev *dev)
 425 {
 426         int ret;
 427
 428         mutex_init(&dev->mcu.mutex);
 429
 430         ret = mt76pci_load_rom_patch(dev);
 431         if (ret)
 432                 return ret;
 433
 434         ret = mt76pci_load_firmware(dev);
 435         if (ret)
 436                 return ret;
 437
 438         mt76x2_mcu_function_select(dev, Q_SELECT, 1);
 439         return 0;
 440 }
 441
 442 int mt76x2_mcu_cleanup(struct mt76x2_dev *dev)
 443 {
 444         struct sk_buff *skb;
 445
 446         mt76_wr(dev, MT_MCU_INT_LEVEL, 1);
 447         usleep_range(20000, 30000);
 448
 449         while ((skb = skb_dequeue(&dev->mcu.res_q)) != NULL)
 450                 dev_kfree_skb(skb);
 451
 452         return 0;
 453 }