Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / net / wireless / realtek / rtlwifi / rtl8192de / table.h
blob7fefc483ec2861a7470cc794c5f4128d2d3a3951
1 /******************************************************************************
3 * Copyright(c) 2009-2012 Realtek Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
22 * Larry Finger <Larry.Finger@lwfinger.net>
24 * Created on 2010/ 5/18, 1:41
25 *****************************************************************************/
27 #ifndef __RTL92DE_TABLE__H_
28 #define __RTL92DE_TABLE__H_
30 /*Created on 2011/ 1/14, 1:35*/
32 #define PHY_REG_2T_ARRAYLENGTH 380
33 extern u32 rtl8192de_phy_reg_2tarray[PHY_REG_2T_ARRAYLENGTH];
34 #define PHY_REG_ARRAY_PG_LENGTH 624
35 extern u32 rtl8192de_phy_reg_array_pg[PHY_REG_ARRAY_PG_LENGTH];
36 #define RADIOA_2T_ARRAYLENGTH 378
37 extern u32 rtl8192de_radioa_2tarray[RADIOA_2T_ARRAYLENGTH];
38 #define RADIOB_2T_ARRAYLENGTH 384
39 extern u32 rtl8192de_radiob_2tarray[RADIOB_2T_ARRAYLENGTH];
40 #define RADIOA_2T_INT_PA_ARRAYLENGTH 378
41 extern u32 rtl8192de_radioa_2t_int_paarray[RADIOA_2T_INT_PA_ARRAYLENGTH];
42 #define RADIOB_2T_INT_PA_ARRAYLENGTH 384
43 extern u32 rtl8192de_radiob_2t_int_paarray[RADIOB_2T_INT_PA_ARRAYLENGTH];
44 #define MAC_2T_ARRAYLENGTH 160
45 extern u32 rtl8192de_mac_2tarray[MAC_2T_ARRAYLENGTH];
46 #define AGCTAB_ARRAYLENGTH 386
47 extern u32 rtl8192de_agctab_array[AGCTAB_ARRAYLENGTH];
48 #define AGCTAB_5G_ARRAYLENGTH 194
49 extern u32 rtl8192de_agctab_5garray[AGCTAB_5G_ARRAYLENGTH];
50 #define AGCTAB_2G_ARRAYLENGTH 194
51 extern u32 rtl8192de_agctab_2garray[AGCTAB_2G_ARRAYLENGTH];
53 #endif