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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[cris-mirror.git] / drivers / tty / serial / m32r_sio.c
blob7b83a8aab4954b0ce31d7d9a282b7f7fc7863ed7
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * m32r_sio.c
4 *
5 * Driver for M32R serial ports
6 *
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Based on drivers/serial/8250.c.
9 *
10 * Copyright (C) 2001 Russell King.
11 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 */
13
14 /*
15 * A note about mapbase / membase
16 *
17 * mapbase is the physical address of the IO port. Currently, we don't
18 * support this very well, and it may well be dropped from this driver
19 * in future. As such, mapbase should be NULL.
20 *
21 * membase is an 'ioremapped' cookie. This is compatible with the old
22 * serial.c driver, and is currently the preferred form.
23 */
24
25 #if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
26 #define SUPPORT_SYSRQ
27 #endif
28
29 #include <linux/tty.h>
30 #include <linux/tty_flip.h>
31 #include <linux/ioport.h>
32 #include <linux/init.h>
33 #include <linux/console.h>
34 #include <linux/sysrq.h>
35 #include <linux/serial.h>
36 #include <linux/delay.h>
37
38 #include <asm/m32r.h>
39 #include <asm/io.h>
40 #include <asm/irq.h>
41
42 #define BAUD_RATE 115200
43
44 #include <linux/serial_core.h>
45 #include "m32r_sio_reg.h"
46
47 #define PASS_LIMIT 256
48
49 static const struct {
50 unsigned int port;
51 unsigned int irq;
52 } old_serial_port[] = {
53 #if defined(CONFIG_PLAT_USRV)
54 /* PORT IRQ FLAGS */
55 { 0x3F8, PLD_IRQ_UART0 }, /* ttyS0 */
56 { 0x2F8, PLD_IRQ_UART1 }, /* ttyS1 */
57 #elif defined(CONFIG_SERIAL_M32R_PLDSIO)
58 { ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV }, /* ttyS0 */
59 #else
60 { M32R_SIO_OFFSET, M32R_IRQ_SIO0_R }, /* ttyS0 */
61 #endif
62 };
63
64 #define UART_NR ARRAY_SIZE(old_serial_port)
65
66 struct uart_sio_port {
67 struct uart_port port;
68 struct timer_list timer; /* "no irq" timer */
69 struct list_head list; /* ports on this IRQ */
70 unsigned char ier;
71 };
72
73 struct irq_info {
74 spinlock_t lock;
75 struct list_head *head;
76 };
77
78 static struct irq_info irq_lists[NR_IRQS];
79
80 #ifdef CONFIG_SERIAL_M32R_PLDSIO
81
82 #define __sio_in(x) inw((unsigned long)(x))
83 #define __sio_out(v,x) outw((v),(unsigned long)(x))
84
85 static inline void sio_set_baud_rate(unsigned long baud)
86 {
87 unsigned short sbaud;
88 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
89 __sio_out(sbaud, PLD_ESIO0BAUR);
90 }
91
92 static void sio_reset(void)
93 {
94 unsigned short tmp;
95
96 tmp = __sio_in(PLD_ESIO0RXB);
97 tmp = __sio_in(PLD_ESIO0RXB);
98 tmp = __sio_in(PLD_ESIO0CR);
99 sio_set_baud_rate(BAUD_RATE);
100 __sio_out(0x0300, PLD_ESIO0CR);
101 __sio_out(0x0003, PLD_ESIO0CR);
102 }
103
104 static void sio_init(void)
105 {
106 unsigned short tmp;
107
108 tmp = __sio_in(PLD_ESIO0RXB);
109 tmp = __sio_in(PLD_ESIO0RXB);
110 tmp = __sio_in(PLD_ESIO0CR);
111 __sio_out(0x0300, PLD_ESIO0CR);
112 __sio_out(0x0003, PLD_ESIO0CR);
113 }
114
115 static void sio_error(int *status)
116 {
117 printk("SIO0 error[%04x]\n", *status);
118 do {
119 sio_init();
120 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
121 }
122
123 #else /* not CONFIG_SERIAL_M32R_PLDSIO */
124
125 #define __sio_in(x) inl(x)
126 #define __sio_out(v,x) outl((v),(x))
127
128 static inline void sio_set_baud_rate(unsigned long baud)
129 {
130 unsigned long i, j;
131
132 i = boot_cpu_data.bus_clock / (baud * 16);
133 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
134 i -= 1;
135 j = (j + 1) >> 1;
136
137 __sio_out(i, M32R_SIO0_BAUR_PORTL);
138 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
139 }
140
141 static void sio_reset(void)
142 {
143 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
144 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
145 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
146 sio_set_baud_rate(BAUD_RATE);
147 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
148 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
149 }
150
151 static void sio_init(void)
152 {
153 unsigned int tmp;
154
155 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
156 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
157 tmp = __sio_in(M32R_SIO0_STS_PORTL);
158 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
159 }
160
161 static void sio_error(int *status)
162 {
163 printk("SIO0 error[%04x]\n", *status);
164 do {
165 sio_init();
166 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
167 }
168
169 #endif /* CONFIG_SERIAL_M32R_PLDSIO */
170
171 static unsigned int sio_in(struct uart_sio_port *up, int offset)
172 {
173 return __sio_in(up->port.iobase + offset);
174 }
175
176 static void sio_out(struct uart_sio_port *up, int offset, int value)
177 {
178 __sio_out(value, up->port.iobase + offset);
179 }
180
181 static unsigned int serial_in(struct uart_sio_port *up, int offset)
182 {
183 if (!offset)
184 return 0;
185
186 return __sio_in(offset);
187 }
188
189 static void serial_out(struct uart_sio_port *up, int offset, int value)
190 {
191 if (!offset)
192 return;
193
194 __sio_out(value, offset);
195 }
196
197 static void m32r_sio_stop_tx(struct uart_port *port)
198 {
199 struct uart_sio_port *up =
200 container_of(port, struct uart_sio_port, port);
201
202 if (up->ier & UART_IER_THRI) {
203 up->ier &= ~UART_IER_THRI;
204 serial_out(up, UART_IER, up->ier);
205 }
206 }
207
208 static void m32r_sio_start_tx(struct uart_port *port)
209 {
210 #ifdef CONFIG_SERIAL_M32R_PLDSIO
211 struct uart_sio_port *up =
212 container_of(port, struct uart_sio_port, port);
213 struct circ_buf *xmit = &up->port.state->xmit;
214
215 if (!(up->ier & UART_IER_THRI)) {
216 up->ier |= UART_IER_THRI;
217 serial_out(up, UART_IER, up->ier);
218 if (!uart_circ_empty(xmit)) {
219 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
220 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
221 up->port.icount.tx++;
222 }
223 }
224 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
225 #else
226 struct uart_sio_port *up =
227 container_of(port, struct uart_sio_port, port);
228
229 if (!(up->ier & UART_IER_THRI)) {
230 up->ier |= UART_IER_THRI;
231 serial_out(up, UART_IER, up->ier);
232 }
233 #endif
234 }
235
236 static void m32r_sio_stop_rx(struct uart_port *port)
237 {
238 struct uart_sio_port *up =
239 container_of(port, struct uart_sio_port, port);
240
241 up->ier &= ~UART_IER_RLSI;
242 up->port.read_status_mask &= ~UART_LSR_DR;
243 serial_out(up, UART_IER, up->ier);
244 }
245
246 static void m32r_sio_enable_ms(struct uart_port *port)
247 {
248 struct uart_sio_port *up =
249 container_of(port, struct uart_sio_port, port);
250
251 up->ier |= UART_IER_MSI;
252 serial_out(up, UART_IER, up->ier);
253 }
254
255 static void receive_chars(struct uart_sio_port *up, int *status)
256 {
257 struct tty_port *port = &up->port.state->port;
258 unsigned char ch;
259 unsigned char flag;
260 int max_count = 256;
261
262 do {
263 ch = sio_in(up, SIORXB);
264 flag = TTY_NORMAL;
265 up->port.icount.rx++;
266
267 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
268 UART_LSR_FE | UART_LSR_OE))) {
269 /*
270 * For statistics only
271 */
272 if (*status & UART_LSR_BI) {
273 *status &= ~(UART_LSR_FE | UART_LSR_PE);
274 up->port.icount.brk++;
275 /*
276 * We do the SysRQ and SAK checking
277 * here because otherwise the break
278 * may get masked by ignore_status_mask
279 * or read_status_mask.
280 */
281 if (uart_handle_break(&up->port))
282 goto ignore_char;
283 } else if (*status & UART_LSR_PE)
284 up->port.icount.parity++;
285 else if (*status & UART_LSR_FE)
286 up->port.icount.frame++;
287 if (*status & UART_LSR_OE)
288 up->port.icount.overrun++;
289
290 /*
291 * Mask off conditions which should be ingored.
292 */
293 *status &= up->port.read_status_mask;
294
295 if (*status & UART_LSR_BI) {
296 pr_debug("handling break....\n");
297 flag = TTY_BREAK;
298 } else if (*status & UART_LSR_PE)
299 flag = TTY_PARITY;
300 else if (*status & UART_LSR_FE)
301 flag = TTY_FRAME;
302 }
303 if (uart_handle_sysrq_char(&up->port, ch))
304 goto ignore_char;
305 if ((*status & up->port.ignore_status_mask) == 0)
306 tty_insert_flip_char(port, ch, flag);
307
308 if (*status & UART_LSR_OE) {
309 /*
310 * Overrun is special, since it's reported
311 * immediately, and doesn't affect the current
312 * character.
313 */
314 tty_insert_flip_char(port, 0, TTY_OVERRUN);
315 }
316 ignore_char:
317 *status = serial_in(up, UART_LSR);
318 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
319
320 spin_unlock(&up->port.lock);
321 tty_flip_buffer_push(port);
322 spin_lock(&up->port.lock);
323 }
324
325 static void transmit_chars(struct uart_sio_port *up)
326 {
327 struct circ_buf *xmit = &up->port.state->xmit;
328 int count;
329
330 if (up->port.x_char) {
331 #ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
332 serial_out(up, UART_TX, up->port.x_char);
333 #endif
334 up->port.icount.tx++;
335 up->port.x_char = 0;
336 return;
337 }
338 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
339 m32r_sio_stop_tx(&up->port);
340 return;
341 }
342
343 count = up->port.fifosize;
344 do {
345 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
346 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
347 up->port.icount.tx++;
348 if (uart_circ_empty(xmit))
349 break;
350 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE));
351
352 } while (--count > 0);
353
354 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
355 uart_write_wakeup(&up->port);
356
357 pr_debug("THRE...\n");
358
359 if (uart_circ_empty(xmit))
360 m32r_sio_stop_tx(&up->port);
361 }
362
363 /*
364 * This handles the interrupt from one port.
365 */
366 static inline void m32r_sio_handle_port(struct uart_sio_port *up,
367 unsigned int status)
368 {
369 pr_debug("status = %x...\n", status);
370
371 if (status & 0x04)
372 receive_chars(up, &status);
373 if (status & 0x01)
374 transmit_chars(up);
375 }
376
377 /*
378 * This is the serial driver's interrupt routine.
379 *
380 * Arjan thinks the old way was overly complex, so it got simplified.
381 * Alan disagrees, saying that need the complexity to handle the weird
382 * nature of ISA shared interrupts. (This is a special exception.)
383 *
384 * In order to handle ISA shared interrupts properly, we need to check
385 * that all ports have been serviced, and therefore the ISA interrupt
386 * line has been de-asserted.
387 *
388 * This means we need to loop through all ports. checking that they
389 * don't have an interrupt pending.
390 */
391 static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id)
392 {
393 struct irq_info *i = dev_id;
394 struct list_head *l, *end = NULL;
395 int pass_counter = 0;
396
397 pr_debug("m32r_sio_interrupt(%d)...\n", irq);
398
399 #ifdef CONFIG_SERIAL_M32R_PLDSIO
400 // if (irq == PLD_IRQ_SIO0_SND)
401 // irq = PLD_IRQ_SIO0_RCV;
402 #else
403 if (irq == M32R_IRQ_SIO0_S)
404 irq = M32R_IRQ_SIO0_R;
405 #endif
406
407 spin_lock(&i->lock);
408
409 l = i->head;
410 do {
411 struct uart_sio_port *up;
412 unsigned int sts;
413
414 up = list_entry(l, struct uart_sio_port, list);
415
416 sts = sio_in(up, SIOSTS);
417 if (sts & 0x5) {
418 spin_lock(&up->port.lock);
419 m32r_sio_handle_port(up, sts);
420 spin_unlock(&up->port.lock);
421
422 end = NULL;
423 } else if (end == NULL)
424 end = l;
425
426 l = l->next;
427
428 if (l == i->head && pass_counter++ > PASS_LIMIT) {
429 if (sts & 0xe0)
430 sio_error(&sts);
431 break;
432 }
433 } while (l != end);
434
435 spin_unlock(&i->lock);
436
437 pr_debug("end.\n");
438
439 return IRQ_HANDLED;
440 }
441
442 /*
443 * To support ISA shared interrupts, we need to have one interrupt
444 * handler that ensures that the IRQ line has been deasserted
445 * before returning. Failing to do this will result in the IRQ
446 * line being stuck active, and, since ISA irqs are edge triggered,
447 * no more IRQs will be seen.
448 */
449 static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
450 {
451 spin_lock_irq(&i->lock);
452
453 if (!list_empty(i->head)) {
454 if (i->head == &up->list)
455 i->head = i->head->next;
456 list_del(&up->list);
457 } else {
458 BUG_ON(i->head != &up->list);
459 i->head = NULL;
460 }
461
462 spin_unlock_irq(&i->lock);
463 }
464
465 static int serial_link_irq_chain(struct uart_sio_port *up)
466 {
467 struct irq_info *i = irq_lists + up->port.irq;
468 int ret, irq_flags = 0;
469
470 spin_lock_irq(&i->lock);
471
472 if (i->head) {
473 list_add(&up->list, i->head);
474 spin_unlock_irq(&i->lock);
475
476 ret = 0;
477 } else {
478 INIT_LIST_HEAD(&up->list);
479 i->head = &up->list;
480 spin_unlock_irq(&i->lock);
481
482 ret = request_irq(up->port.irq, m32r_sio_interrupt,
483 irq_flags, "SIO0-RX", i);
484 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
485 irq_flags, "SIO0-TX", i);
486 if (ret < 0)
487 serial_do_unlink(i, up);
488 }
489
490 return ret;
491 }
492
493 static void serial_unlink_irq_chain(struct uart_sio_port *up)
494 {
495 struct irq_info *i = irq_lists + up->port.irq;
496
497 BUG_ON(i->head == NULL);
498
499 if (list_empty(i->head)) {
500 free_irq(up->port.irq, i);
501 free_irq(up->port.irq + 1, i);
502 }
503
504 serial_do_unlink(i, up);
505 }
506
507 /*
508 * This function is used to handle ports that do not have an interrupt.
509 */
510 static void m32r_sio_timeout(struct timer_list *t)
511 {
512 struct uart_sio_port *up = from_timer(up, t, timer);
513 unsigned int timeout;
514 unsigned int sts;
515
516 sts = sio_in(up, SIOSTS);
517 if (sts & 0x5) {
518 spin_lock(&up->port.lock);
519 m32r_sio_handle_port(up, sts);
520 spin_unlock(&up->port.lock);
521 }
522
523 timeout = up->port.timeout;
524 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
525 mod_timer(&up->timer, jiffies + timeout);
526 }
527
528 static unsigned int m32r_sio_tx_empty(struct uart_port *port)
529 {
530 struct uart_sio_port *up =
531 container_of(port, struct uart_sio_port, port);
532 unsigned long flags;
533 unsigned int ret;
534
535 spin_lock_irqsave(&up->port.lock, flags);
536 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
537 spin_unlock_irqrestore(&up->port.lock, flags);
538
539 return ret;
540 }
541
542 static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
543 {
544 return 0;
545 }
546
547 static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
548 {
549
550 }
551
552 static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
553 {
554
555 }
556
557 static int m32r_sio_startup(struct uart_port *port)
558 {
559 struct uart_sio_port *up =
560 container_of(port, struct uart_sio_port, port);
561 int retval;
562
563 sio_init();
564
565 /*
566 * If the "interrupt" for this port doesn't correspond with any
567 * hardware interrupt, we use a timer-based system. The original
568 * driver used to do this with IRQ0.
569 */
570 if (!up->port.irq) {
571 unsigned int timeout = up->port.timeout;
572
573 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
574
575 mod_timer(&up->timer, jiffies + timeout);
576 } else {
577 retval = serial_link_irq_chain(up);
578 if (retval)
579 return retval;
580 }
581
582 /*
583 * Finally, enable interrupts. Note: Modem status interrupts
584 * are set via set_termios(), which will be occurring imminently
585 * anyway, so we don't enable them here.
586 * - M32R_SIO: 0x0c
587 * - M32R_PLDSIO: 0x04
588 */
589 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
590 sio_out(up, SIOTRCR, up->ier);
591
592 /*
593 * And clear the interrupt registers again for luck.
594 */
595 sio_reset();
596
597 return 0;
598 }
599
600 static void m32r_sio_shutdown(struct uart_port *port)
601 {
602 struct uart_sio_port *up =
603 container_of(port, struct uart_sio_port, port);
604
605 /*
606 * Disable interrupts from this port
607 */
608 up->ier = 0;
609 sio_out(up, SIOTRCR, 0);
610
611 /*
612 * Disable break condition and FIFOs
613 */
614
615 sio_init();
616
617 if (!up->port.irq)
618 del_timer_sync(&up->timer);
619 else
620 serial_unlink_irq_chain(up);
621 }
622
623 static unsigned int m32r_sio_get_divisor(struct uart_port *port,
624 unsigned int baud)
625 {
626 return uart_get_divisor(port, baud);
627 }
628
629 static void m32r_sio_set_termios(struct uart_port *port,
630 struct ktermios *termios, struct ktermios *old)
631 {
632 struct uart_sio_port *up =
633 container_of(port, struct uart_sio_port, port);
634 unsigned char cval = 0;
635 unsigned long flags;
636 unsigned int baud, quot;
637
638 switch (termios->c_cflag & CSIZE) {
639 case CS5:
640 cval = UART_LCR_WLEN5;
641 break;
642 case CS6:
643 cval = UART_LCR_WLEN6;
644 break;
645 case CS7:
646 cval = UART_LCR_WLEN7;
647 break;
648 default:
649 case CS8:
650 cval = UART_LCR_WLEN8;
651 break;
652 }
653
654 if (termios->c_cflag & CSTOPB)
655 cval |= UART_LCR_STOP;
656 if (termios->c_cflag & PARENB)
657 cval |= UART_LCR_PARITY;
658 if (!(termios->c_cflag & PARODD))
659 cval |= UART_LCR_EPAR;
660 #ifdef CMSPAR
661 if (termios->c_cflag & CMSPAR)
662 cval |= UART_LCR_SPAR;
663 #endif
664
665 /*
666 * Ask the core to calculate the divisor for us.
667 */
668 #ifdef CONFIG_SERIAL_M32R_PLDSIO
669 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
670 #else
671 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
672 #endif
673 quot = m32r_sio_get_divisor(port, baud);
674
675 /*
676 * Ok, we're now changing the port state. Do it with
677 * interrupts disabled.
678 */
679 spin_lock_irqsave(&up->port.lock, flags);
680
681 sio_set_baud_rate(baud);
682
683 /*
684 * Update the per-port timeout.
685 */
686 uart_update_timeout(port, termios->c_cflag, baud);
687
688 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
689 if (termios->c_iflag & INPCK)
690 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
691 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
692 up->port.read_status_mask |= UART_LSR_BI;
693
694 /*
695 * Characteres to ignore
696 */
697 up->port.ignore_status_mask = 0;
698 if (termios->c_iflag & IGNPAR)
699 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
700 if (termios->c_iflag & IGNBRK) {
701 up->port.ignore_status_mask |= UART_LSR_BI;
702 /*
703 * If we're ignoring parity and break indicators,
704 * ignore overruns too (for real raw support).
705 */
706 if (termios->c_iflag & IGNPAR)
707 up->port.ignore_status_mask |= UART_LSR_OE;
708 }
709
710 /*
711 * ignore all characters if CREAD is not set
712 */
713 if ((termios->c_cflag & CREAD) == 0)
714 up->port.ignore_status_mask |= UART_LSR_DR;
715
716 /*
717 * CTS flow control flag and modem status interrupts
718 */
719 up->ier &= ~UART_IER_MSI;
720 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
721 up->ier |= UART_IER_MSI;
722
723 serial_out(up, UART_IER, up->ier);
724
725 spin_unlock_irqrestore(&up->port.lock, flags);
726 }
727
728 /*
729 * Resource handling. This is complicated by the fact that resources
730 * depend on the port type. Maybe we should be claiming the standard
731 * 8250 ports, and then trying to get other resources as necessary?
732 */
733 static int
734 m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
735 {
736 unsigned int size = 8 << up->port.regshift;
737 #ifndef CONFIG_SERIAL_M32R_PLDSIO
738 unsigned long start;
739 #endif
740 int ret = 0;
741
742 switch (up->port.iotype) {
743 case UPIO_MEM:
744 if (up->port.mapbase) {
745 #ifdef CONFIG_SERIAL_M32R_PLDSIO
746 *res = request_mem_region(up->port.mapbase, size, "serial");
747 #else
748 start = up->port.mapbase;
749 *res = request_mem_region(start, size, "serial");
750 #endif
751 if (!*res)
752 ret = -EBUSY;
753 }
754 break;
755
756 case UPIO_PORT:
757 *res = request_region(up->port.iobase, size, "serial");
758 if (!*res)
759 ret = -EBUSY;
760 break;
761 }
762 return ret;
763 }
764
765 static void m32r_sio_release_port(struct uart_port *port)
766 {
767 struct uart_sio_port *up =
768 container_of(port, struct uart_sio_port, port);
769 unsigned long start, offset = 0, size = 0;
770
771 size <<= up->port.regshift;
772
773 switch (up->port.iotype) {
774 case UPIO_MEM:
775 if (up->port.mapbase) {
776 /*
777 * Unmap the area.
778 */
779 iounmap(up->port.membase);
780 up->port.membase = NULL;
781
782 start = up->port.mapbase;
783
784 if (size)
785 release_mem_region(start + offset, size);
786 release_mem_region(start, 8 << up->port.regshift);
787 }
788 break;
789
790 case UPIO_PORT:
791 start = up->port.iobase;
792
793 if (size)
794 release_region(start + offset, size);
795 release_region(start + offset, 8 << up->port.regshift);
796 break;
797
798 default:
799 break;
800 }
801 }
802
803 static int m32r_sio_request_port(struct uart_port *port)
804 {
805 struct uart_sio_port *up =
806 container_of(port, struct uart_sio_port, port);
807 struct resource *res = NULL;
808 int ret = 0;
809
810 ret = m32r_sio_request_std_resource(up, &res);
811
812 /*
813 * If we have a mapbase, then request that as well.
814 */
815 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
816 int size = resource_size(res);
817
818 up->port.membase = ioremap(up->port.mapbase, size);
819 if (!up->port.membase)
820 ret = -ENOMEM;
821 }
822
823 if (ret < 0) {
824 if (res)
825 release_resource(res);
826 }
827
828 return ret;
829 }
830
831 static void m32r_sio_config_port(struct uart_port *port, int unused)
832 {
833 struct uart_sio_port *up =
834 container_of(port, struct uart_sio_port, port);
835 unsigned long flags;
836
837 spin_lock_irqsave(&up->port.lock, flags);
838
839 up->port.fifosize = 1;
840
841 spin_unlock_irqrestore(&up->port.lock, flags);
842 }
843
844 static int
845 m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
846 {
847 if (ser->irq >= nr_irqs || ser->irq < 0 || ser->baud_base < 9600)
848 return -EINVAL;
849 return 0;
850 }
851
852 static const struct uart_ops m32r_sio_pops = {
853 .tx_empty = m32r_sio_tx_empty,
854 .set_mctrl = m32r_sio_set_mctrl,
855 .get_mctrl = m32r_sio_get_mctrl,
856 .stop_tx = m32r_sio_stop_tx,
857 .start_tx = m32r_sio_start_tx,
858 .stop_rx = m32r_sio_stop_rx,
859 .enable_ms = m32r_sio_enable_ms,
860 .break_ctl = m32r_sio_break_ctl,
861 .startup = m32r_sio_startup,
862 .shutdown = m32r_sio_shutdown,
863 .set_termios = m32r_sio_set_termios,
864 .release_port = m32r_sio_release_port,
865 .request_port = m32r_sio_request_port,
866 .config_port = m32r_sio_config_port,
867 .verify_port = m32r_sio_verify_port,
868 };
869
870 static struct uart_sio_port m32r_sio_ports[UART_NR];
871
872 static void __init m32r_sio_init_ports(void)
873 {
874 struct uart_sio_port *up;
875 static int first = 1;
876 int i;
877
878 if (!first)
879 return;
880 first = 0;
881
882 for (i = 0, up = m32r_sio_ports; i < UART_NR; i++, up++) {
883 up->port.iobase = old_serial_port[i].port;
884 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
885 up->port.uartclk = BAUD_RATE * 16;
886 up->port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
887 up->port.membase = 0;
888 up->port.iotype = 0;
889 up->port.regshift = 0;
890 up->port.ops = &m32r_sio_pops;
891 }
892 }
893
894 static void __init m32r_sio_register_ports(struct uart_driver *drv)
895 {
896 int i;
897
898 m32r_sio_init_ports();
899
900 for (i = 0; i < UART_NR; i++) {
901 struct uart_sio_port *up = &m32r_sio_ports[i];
902
903 up->port.line = i;
904 up->port.ops = &m32r_sio_pops;
905 timer_setup(&up->timer, m32r_sio_timeout, 0);
906
907 uart_add_one_port(drv, &up->port);
908 }
909 }
910
911 #ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
912
913 /*
914 * Wait for transmitter & holding register to empty
915 */
916 static void wait_for_xmitr(struct uart_sio_port *up)
917 {
918 unsigned int status, tmout = 10000;
919
920 /* Wait up to 10ms for the character(s) to be sent. */
921 do {
922 status = sio_in(up, SIOSTS);
923
924 if (--tmout == 0)
925 break;
926 udelay(1);
927 } while ((status & UART_EMPTY) != UART_EMPTY);
928
929 /* Wait up to 1s for flow control if necessary */
930 if (up->port.flags & UPF_CONS_FLOW) {
931 tmout = 1000000;
932 while (--tmout)
933 udelay(1);
934 }
935 }
936
937 static void m32r_sio_console_putchar(struct uart_port *port, int ch)
938 {
939 struct uart_sio_port *up =
940 container_of(port, struct uart_sio_port, port);
941
942 wait_for_xmitr(up);
943 sio_out(up, SIOTXB, ch);
944 }
945
946 /*
947 * Print a string to the serial port trying not to disturb
948 * any possible real use of the port...
949 *
950 * The console_lock must be held when we get here.
951 */
952 static void m32r_sio_console_write(struct console *co, const char *s,
953 unsigned int count)
954 {
955 struct uart_sio_port *up = &m32r_sio_ports[co->index];
956 unsigned int ier;
957
958 /*
959 * First save the UER then disable the interrupts
960 */
961 ier = sio_in(up, SIOTRCR);
962 sio_out(up, SIOTRCR, 0);
963
964 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
965
966 /*
967 * Finally, wait for transmitter to become empty
968 * and restore the IER
969 */
970 wait_for_xmitr(up);
971 sio_out(up, SIOTRCR, ier);
972 }
973
974 static int __init m32r_sio_console_setup(struct console *co, char *options)
975 {
976 struct uart_port *port;
977 int baud = 9600;
978 int bits = 8;
979 int parity = 'n';
980 int flow = 'n';
981
982 /*
983 * Check whether an invalid uart number has been specified, and
984 * if so, search for the first available port that does have
985 * console support.
986 */
987 if (co->index >= UART_NR)
988 co->index = 0;
989 port = &m32r_sio_ports[co->index].port;
990
991 /*
992 * Temporary fix.
993 */
994 spin_lock_init(&port->lock);
995
996 if (options)
997 uart_parse_options(options, &baud, &parity, &bits, &flow);
998
999 return uart_set_options(port, co, baud, parity, bits, flow);
1000 }
1001
1002 static struct uart_driver m32r_sio_reg;
1003 static struct console m32r_sio_console = {
1004 .name = "ttyS",
1005 .write = m32r_sio_console_write,
1006 .device = uart_console_device,
1007 .setup = m32r_sio_console_setup,
1008 .flags = CON_PRINTBUFFER,
1009 .index = -1,
1010 .data = &m32r_sio_reg,
1011 };
1012
1013 static int __init m32r_sio_console_init(void)
1014 {
1015 sio_reset();
1016 sio_init();
1017 m32r_sio_init_ports();
1018 register_console(&m32r_sio_console);
1019 return 0;
1020 }
1021 console_initcall(m32r_sio_console_init);
1022
1023 #define M32R_SIO_CONSOLE &m32r_sio_console
1024 #else
1025 #define M32R_SIO_CONSOLE NULL
1026 #endif
1027
1028 static struct uart_driver m32r_sio_reg = {
1029 .owner = THIS_MODULE,
1030 .driver_name = "sio",
1031 .dev_name = "ttyS",
1032 .major = TTY_MAJOR,
1033 .minor = 64,
1034 .nr = UART_NR,
1035 .cons = M32R_SIO_CONSOLE,
1036 };
1037
1038 static int __init m32r_sio_init(void)
1039 {
1040 int ret, i;
1041
1042 printk(KERN_INFO "Serial: M32R SIO driver\n");
1043
1044 for (i = 0; i < nr_irqs; i++)
1045 spin_lock_init(&irq_lists[i].lock);
1046
1047 ret = uart_register_driver(&m32r_sio_reg);
1048 if (ret >= 0)
1049 m32r_sio_register_ports(&m32r_sio_reg);
1050
1051 return ret;
1052 }
1053 device_initcall(m32r_sio_init);
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