1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _DMA_REMAPPING_H
3 #define _DMA_REMAPPING_H
6 * VT-d hardware uses 4KiB page size regardless of host page size.
8 #define VTD_PAGE_SHIFT (12)
9 #define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT)
10 #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT)
11 #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK)
13 #define VTD_STRIDE_SHIFT (9)
14 #define VTD_STRIDE_MASK (((u64)-1) << VTD_STRIDE_SHIFT)
16 #define DMA_PTE_READ (1)
17 #define DMA_PTE_WRITE (2)
18 #define DMA_PTE_LARGE_PAGE (1 << 7)
19 #define DMA_PTE_SNP (1 << 11)
21 #define CONTEXT_TT_MULTI_LEVEL 0
22 #define CONTEXT_TT_DEV_IOTLB 1
23 #define CONTEXT_TT_PASS_THROUGH 2
24 /* Extended context entry types */
25 #define CONTEXT_TT_PT_PASID 4
26 #define CONTEXT_TT_PT_PASID_DEV_IOTLB 5
27 #define CONTEXT_TT_MASK (7ULL << 2)
29 #define CONTEXT_DINVE (1ULL << 8)
30 #define CONTEXT_PRS (1ULL << 9)
31 #define CONTEXT_PASIDE (1ULL << 11)
38 #ifdef CONFIG_INTEL_IOMMU
39 extern int iommu_calculate_agaw(struct intel_iommu
*iommu
);
40 extern int iommu_calculate_max_sagaw(struct intel_iommu
*iommu
);
41 extern int dmar_disabled
;
42 extern int intel_iommu_enabled
;
43 extern int intel_iommu_tboot_noforce
;
45 static inline int iommu_calculate_agaw(struct intel_iommu
*iommu
)
49 static inline int iommu_calculate_max_sagaw(struct intel_iommu
*iommu
)
53 #define dmar_disabled (1)
54 #define intel_iommu_enabled (0)