tools/perf/pmu-events/arch/arm64/cortex-a53/other.json

   1 [
   2   {,
   3     "EventCode": "0x86",
   4     "EventName": "EXC_IRQ",
   5     "BriefDescription": "Exception taken, IRQ"
   6   },
   7   {,
   8     "EventCode": "0x87",
   9     "EventName": "EXC_FIQ",
  10     "BriefDescription": "Exception taken, FIQ"
  11   },
  12   {,
  13     "EventCode": "0xC6",
  14     "EventName": "PRE_DECODE_ERR",
  15     "BriefDescription": "Pre-decode error"
  16   },
  17   {,
  18     "EventCode": "0xD0",
  19     "EventName": "L1I_CACHE_ERR",
  20     "BriefDescription": "L1 Instruction Cache (data or tag) memory error"
  21   },
  22   {,
  23     "EventCode": "0xD1",
  24     "EventName": "L1D_CACHE_ERR",
  25     "BriefDescription": "L1 Data Cache (data, tag or dirty) memory error, correctable or non-correctable"
  26   },
  27   {,
  28     "EventCode": "0xD2",
  29     "EventName": "TLB_ERR",
  30     "BriefDescription": "TLB memory error"
  31   }
  32 ]