arch/arm/mach-mx5/board-mx51_babbage.c

   1 /*
   2  * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/i2c.h>
  16 #include <linux/gpio.h>
  17 #include <linux/delay.h>
  18 #include <linux/io.h>
  19 #include <linux/fsl_devices.h>
  20 #include <linux/fec.h>
  21 #include <linux/gpio_keys.h>
  22 #include <linux/input.h>
  23 #include <linux/spi/flash.h>
  24 #include <linux/spi/spi.h>
  25
  26 #include <mach/common.h>
  27 #include <mach/hardware.h>
  28 #include <mach/iomux-mx51.h>
  29 #include <mach/mxc_ehci.h>
  30
  31 #include <asm/irq.h>
  32 #include <asm/setup.h>
  33 #include <asm/mach-types.h>
  34 #include <asm/mach/arch.h>
  35 #include <asm/mach/time.h>
  36
  37 #include "devices-imx51.h"
  38 #include "devices.h"
  39 #include "cpu_op-mx51.h"
  40
  41 #define BABBAGE_USB_HUB_RESET   IMX_GPIO_NR(1, 7)
  42 #define BABBAGE_USBH1_STP       IMX_GPIO_NR(1, 27)
  43 #define BABBAGE_PHY_RESET       IMX_GPIO_NR(2, 5)
  44 #define BABBAGE_FEC_PHY_RESET   IMX_GPIO_NR(2, 14)
  45 #define BABBAGE_POWER_KEY       IMX_GPIO_NR(2, 21)
  46 #define BABBAGE_ECSPI1_CS0      IMX_GPIO_NR(4, 24)
  47 #define BABBAGE_ECSPI1_CS1      IMX_GPIO_NR(4, 25)
  48
  49 /* USB_CTRL_1 */
  50 #define MX51_USB_CTRL_1_OFFSET                  0x10
  51 #define MX51_USB_CTRL_UH1_EXT_CLK_EN            (1 << 25)
  52
  53 #define MX51_USB_PLLDIV_12_MHZ          0x00
  54 #define MX51_USB_PLL_DIV_19_2_MHZ       0x01
  55 #define MX51_USB_PLL_DIV_24_MHZ 0x02
  56
  57 static struct gpio_keys_button babbage_buttons[] = {
  58         {
  59                 .gpio           = BABBAGE_POWER_KEY,
  60                 .code           = BTN_0,
  61                 .desc           = "PWR",
  62                 .active_low     = 1,
  63                 .wakeup         = 1,
  64         },
  65 };
  66
  67 static const struct gpio_keys_platform_data imx_button_data __initconst = {
  68         .buttons        = babbage_buttons,
  69         .nbuttons       = ARRAY_SIZE(babbage_buttons),
  70 };
  71
  72 static iomux_v3_cfg_t mx51babbage_pads[] = {
  73         /* UART1 */
  74         MX51_PAD_UART1_RXD__UART1_RXD,
  75         MX51_PAD_UART1_TXD__UART1_TXD,
  76         MX51_PAD_UART1_RTS__UART1_RTS,
  77         MX51_PAD_UART1_CTS__UART1_CTS,
  78
  79         /* UART2 */
  80         MX51_PAD_UART2_RXD__UART2_RXD,
  81         MX51_PAD_UART2_TXD__UART2_TXD,
  82
  83         /* UART3 */
  84         MX51_PAD_EIM_D25__UART3_RXD,
  85         MX51_PAD_EIM_D26__UART3_TXD,
  86         MX51_PAD_EIM_D27__UART3_RTS,
  87         MX51_PAD_EIM_D24__UART3_CTS,
  88
  89         /* I2C1 */
  90         MX51_PAD_EIM_D16__I2C1_SDA,
  91         MX51_PAD_EIM_D19__I2C1_SCL,
  92
  93         /* I2C2 */
  94         MX51_PAD_KEY_COL4__I2C2_SCL,
  95         MX51_PAD_KEY_COL5__I2C2_SDA,
  96
  97         /* HSI2C */
  98         MX51_PAD_I2C1_CLK__I2C1_CLK,
  99         MX51_PAD_I2C1_DAT__I2C1_DAT,
 100
 101         /* USB HOST1 */
 102         MX51_PAD_USBH1_CLK__USBH1_CLK,
 103         MX51_PAD_USBH1_DIR__USBH1_DIR,
 104         MX51_PAD_USBH1_NXT__USBH1_NXT,
 105         MX51_PAD_USBH1_DATA0__USBH1_DATA0,
 106         MX51_PAD_USBH1_DATA1__USBH1_DATA1,
 107         MX51_PAD_USBH1_DATA2__USBH1_DATA2,
 108         MX51_PAD_USBH1_DATA3__USBH1_DATA3,
 109         MX51_PAD_USBH1_DATA4__USBH1_DATA4,
 110         MX51_PAD_USBH1_DATA5__USBH1_DATA5,
 111         MX51_PAD_USBH1_DATA6__USBH1_DATA6,
 112         MX51_PAD_USBH1_DATA7__USBH1_DATA7,
 113
 114         /* USB HUB reset line*/
 115         MX51_PAD_GPIO1_7__GPIO1_7,
 116
 117         /* FEC */
 118         MX51_PAD_EIM_EB2__FEC_MDIO,
 119         MX51_PAD_EIM_EB3__FEC_RDATA1,
 120         MX51_PAD_EIM_CS2__FEC_RDATA2,
 121         MX51_PAD_EIM_CS3__FEC_RDATA3,
 122         MX51_PAD_EIM_CS4__FEC_RX_ER,
 123         MX51_PAD_EIM_CS5__FEC_CRS,
 124         MX51_PAD_NANDF_RB2__FEC_COL,
 125         MX51_PAD_NANDF_RB3__FEC_RX_CLK,
 126         MX51_PAD_NANDF_D9__FEC_RDATA0,
 127         MX51_PAD_NANDF_D8__FEC_TDATA0,
 128         MX51_PAD_NANDF_CS2__FEC_TX_ER,
 129         MX51_PAD_NANDF_CS3__FEC_MDC,
 130         MX51_PAD_NANDF_CS4__FEC_TDATA1,
 131         MX51_PAD_NANDF_CS5__FEC_TDATA2,
 132         MX51_PAD_NANDF_CS6__FEC_TDATA3,
 133         MX51_PAD_NANDF_CS7__FEC_TX_EN,
 134         MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK,
 135
 136         /* FEC PHY reset line */
 137         MX51_PAD_EIM_A20__GPIO2_14,
 138
 139         /* SD 1 */
 140         MX51_PAD_SD1_CMD__SD1_CMD,
 141         MX51_PAD_SD1_CLK__SD1_CLK,
 142         MX51_PAD_SD1_DATA0__SD1_DATA0,
 143         MX51_PAD_SD1_DATA1__SD1_DATA1,
 144         MX51_PAD_SD1_DATA2__SD1_DATA2,
 145         MX51_PAD_SD1_DATA3__SD1_DATA3,
 146
 147         /* SD 2 */
 148         MX51_PAD_SD2_CMD__SD2_CMD,
 149         MX51_PAD_SD2_CLK__SD2_CLK,
 150         MX51_PAD_SD2_DATA0__SD2_DATA0,
 151         MX51_PAD_SD2_DATA1__SD2_DATA1,
 152         MX51_PAD_SD2_DATA2__SD2_DATA2,
 153         MX51_PAD_SD2_DATA3__SD2_DATA3,
 154
 155         /* eCSPI1 */
 156         MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
 157         MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
 158         MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
 159         MX51_PAD_CSPI1_SS0__GPIO4_24,
 160         MX51_PAD_CSPI1_SS1__GPIO4_25,
 161 };
 162
 163 /* Serial ports */
 164 static const struct imxuart_platform_data uart_pdata __initconst = {
 165         .flags = IMXUART_HAVE_RTSCTS,
 166 };
 167
 168 static const struct imxi2c_platform_data babbage_i2c_data __initconst = {
 169         .bitrate = 100000,
 170 };
 171
 172 static struct imxi2c_platform_data babbage_hsi2c_data = {
 173         .bitrate = 400000,
 174 };
 175
 176 static int gpio_usbh1_active(void)
 177 {
 178         iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27;
 179         iomux_v3_cfg_t phyreset_gpio = MX51_PAD_EIM_D21__GPIO2_5;
 180         int ret;
 181
 182         /* Set USBH1_STP to GPIO and toggle it */
 183         mxc_iomux_v3_setup_pad(usbh1stp_gpio);
 184         ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp");
 185
 186         if (ret) {
 187                 pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret);
 188                 return ret;
 189         }
 190         gpio_direction_output(BABBAGE_USBH1_STP, 0);
 191         gpio_set_value(BABBAGE_USBH1_STP, 1);
 192         msleep(100);
 193         gpio_free(BABBAGE_USBH1_STP);
 194
 195         /* De-assert USB PHY RESETB */
 196         mxc_iomux_v3_setup_pad(phyreset_gpio);
 197         ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset");
 198
 199         if (ret) {
 200                 pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret);
 201                 return ret;
 202         }
 203         gpio_direction_output(BABBAGE_PHY_RESET, 1);
 204         return 0;
 205 }
 206
 207 static inline void babbage_usbhub_reset(void)
 208 {
 209         int ret;
 210
 211         /* Bring USB hub out of reset */
 212         ret = gpio_request(BABBAGE_USB_HUB_RESET, "GPIO1_7");
 213         if (ret) {
 214                 printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret);
 215                 return;
 216         }
 217         gpio_direction_output(BABBAGE_USB_HUB_RESET, 0);
 218
 219         /* USB HUB RESET - De-assert USB HUB RESET_N */
 220         msleep(1);
 221         gpio_set_value(BABBAGE_USB_HUB_RESET, 0);
 222         msleep(1);
 223         gpio_set_value(BABBAGE_USB_HUB_RESET, 1);
 224 }
 225
 226 static inline void babbage_fec_reset(void)
 227 {
 228         int ret;
 229
 230         /* reset FEC PHY */
 231         ret = gpio_request(BABBAGE_FEC_PHY_RESET, "fec-phy-reset");
 232         if (ret) {
 233                 printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret);
 234                 return;
 235         }
 236         gpio_direction_output(BABBAGE_FEC_PHY_RESET, 0);
 237         gpio_set_value(BABBAGE_FEC_PHY_RESET, 0);
 238         msleep(1);
 239         gpio_set_value(BABBAGE_FEC_PHY_RESET, 1);
 240 }
 241
 242 /* This function is board specific as the bit mask for the plldiv will also
 243 be different for other Freescale SoCs, thus a common bitmask is not
 244 possible and cannot get place in /plat-mxc/ehci.c.*/
 245 static int initialize_otg_port(struct platform_device *pdev)
 246 {
 247         u32 v;
 248         void __iomem *usb_base;
 249         void __iomem *usbother_base;
 250
 251         usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
 252         if (!usb_base)
 253                 return -ENOMEM;
 254         usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
 255
 256         /* Set the PHY clock to 19.2MHz */
 257         v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
 258         v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
 259         v |= MX51_USB_PLL_DIV_19_2_MHZ;
 260         __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
 261         iounmap(usb_base);
 262
 263         mdelay(10);
 264
 265         return mx51_initialize_usb_hw(0, MXC_EHCI_INTERNAL_PHY);
 266 }
 267
 268 static int initialize_usbh1_port(struct platform_device *pdev)
 269 {
 270         u32 v;
 271         void __iomem *usb_base;
 272         void __iomem *usbother_base;
 273
 274         usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
 275         if (!usb_base)
 276                 return -ENOMEM;
 277         usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
 278
 279         /* The clock for the USBH1 ULPI port will come externally from the PHY. */
 280         v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
 281         __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
 282         iounmap(usb_base);
 283
 284         mdelay(10);
 285
 286         return mx51_initialize_usb_hw(1, MXC_EHCI_POWER_PINS_ENABLED |
 287                         MXC_EHCI_ITC_NO_THRESHOLD);
 288 }
 289
 290 static struct mxc_usbh_platform_data dr_utmi_config = {
 291         .init           = initialize_otg_port,
 292         .portsc = MXC_EHCI_UTMI_16BIT,
 293 };
 294
 295 static struct fsl_usb2_platform_data usb_pdata = {
 296         .operating_mode = FSL_USB2_DR_DEVICE,
 297         .phy_mode       = FSL_USB2_PHY_UTMI_WIDE,
 298 };
 299
 300 static struct mxc_usbh_platform_data usbh1_config = {
 301         .init           = initialize_usbh1_port,
 302         .portsc = MXC_EHCI_MODE_ULPI,
 303 };
 304
 305 static int otg_mode_host;
 306
 307 static int __init babbage_otg_mode(char *options)
 308 {
 309         if (!strcmp(options, "host"))
 310                 otg_mode_host = 1;
 311         else if (!strcmp(options, "device"))
 312                 otg_mode_host = 0;
 313         else
 314                 pr_info("otg_mode neither \"host\" nor \"device\". "
 315                         "Defaulting to device\n");
 316         return 0;
 317 }
 318 __setup("otg_mode=", babbage_otg_mode);
 319
 320 static struct spi_board_info mx51_babbage_spi_board_info[] __initdata = {
 321         {
 322                 .modalias = "mtd_dataflash",
 323                 .max_speed_hz = 25000000,
 324                 .bus_num = 0,
 325                 .chip_select = 1,
 326                 .mode = SPI_MODE_0,
 327                 .platform_data = NULL,
 328         },
 329 };
 330
 331 static int mx51_babbage_spi_cs[] = {
 332         BABBAGE_ECSPI1_CS0,
 333         BABBAGE_ECSPI1_CS1,
 334 };
 335
 336 static const struct spi_imx_master mx51_babbage_spi_pdata __initconst = {
 337         .chipselect     = mx51_babbage_spi_cs,
 338         .num_chipselect = ARRAY_SIZE(mx51_babbage_spi_cs),
 339 };
 340
 341 /*
 342  * Board specific initialization.
 343  */
 344 static void __init mx51_babbage_init(void)
 345 {
 346         iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
 347         iomux_v3_cfg_t power_key = _MX51_PAD_EIM_A27__GPIO2_21 |
 348                 MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP);
 349
 350 #if defined(CONFIG_CPU_FREQ_IMX)
 351         get_cpu_op = mx51_get_cpu_op;
 352 #endif
 353         mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
 354                                         ARRAY_SIZE(mx51babbage_pads));
 355
 356         imx51_add_imx_uart(0, &uart_pdata);
 357         imx51_add_imx_uart(1, &uart_pdata);
 358         imx51_add_imx_uart(2, &uart_pdata);
 359
 360         babbage_fec_reset();
 361         imx51_add_fec(NULL);
 362
 363         /* Set the PAD settings for the pwr key. */
 364         mxc_iomux_v3_setup_pad(power_key);
 365         imx51_add_gpio_keys(&imx_button_data);
 366
 367         imx51_add_imx_i2c(0, &babbage_i2c_data);
 368         imx51_add_imx_i2c(1, &babbage_i2c_data);
 369         mxc_register_device(&mxc_hsi2c_device, &babbage_hsi2c_data);
 370
 371         if (otg_mode_host)
 372                 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
 373         else {
 374                 initialize_otg_port(NULL);
 375                 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
 376         }
 377
 378         gpio_usbh1_active();
 379         mxc_register_device(&mxc_usbh1_device, &usbh1_config);
 380         /* setback USBH1_STP to be function */
 381         mxc_iomux_v3_setup_pad(usbh1stp);
 382         babbage_usbhub_reset();
 383
 384         imx51_add_sdhci_esdhc_imx(0, NULL);
 385         imx51_add_sdhci_esdhc_imx(1, NULL);
 386
 387         spi_register_board_info(mx51_babbage_spi_board_info,
 388                 ARRAY_SIZE(mx51_babbage_spi_board_info));
 389         imx51_add_ecspi(0, &mx51_babbage_spi_pdata);
 390         imx51_add_imx2_wdt(0, NULL);
 391 }
 392
 393 static void __init mx51_babbage_timer_init(void)
 394 {
 395         mx51_clocks_init(32768, 24000000, 22579200, 0);
 396 }
 397
 398 static struct sys_timer mx51_babbage_timer = {
 399         .init = mx51_babbage_timer_init,
 400 };
 401
 402 MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
 403         /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
 404         .boot_params = MX51_PHYS_OFFSET + 0x100,
 405         .map_io = mx51_map_io,
 406         .init_early = imx51_init_early,
 407         .init_irq = mx51_init_irq,
 408         .timer = &mx51_babbage_timer,
 409         .init_machine = mx51_babbage_init,
 410 MACHINE_END