sound/soc/tegra/tegra_asoc_utils.c

   1 /*
   2  * tegra_asoc_utils.c - Harmony machine ASoC driver
   3  *
   4  * Author: Stephen Warren <swarren@nvidia.com>
   5  * Copyright (C) 2010 - NVIDIA, Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19  * 02110-1301 USA
  20  *
  21  */
  22
  23 #include <linux/clk.h>
  24 #include <linux/device.h>
  25 #include <linux/err.h>
  26 #include <linux/kernel.h>
  27
  28 #include "tegra_asoc_utils.h"
  29
  30 int tegra_asoc_utils_set_rate(struct tegra_asoc_utils_data *data, int srate,
  31                               int mclk, int *mclk_change)
  32 {
  33         int new_baseclock;
  34         int err;
  35
  36         switch (srate) {
  37         case 11025:
  38         case 22050:
  39         case 44100:
  40         case 88200:
  41                 new_baseclock = 56448000;
  42                 break;
  43         case 8000:
  44         case 16000:
  45         case 32000:
  46         case 48000:
  47         case 64000:
  48         case 96000:
  49                 new_baseclock = 73728000;
  50                 break;
  51         default:
  52                 return -EINVAL;
  53         }
  54
  55         *mclk_change = ((new_baseclock != data->set_baseclock) ||
  56                         (mclk != data->set_mclk));
  57         if (!*mclk_change)
  58             return 0;
  59
  60         data->set_baseclock = 0;
  61         data->set_mclk = 0;
  62
  63         clk_disable(data->clk_cdev1);
  64         clk_disable(data->clk_pll_a_out0);
  65         clk_disable(data->clk_pll_a);
  66
  67         err = clk_set_rate(data->clk_pll_a, new_baseclock);
  68         if (err) {
  69                 dev_err(data->dev, "Can't set pll_a rate: %d\n", err);
  70                 return err;
  71         }
  72
  73         err = clk_set_rate(data->clk_pll_a_out0, mclk);
  74         if (err) {
  75                 dev_err(data->dev, "Can't set pll_a_out0 rate: %d\n", err);
  76                 return err;
  77         }
  78
  79         /* Don't set cdev1 rate; its locked to pll_a_out0 */
  80
  81         err = clk_enable(data->clk_pll_a);
  82         if (err) {
  83                 dev_err(data->dev, "Can't enable pll_a: %d\n", err);
  84                 return err;
  85         }
  86
  87         err = clk_enable(data->clk_pll_a_out0);
  88         if (err) {
  89                 dev_err(data->dev, "Can't enable pll_a_out0: %d\n", err);
  90                 return err;
  91         }
  92
  93         err = clk_enable(data->clk_cdev1);
  94         if (err) {
  95                 dev_err(data->dev, "Can't enable cdev1: %d\n", err);
  96                 return err;
  97         }
  98
  99         data->set_baseclock = new_baseclock;
 100         data->set_mclk = mclk;
 101
 102         return 0;
 103 }
 104 EXPORT_SYMBOL_GPL(tegra_asoc_utils_set_rate);
 105
 106 int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
 107                           struct device *dev)
 108 {
 109         int ret;
 110
 111         data->dev = dev;
 112
 113         data->clk_pll_a = clk_get_sys(NULL, "pll_a");
 114         if (IS_ERR(data->clk_pll_a)) {
 115                 dev_err(data->dev, "Can't retrieve clk pll_a\n");
 116                 ret = PTR_ERR(data->clk_pll_a);
 117                 goto err;
 118         }
 119
 120         data->clk_pll_a_out0 = clk_get_sys(NULL, "pll_a_out0");
 121         if (IS_ERR(data->clk_pll_a_out0)) {
 122                 dev_err(data->dev, "Can't retrieve clk pll_a_out0\n");
 123                 ret = PTR_ERR(data->clk_pll_a_out0);
 124                 goto err_put_pll_a;
 125         }
 126
 127         data->clk_cdev1 = clk_get_sys(NULL, "cdev1");
 128         if (IS_ERR(data->clk_cdev1)) {
 129                 dev_err(data->dev, "Can't retrieve clk cdev1\n");
 130                 ret = PTR_ERR(data->clk_cdev1);
 131                 goto err_put_pll_a_out0;
 132         }
 133
 134         return 0;
 135
 136 err_put_pll_a_out0:
 137         clk_put(data->clk_pll_a_out0);
 138 err_put_pll_a:
 139         clk_put(data->clk_pll_a);
 140 err:
 141         return ret;
 142 }
 143 EXPORT_SYMBOL_GPL(tegra_asoc_utils_init);
 144
 145 void tegra_asoc_utils_fini(struct tegra_asoc_utils_data *data)
 146 {
 147         clk_put(data->clk_cdev1);
 148         clk_put(data->clk_pll_a_out0);
 149         clk_put(data->clk_pll_a);
 150 }
 151 EXPORT_SYMBOL_GPL(tegra_asoc_utils_fini);
 152
 153 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
 154 MODULE_DESCRIPTION("Tegra ASoC utility code");
 155 MODULE_LICENSE("GPL");