2 * Copyright (C) 2009 Francisco Jerez.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 #include "ch7006_priv.h"
29 char *ch7006_tv_norm_names
[] = {
30 [TV_NORM_PAL
] = "PAL",
31 [TV_NORM_PAL_M
] = "PAL-M",
32 [TV_NORM_PAL_N
] = "PAL-N",
33 [TV_NORM_PAL_NC
] = "PAL-Nc",
34 [TV_NORM_PAL_60
] = "PAL-60",
35 [TV_NORM_NTSC_M
] = "NTSC-M",
36 [TV_NORM_NTSC_J
] = "NTSC-J",
39 #define NTSC_LIKE_TIMINGS .vrefresh = 60 * fixed1/1.001, \
44 #define PAL_LIKE_TIMINGS .vrefresh = 50 * fixed1, \
49 struct ch7006_tv_norm_info ch7006_tv_norms
[] = {
52 .black_level
= 0.339 * fixed1
,
53 .subc_freq
= 3579545 * fixed1
,
54 .dispmode
= bitfs(CH7006_DISPMODE_OUTPUT_STD
, NTSC
),
59 .black_level
= 0.286 * fixed1
,
60 .subc_freq
= 3579545 * fixed1
,
61 .dispmode
= bitfs(CH7006_DISPMODE_OUTPUT_STD
, NTSC_J
),
66 .black_level
= 0.3 * fixed1
,
67 .subc_freq
= 4433618.75 * fixed1
,
68 .dispmode
= bitfs(CH7006_DISPMODE_OUTPUT_STD
, PAL
),
73 .black_level
= 0.339 * fixed1
,
74 .subc_freq
= 3575611.433 * fixed1
,
75 .dispmode
= bitfs(CH7006_DISPMODE_OUTPUT_STD
, PAL_M
),
79 /* The following modes seem to work right but they're
84 .black_level
= 0.339 * fixed1
,
85 .subc_freq
= 4433618.75 * fixed1
,
86 .dispmode
= bitfs(CH7006_DISPMODE_OUTPUT_STD
, PAL
),
91 .black_level
= 0.3 * fixed1
,
92 .subc_freq
= 3582056.25 * fixed1
,
93 .dispmode
= bitfs(CH7006_DISPMODE_OUTPUT_STD
, PAL
),
98 .black_level
= 0.3 * fixed1
,
99 .subc_freq
= 4433618.75 * fixed1
,
100 .dispmode
= bitfs(CH7006_DISPMODE_OUTPUT_STD
, PAL_M
),
105 #define __MODE(f, hd, vd, ht, vt, hsynp, vsynp, \
106 subc, scale, scale_mask, norm_mask, e_hd, e_vd) { \
108 .name = #hd "x" #vd, \
110 .type = DRM_MODE_TYPE_DRIVER, \
113 .hsync_start = e_hd + 16, \
114 .hsync_end = e_hd + 80, \
118 .vsync_start = vd + 10, \
119 .vsync_end = vd + 26, \
122 .flags = DRM_MODE_FLAG_##hsynp##HSYNC | \
123 DRM_MODE_FLAG_##vsynp##VSYNC, \
128 .subc_coeff = subc * fixed1, \
129 .dispmode = bitfs(CH7006_DISPMODE_SCALING_RATIO, scale) | \
130 bitfs(CH7006_DISPMODE_INPUT_RES, e_hd##x##e_vd), \
131 .valid_scales = scale_mask, \
132 .valid_norms = norm_mask \
135 #define MODE(f, hd, vd, ht, vt, hsynp, vsynp, \
136 subc, scale, scale_mask, norm_mask) \
137 __MODE(f, hd, vd, ht, vt, hsynp, vsynp, subc, scale, \
138 scale_mask, norm_mask, hd, vd)
140 #define NTSC_LIKE (1 << TV_NORM_NTSC_M | 1 << TV_NORM_NTSC_J | \
141 1 << TV_NORM_PAL_M | 1 << TV_NORM_PAL_60)
143 #define PAL_LIKE (1 << TV_NORM_PAL | 1 << TV_NORM_PAL_N | 1 << TV_NORM_PAL_NC)
145 struct ch7006_mode ch7006_modes
[] = {
146 MODE(21000, 512, 384, 840, 500, N
, N
, 181.797557582, 5_4
, 0x6, PAL_LIKE
),
147 MODE(26250, 512, 384, 840, 625, N
, N
, 145.438046066, 1_1
, 0x1, PAL_LIKE
),
148 MODE(20140, 512, 384, 800, 420, N
, N
, 213.257083791, 5_4
, 0x4, NTSC_LIKE
),
149 MODE(24671, 512, 384, 784, 525, N
, N
, 174.0874153, 1_1
, 0x3, NTSC_LIKE
),
150 MODE(28125, 720, 400, 1125, 500, N
, N
, 135.742176298, 5_4
, 0x6, PAL_LIKE
),
151 MODE(34875, 720, 400, 1116, 625, N
, N
, 109.469496898, 1_1
, 0x1, PAL_LIKE
),
152 MODE(23790, 720, 400, 945, 420, N
, N
, 160.475642016, 5_4
, 0x4, NTSC_LIKE
),
153 MODE(29455, 720, 400, 936, 525, N
, N
, 129.614941843, 1_1
, 0x3, NTSC_LIKE
),
154 MODE(25000, 640, 400, 1000, 500, N
, N
, 152.709948279, 5_4
, 0x6, PAL_LIKE
),
155 MODE(31500, 640, 400, 1008, 625, N
, N
, 121.198371646, 1_1
, 0x1, PAL_LIKE
),
156 MODE(21147, 640, 400, 840, 420, N
, N
, 180.535097338, 5_4
, 0x4, NTSC_LIKE
),
157 MODE(26434, 640, 400, 840, 525, N
, N
, 144.42807787, 1_1
, 0x2, NTSC_LIKE
),
158 MODE(30210, 640, 400, 840, 600, N
, N
, 126.374568276, 7_8
, 0x1, NTSC_LIKE
),
159 MODE(21000, 640, 480, 840, 500, N
, N
, 181.797557582, 5_4
, 0x4, PAL_LIKE
),
160 MODE(26250, 640, 480, 840, 625, N
, N
, 145.438046066, 1_1
, 0x2, PAL_LIKE
),
161 MODE(31500, 640, 480, 840, 750, N
, N
, 121.198371646, 5_6
, 0x1, PAL_LIKE
),
162 MODE(24671, 640, 480, 784, 525, N
, N
, 174.0874153, 1_1
, 0x4, NTSC_LIKE
),
163 MODE(28196, 640, 480, 784, 600, N
, N
, 152.326488422, 7_8
, 0x2, NTSC_LIKE
),
164 MODE(30210, 640, 480, 800, 630, N
, N
, 142.171389101, 5_6
, 0x1, NTSC_LIKE
),
165 __MODE(29500, 720, 576, 944, 625, P
, P
, 145.592111636, 1_1
, 0x7, PAL_LIKE
, 800, 600),
166 MODE(36000, 800, 600, 960, 750, P
, P
, 119.304647022, 5_6
, 0x6, PAL_LIKE
),
167 MODE(39000, 800, 600, 936, 836, P
, P
, 110.127366499, 3_4
, 0x1, PAL_LIKE
),
168 MODE(39273, 800, 600, 1040, 630, P
, P
, 145.816809399, 5_6
, 0x4, NTSC_LIKE
),
169 MODE(43636, 800, 600, 1040, 700, P
, P
, 131.235128487, 3_4
, 0x2, NTSC_LIKE
),
170 MODE(47832, 800, 600, 1064, 750, P
, P
, 119.723275165, 7_10
, 0x1, NTSC_LIKE
),
174 struct ch7006_mode
*ch7006_lookup_mode(struct drm_encoder
*encoder
,
175 struct drm_display_mode
*drm_mode
)
177 struct ch7006_priv
*priv
= to_ch7006_priv(encoder
);
178 struct ch7006_mode
*mode
;
180 for (mode
= ch7006_modes
; mode
->mode
.clock
; mode
++) {
182 if (~mode
->valid_norms
& 1<<priv
->norm
)
185 if (mode
->mode
.hdisplay
!= drm_mode
->hdisplay
||
186 mode
->mode
.vdisplay
!= drm_mode
->vdisplay
||
187 mode
->mode
.vtotal
!= drm_mode
->vtotal
||
188 mode
->mode
.htotal
!= drm_mode
->htotal
||
189 mode
->mode
.clock
!= drm_mode
->clock
)
198 /* Some common HW state calculation code */
200 void ch7006_setup_levels(struct drm_encoder
*encoder
)
202 struct i2c_client
*client
= drm_i2c_encoder_get_client(encoder
);
203 struct ch7006_priv
*priv
= to_ch7006_priv(encoder
);
204 uint8_t *regs
= priv
->state
.regs
;
205 struct ch7006_tv_norm_info
*norm
= &ch7006_tv_norms
[priv
->norm
];
209 /* Set DAC_GAIN if the voltage drop between white and black is
211 if (norm
->black_level
< 339*fixed1
/1000) {
214 regs
[CH7006_INPUT_FORMAT
] |= CH7006_INPUT_FORMAT_DAC_GAIN
;
218 regs
[CH7006_INPUT_FORMAT
] &= ~CH7006_INPUT_FORMAT_DAC_GAIN
;
221 black_level
= round_fixed(norm
->black_level
*26625)/gain
;
223 /* Correct it with the specified brightness. */
224 black_level
= interpolate(90, black_level
, 208, priv
->brightness
);
226 regs
[CH7006_BLACK_LEVEL
] = bitf(CH7006_BLACK_LEVEL_0
, black_level
);
228 ch7006_dbg(client
, "black level: %d\n", black_level
);
231 void ch7006_setup_subcarrier(struct drm_encoder
*encoder
)
233 struct i2c_client
*client
= drm_i2c_encoder_get_client(encoder
);
234 struct ch7006_priv
*priv
= to_ch7006_priv(encoder
);
235 struct ch7006_state
*state
= &priv
->state
;
236 struct ch7006_tv_norm_info
*norm
= &ch7006_tv_norms
[priv
->norm
];
237 struct ch7006_mode
*mode
= priv
->mode
;
240 subc_inc
= round_fixed((mode
->subc_coeff
>> 8)
241 * (norm
->subc_freq
>> 24));
243 setbitf(state
, CH7006_SUBC_INC0
, 28, subc_inc
);
244 setbitf(state
, CH7006_SUBC_INC1
, 24, subc_inc
);
245 setbitf(state
, CH7006_SUBC_INC2
, 20, subc_inc
);
246 setbitf(state
, CH7006_SUBC_INC3
, 16, subc_inc
);
247 setbitf(state
, CH7006_SUBC_INC4
, 12, subc_inc
);
248 setbitf(state
, CH7006_SUBC_INC5
, 8, subc_inc
);
249 setbitf(state
, CH7006_SUBC_INC6
, 4, subc_inc
);
250 setbitf(state
, CH7006_SUBC_INC7
, 0, subc_inc
);
252 ch7006_dbg(client
, "subcarrier inc: %u\n", subc_inc
);
255 void ch7006_setup_pll(struct drm_encoder
*encoder
)
257 struct i2c_client
*client
= drm_i2c_encoder_get_client(encoder
);
258 struct ch7006_priv
*priv
= to_ch7006_priv(encoder
);
259 uint8_t *regs
= priv
->state
.regs
;
260 struct ch7006_mode
*mode
= priv
->mode
;
263 int freq
, best_freq
= 0;
265 for (n
= 0; n
< CH7006_MAXN
; n
++) {
266 for (m
= 0; m
< CH7006_MAXM
; m
++) {
267 freq
= CH7006_FREQ0
*(n
+2)/(m
+2);
269 if (abs(freq
- mode
->mode
.clock
) <
270 abs(best_freq
- mode
->mode
.clock
)) {
278 regs
[CH7006_PLLOV
] = bitf(CH7006_PLLOV_N_8
, best_n
) |
279 bitf(CH7006_PLLOV_M_8
, best_m
);
281 regs
[CH7006_PLLM
] = bitf(CH7006_PLLM_0
, best_m
);
282 regs
[CH7006_PLLN
] = bitf(CH7006_PLLN_0
, best_n
);
285 regs
[CH7006_PLL_CONTROL
] |= CH7006_PLL_CONTROL_CAPACITOR
;
287 regs
[CH7006_PLL_CONTROL
] &= ~CH7006_PLL_CONTROL_CAPACITOR
;
289 ch7006_dbg(client
, "n=%d m=%d f=%d c=%d\n",
290 best_n
, best_m
, best_freq
, best_n
< 108);
293 void ch7006_setup_power_state(struct drm_encoder
*encoder
)
295 struct ch7006_priv
*priv
= to_ch7006_priv(encoder
);
296 uint8_t *power
= &priv
->state
.regs
[CH7006_POWER
];
299 subconnector
= priv
->select_subconnector
? priv
->select_subconnector
:
302 *power
= CH7006_POWER_RESET
;
304 if (priv
->last_dpms
== DRM_MODE_DPMS_ON
) {
305 switch (subconnector
) {
306 case DRM_MODE_SUBCONNECTOR_SVIDEO
:
307 *power
|= bitfs(CH7006_POWER_LEVEL
, CVBS_OFF
);
309 case DRM_MODE_SUBCONNECTOR_Composite
:
310 *power
|= bitfs(CH7006_POWER_LEVEL
, SVIDEO_OFF
);
312 case DRM_MODE_SUBCONNECTOR_SCART
:
313 *power
|= bitfs(CH7006_POWER_LEVEL
, NORMAL
) |
319 *power
|= bitfs(CH7006_POWER_LEVEL
, FULL_POWER_OFF
);
323 void ch7006_setup_properties(struct drm_encoder
*encoder
)
325 struct i2c_client
*client
= drm_i2c_encoder_get_client(encoder
);
326 struct ch7006_priv
*priv
= to_ch7006_priv(encoder
);
327 struct ch7006_state
*state
= &priv
->state
;
328 struct ch7006_tv_norm_info
*norm
= &ch7006_tv_norms
[priv
->norm
];
329 struct ch7006_mode
*ch_mode
= priv
->mode
;
330 struct drm_display_mode
*mode
= &ch_mode
->mode
;
331 uint8_t *regs
= state
->regs
;
332 int flicker
, contrast
, hpos
, vpos
;
333 uint64_t scale
, aspect
;
335 flicker
= interpolate(0, 2, 3, priv
->flicker
);
336 regs
[CH7006_FFILTER
] = bitf(CH7006_FFILTER_TEXT
, flicker
) |
337 bitf(CH7006_FFILTER_LUMA
, flicker
) |
338 bitf(CH7006_FFILTER_CHROMA
, 1);
340 contrast
= interpolate(0, 5, 7, priv
->contrast
);
341 regs
[CH7006_CONTRAST
] = bitf(CH7006_CONTRAST_0
, contrast
);
343 scale
= norm
->vtotal
*fixed1
;
344 do_div(scale
, mode
->vtotal
);
346 aspect
= ch_mode
->enc_hdisp
*fixed1
;
347 do_div(aspect
, ch_mode
->enc_vdisp
);
349 hpos
= round_fixed((norm
->hvirtual
* aspect
- mode
->hdisplay
* scale
)
350 * priv
->hmargin
* mode
->vtotal
) / norm
->vtotal
/ 100 / 4;
352 setbitf(state
, CH7006_POV
, HPOS_8
, hpos
);
353 setbitf(state
, CH7006_HPOS
, 0, hpos
);
355 vpos
= max(0, norm
->vdisplay
- round_fixed(mode
->vdisplay
*scale
)
356 + norm
->voffset
) * priv
->vmargin
/ 100 / 2;
358 setbitf(state
, CH7006_POV
, VPOS_8
, vpos
);
359 setbitf(state
, CH7006_VPOS
, 0, vpos
);
361 ch7006_dbg(client
, "hpos: %d, vpos: %d\n", hpos
, vpos
);
364 /* HW access functions */
366 void ch7006_write(struct i2c_client
*client
, uint8_t addr
, uint8_t val
)
368 uint8_t buf
[] = {addr
, val
};
371 ret
= i2c_master_send(client
, buf
, ARRAY_SIZE(buf
));
373 ch7006_err(client
, "Error %d writing to subaddress 0x%x\n",
377 uint8_t ch7006_read(struct i2c_client
*client
, uint8_t addr
)
382 ret
= i2c_master_send(client
, &addr
, sizeof(addr
));
386 ret
= i2c_master_recv(client
, &val
, sizeof(val
));
393 ch7006_err(client
, "Error %d reading from subaddress 0x%x\n",
398 void ch7006_state_load(struct i2c_client
*client
,
399 struct ch7006_state
*state
)
401 ch7006_load_reg(client
, state
, CH7006_POWER
);
403 ch7006_load_reg(client
, state
, CH7006_DISPMODE
);
404 ch7006_load_reg(client
, state
, CH7006_FFILTER
);
405 ch7006_load_reg(client
, state
, CH7006_BWIDTH
);
406 ch7006_load_reg(client
, state
, CH7006_INPUT_FORMAT
);
407 ch7006_load_reg(client
, state
, CH7006_CLKMODE
);
408 ch7006_load_reg(client
, state
, CH7006_START_ACTIVE
);
409 ch7006_load_reg(client
, state
, CH7006_POV
);
410 ch7006_load_reg(client
, state
, CH7006_BLACK_LEVEL
);
411 ch7006_load_reg(client
, state
, CH7006_HPOS
);
412 ch7006_load_reg(client
, state
, CH7006_VPOS
);
413 ch7006_load_reg(client
, state
, CH7006_INPUT_SYNC
);
414 ch7006_load_reg(client
, state
, CH7006_DETECT
);
415 ch7006_load_reg(client
, state
, CH7006_CONTRAST
);
416 ch7006_load_reg(client
, state
, CH7006_PLLOV
);
417 ch7006_load_reg(client
, state
, CH7006_PLLM
);
418 ch7006_load_reg(client
, state
, CH7006_PLLN
);
419 ch7006_load_reg(client
, state
, CH7006_BCLKOUT
);
420 ch7006_load_reg(client
, state
, CH7006_SUBC_INC0
);
421 ch7006_load_reg(client
, state
, CH7006_SUBC_INC1
);
422 ch7006_load_reg(client
, state
, CH7006_SUBC_INC2
);
423 ch7006_load_reg(client
, state
, CH7006_SUBC_INC3
);
424 ch7006_load_reg(client
, state
, CH7006_SUBC_INC4
);
425 ch7006_load_reg(client
, state
, CH7006_SUBC_INC5
);
426 ch7006_load_reg(client
, state
, CH7006_SUBC_INC6
);
427 ch7006_load_reg(client
, state
, CH7006_SUBC_INC7
);
428 ch7006_load_reg(client
, state
, CH7006_PLL_CONTROL
);
429 ch7006_load_reg(client
, state
, CH7006_CALC_SUBC_INC0
);
432 void ch7006_state_save(struct i2c_client
*client
,
433 struct ch7006_state
*state
)
435 ch7006_save_reg(client
, state
, CH7006_POWER
);
437 ch7006_save_reg(client
, state
, CH7006_DISPMODE
);
438 ch7006_save_reg(client
, state
, CH7006_FFILTER
);
439 ch7006_save_reg(client
, state
, CH7006_BWIDTH
);
440 ch7006_save_reg(client
, state
, CH7006_INPUT_FORMAT
);
441 ch7006_save_reg(client
, state
, CH7006_CLKMODE
);
442 ch7006_save_reg(client
, state
, CH7006_START_ACTIVE
);
443 ch7006_save_reg(client
, state
, CH7006_POV
);
444 ch7006_save_reg(client
, state
, CH7006_BLACK_LEVEL
);
445 ch7006_save_reg(client
, state
, CH7006_HPOS
);
446 ch7006_save_reg(client
, state
, CH7006_VPOS
);
447 ch7006_save_reg(client
, state
, CH7006_INPUT_SYNC
);
448 ch7006_save_reg(client
, state
, CH7006_DETECT
);
449 ch7006_save_reg(client
, state
, CH7006_CONTRAST
);
450 ch7006_save_reg(client
, state
, CH7006_PLLOV
);
451 ch7006_save_reg(client
, state
, CH7006_PLLM
);
452 ch7006_save_reg(client
, state
, CH7006_PLLN
);
453 ch7006_save_reg(client
, state
, CH7006_BCLKOUT
);
454 ch7006_save_reg(client
, state
, CH7006_SUBC_INC0
);
455 ch7006_save_reg(client
, state
, CH7006_SUBC_INC1
);
456 ch7006_save_reg(client
, state
, CH7006_SUBC_INC2
);
457 ch7006_save_reg(client
, state
, CH7006_SUBC_INC3
);
458 ch7006_save_reg(client
, state
, CH7006_SUBC_INC4
);
459 ch7006_save_reg(client
, state
, CH7006_SUBC_INC5
);
460 ch7006_save_reg(client
, state
, CH7006_SUBC_INC6
);
461 ch7006_save_reg(client
, state
, CH7006_SUBC_INC7
);
462 ch7006_save_reg(client
, state
, CH7006_PLL_CONTROL
);
463 ch7006_save_reg(client
, state
, CH7006_CALC_SUBC_INC0
);
465 state
->regs
[CH7006_FFILTER
] = (state
->regs
[CH7006_FFILTER
] & 0xf0) |
466 (state
->regs
[CH7006_FFILTER
] & 0x0c) >> 2 |
467 (state
->regs
[CH7006_FFILTER
] & 0x03) << 2;