drivers/gpu/drm/radeon/radeon_fb.c

   1 /*
   2  * Copyright © 2007 David Airlie
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *     David Airlie
  25  */
  26     /*
  27      *  Modularization
  28      */
  29
  30 #include <linux/module.h>
  31 #include <linux/fb.h>
  32
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "drm_crtc.h"
  36 #include "drm_crtc_helper.h"
  37 #include "radeon_drm.h"
  38 #include "radeon.h"
  39
  40 #include "drm_fb_helper.h"
  41
  42 struct radeon_fb_device {
  43         struct drm_fb_helper helper;
  44         struct radeon_framebuffer       *rfb;
  45         struct radeon_device            *rdev;
  46 };
  47
  48 static struct fb_ops radeonfb_ops = {
  49         .owner = THIS_MODULE,
  50         .fb_check_var = drm_fb_helper_check_var,
  51         .fb_set_par = drm_fb_helper_set_par,
  52         .fb_setcolreg = drm_fb_helper_setcolreg,
  53         .fb_fillrect = cfb_fillrect,
  54         .fb_copyarea = cfb_copyarea,
  55         .fb_imageblit = cfb_imageblit,
  56         .fb_pan_display = drm_fb_helper_pan_display,
  57         .fb_blank = drm_fb_helper_blank,
  58         .fb_setcmap = drm_fb_helper_setcmap,
  59 };
  60
  61 /**
  62  * Currently it is assumed that the old framebuffer is reused.
  63  *
  64  * LOCKING
  65  * caller should hold the mode config lock.
  66  *
  67  */
  68 int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
  69 {
  70         struct fb_info *info;
  71         struct drm_framebuffer *fb;
  72         struct drm_display_mode *mode = crtc->desired_mode;
  73
  74         fb = crtc->fb;
  75         if (fb == NULL) {
  76                 return 1;
  77         }
  78         info = fb->fbdev;
  79         if (info == NULL) {
  80                 return 1;
  81         }
  82         if (mode == NULL) {
  83                 return 1;
  84         }
  85         info->var.xres = mode->hdisplay;
  86         info->var.right_margin = mode->hsync_start - mode->hdisplay;
  87         info->var.hsync_len = mode->hsync_end - mode->hsync_start;
  88         info->var.left_margin = mode->htotal - mode->hsync_end;
  89         info->var.yres = mode->vdisplay;
  90         info->var.lower_margin = mode->vsync_start - mode->vdisplay;
  91         info->var.vsync_len = mode->vsync_end - mode->vsync_start;
  92         info->var.upper_margin = mode->vtotal - mode->vsync_end;
  93         info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100;
  94         /* avoid overflow */
  95         info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh;
  96
  97         return 0;
  98 }
  99 EXPORT_SYMBOL(radeonfb_resize);
 100
 101 static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
 102 {
 103         int aligned = width;
 104         int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
 105         int pitch_mask = 0;
 106
 107         switch (bpp / 8) {
 108         case 1:
 109                 pitch_mask = align_large ? 255 : 127;
 110                 break;
 111         case 2:
 112                 pitch_mask = align_large ? 127 : 31;
 113                 break;
 114         case 3:
 115         case 4:
 116                 pitch_mask = align_large ? 63 : 15;
 117                 break;
 118         }
 119
 120         aligned += pitch_mask;
 121         aligned &= ~pitch_mask;
 122         return aligned;
 123 }
 124
 125 static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
 126         .gamma_set = radeon_crtc_fb_gamma_set,
 127         .gamma_get = radeon_crtc_fb_gamma_get,
 128 };
 129
 130 int radeonfb_create(struct drm_device *dev,
 131                     uint32_t fb_width, uint32_t fb_height,
 132                     uint32_t surface_width, uint32_t surface_height,
 133                     uint32_t surface_depth, uint32_t surface_bpp,
 134                     struct drm_framebuffer **fb_p)
 135 {
 136         struct radeon_device *rdev = dev->dev_private;
 137         struct fb_info *info;
 138         struct radeon_fb_device *rfbdev;
 139         struct drm_framebuffer *fb = NULL;
 140         struct radeon_framebuffer *rfb;
 141         struct drm_mode_fb_cmd mode_cmd;
 142         struct drm_gem_object *gobj = NULL;
 143         struct radeon_bo *rbo = NULL;
 144         struct device *device = &rdev->pdev->dev;
 145         int size, aligned_size, ret;
 146         u64 fb_gpuaddr;
 147         void *fbptr = NULL;
 148         unsigned long tmp;
 149         bool fb_tiled = false; /* useful for testing */
 150         u32 tiling_flags = 0;
 151         int crtc_count;
 152
 153         mode_cmd.width = surface_width;
 154         mode_cmd.height = surface_height;
 155
 156         /* avivo can't scanout real 24bpp */
 157         if ((surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
 158                 surface_bpp = 32;
 159
 160         mode_cmd.bpp = surface_bpp;
 161         /* need to align pitch with crtc limits */
 162         mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8);
 163         mode_cmd.depth = surface_depth;
 164
 165         size = mode_cmd.pitch * mode_cmd.height;
 166         aligned_size = ALIGN(size, PAGE_SIZE);
 167
 168         ret = radeon_gem_object_create(rdev, aligned_size, 0,
 169                         RADEON_GEM_DOMAIN_VRAM,
 170                         false, ttm_bo_type_kernel,
 171                         &gobj);
 172         if (ret) {
 173                 printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
 174                        surface_width, surface_height);
 175                 ret = -ENOMEM;
 176                 goto out;
 177         }
 178         rbo = gobj->driver_private;
 179
 180         if (fb_tiled)
 181                 tiling_flags = RADEON_TILING_MACRO;
 182
 183 #ifdef __BIG_ENDIAN
 184         switch (mode_cmd.bpp) {
 185         case 32:
 186                 tiling_flags |= RADEON_TILING_SWAP_32BIT;
 187                 break;
 188         case 16:
 189                 tiling_flags |= RADEON_TILING_SWAP_16BIT;
 190         default:
 191                 break;
 192         }
 193 #endif
 194
 195         if (tiling_flags) {
 196                 ret = radeon_bo_set_tiling_flags(rbo,
 197                                         tiling_flags | RADEON_TILING_SURFACE,
 198                                         mode_cmd.pitch);
 199                 if (ret)
 200                         dev_err(rdev->dev, "FB failed to set tiling flags\n");
 201         }
 202         mutex_lock(&rdev->ddev->struct_mutex);
 203         fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
 204         if (fb == NULL) {
 205                 DRM_ERROR("failed to allocate fb.\n");
 206                 ret = -ENOMEM;
 207                 goto out_unref;
 208         }
 209         ret = radeon_bo_reserve(rbo, false);
 210         if (unlikely(ret != 0))
 211                 goto out_unref;
 212         ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
 213         if (ret) {
 214                 radeon_bo_unreserve(rbo);
 215                 goto out_unref;
 216         }
 217         if (fb_tiled)
 218                 radeon_bo_check_tiling(rbo, 0, 0);
 219         ret = radeon_bo_kmap(rbo, &fbptr);
 220         radeon_bo_unreserve(rbo);
 221         if (ret) {
 222                 goto out_unref;
 223         }
 224
 225         list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
 226
 227         *fb_p = fb;
 228         rfb = to_radeon_framebuffer(fb);
 229         rdev->fbdev_rfb = rfb;
 230         rdev->fbdev_rbo = rbo;
 231
 232         info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
 233         if (info == NULL) {
 234                 ret = -ENOMEM;
 235                 goto out_unref;
 236         }
 237
 238         rdev->fbdev_info = info;
 239         rfbdev = info->par;
 240         rfbdev->helper.funcs = &radeon_fb_helper_funcs;
 241         rfbdev->helper.dev = dev;
 242         if (rdev->flags & RADEON_SINGLE_CRTC)
 243                 crtc_count = 1;
 244         else
 245                 crtc_count = 2;
 246         ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, crtc_count,
 247                                             RADEONFB_CONN_LIMIT);
 248         if (ret)
 249                 goto out_unref;
 250
 251         memset_io(fbptr, 0xff, aligned_size);
 252
 253         strcpy(info->fix.id, "radeondrmfb");
 254
 255         drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
 256
 257         info->flags = FBINFO_DEFAULT;
 258         info->fbops = &radeonfb_ops;
 259
 260         tmp = fb_gpuaddr - rdev->mc.vram_location;
 261         info->fix.smem_start = rdev->mc.aper_base + tmp;
 262         info->fix.smem_len = size;
 263         info->screen_base = fbptr;
 264         info->screen_size = size;
 265
 266         drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
 267
 268         /* setup aperture base/size for vesafb takeover */
 269         info->aperture_base = rdev->ddev->mode_config.fb_base;
 270         info->aperture_size = rdev->mc.real_vram_size;
 271
 272         info->fix.mmio_start = 0;
 273         info->fix.mmio_len = 0;
 274         info->pixmap.size = 64*1024;
 275         info->pixmap.buf_align = 8;
 276         info->pixmap.access_align = 32;
 277         info->pixmap.flags = FB_PIXMAP_SYSTEM;
 278         info->pixmap.scan_align = 1;
 279         if (info->screen_base == NULL) {
 280                 ret = -ENOSPC;
 281                 goto out_unref;
 282         }
 283         DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
 284         DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
 285         DRM_INFO("size %lu\n", (unsigned long)size);
 286         DRM_INFO("fb depth is %d\n", fb->depth);
 287         DRM_INFO("   pitch is %d\n", fb->pitch);
 288
 289         fb->fbdev = info;
 290         rfbdev->rfb = rfb;
 291         rfbdev->rdev = rdev;
 292
 293         mutex_unlock(&rdev->ddev->struct_mutex);
 294         return 0;
 295
 296 out_unref:
 297         if (rbo) {
 298                 ret = radeon_bo_reserve(rbo, false);
 299                 if (likely(ret == 0)) {
 300                         radeon_bo_kunmap(rbo);
 301                         radeon_bo_unreserve(rbo);
 302                 }
 303         }
 304         if (fb && ret) {
 305                 list_del(&fb->filp_head);
 306                 drm_gem_object_unreference(gobj);
 307                 drm_framebuffer_cleanup(fb);
 308                 kfree(fb);
 309         }
 310         drm_gem_object_unreference(gobj);
 311         mutex_unlock(&rdev->ddev->struct_mutex);
 312 out:
 313         return ret;
 314 }
 315
 316 static char *mode_option;
 317 int radeon_parse_options(char *options)
 318 {
 319         char *this_opt;
 320
 321         if (!options || !*options)
 322                 return 0;
 323
 324         while ((this_opt = strsep(&options, ",")) != NULL) {
 325                 if (!*this_opt)
 326                         continue;
 327                 mode_option = this_opt;
 328         }
 329         return 0;
 330 }
 331
 332 int radeonfb_probe(struct drm_device *dev)
 333 {
 334         struct radeon_device *rdev = dev->dev_private;
 335         int bpp_sel = 32;
 336
 337         /* select 8 bpp console on RN50 or 16MB cards */
 338         if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
 339                 bpp_sel = 8;
 340
 341         return drm_fb_helper_single_fb_probe(dev, bpp_sel, &radeonfb_create);
 342 }
 343
 344 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
 345 {
 346         struct fb_info *info;
 347         struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
 348         struct radeon_bo *rbo;
 349         int r;
 350
 351         if (!fb) {
 352                 return -EINVAL;
 353         }
 354         info = fb->fbdev;
 355         if (info) {
 356                 struct radeon_fb_device *rfbdev = info->par;
 357                 rbo = rfb->obj->driver_private;
 358                 unregister_framebuffer(info);
 359                 r = radeon_bo_reserve(rbo, false);
 360                 if (likely(r == 0)) {
 361                         radeon_bo_kunmap(rbo);
 362                         radeon_bo_unpin(rbo);
 363                         radeon_bo_unreserve(rbo);
 364                 }
 365                 drm_fb_helper_free(&rfbdev->helper);
 366                 framebuffer_release(info);
 367         }
 368
 369         printk(KERN_INFO "unregistered panic notifier\n");
 370
 371         return 0;
 372 }
 373 EXPORT_SYMBOL(radeonfb_remove);
 374 MODULE_LICENSE("GPL");