drivers/pcmcia/cardbus.c

   1 /*
   2  * cardbus.c -- 16-bit PCMCIA core support
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * The initial developer of the original code is David A. Hinds
   9  * <dahinds@users.sourceforge.net>.  Portions created by David A. Hinds
  10  * are Copyright (C) 1999 David A. Hinds.  All Rights Reserved.
  11  *
  12  * (C) 1999             David A. Hinds
  13  */
  14
  15 /*
  16  * Cardbus handling has been re-written to be more of a PCI bridge thing,
  17  * and the PCI code basically does all the resource handling.
  18  *
  19  *              Linus, Jan 2000
  20  */
  21
  22
  23 #include <linux/module.h>
  24 #include <linux/kernel.h>
  25 #include <linux/string.h>
  26 #include <linux/slab.h>
  27 #include <linux/mm.h>
  28 #include <linux/pci.h>
  29 #include <linux/ioport.h>
  30 #include <linux/io.h>
  31 #include <asm/irq.h>
  32
  33 #include <pcmcia/cs_types.h>
  34 #include <pcmcia/ss.h>
  35 #include <pcmcia/cs.h>
  36 #include <pcmcia/cistpl.h>
  37 #include "cs_internal.h"
  38
  39 /*====================================================================*/
  40
  41 /* Offsets in the Expansion ROM Image Header */
  42 #define ROM_SIGNATURE           0x0000  /* 2 bytes */
  43 #define ROM_DATA_PTR            0x0018  /* 2 bytes */
  44
  45 /* Offsets in the CardBus PC Card Data Structure */
  46 #define PCDATA_SIGNATURE        0x0000  /* 4 bytes */
  47 #define PCDATA_VPD_PTR          0x0008  /* 2 bytes */
  48 #define PCDATA_LENGTH           0x000a  /* 2 bytes */
  49 #define PCDATA_REVISION         0x000c
  50 #define PCDATA_IMAGE_SZ         0x0010  /* 2 bytes */
  51 #define PCDATA_ROM_LEVEL        0x0012  /* 2 bytes */
  52 #define PCDATA_CODE_TYPE        0x0014
  53 #define PCDATA_INDICATOR        0x0015
  54
  55 /*=====================================================================
  56
  57     Expansion ROM's have a special layout, and pointers specify an
  58     image number and an offset within that image.  xlate_rom_addr()
  59     converts an image/offset address to an absolute offset from the
  60     ROM's base address.
  61
  62 =====================================================================*/
  63
  64 static u_int xlate_rom_addr(void __iomem *b, u_int addr)
  65 {
  66         u_int img = 0, ofs = 0, sz;
  67         u_short data;
  68         while ((readb(b) == 0x55) && (readb(b + 1) == 0xaa)) {
  69                 if (img == (addr >> 28))
  70                         return (addr & 0x0fffffff) + ofs;
  71                 data = readb(b + ROM_DATA_PTR) + (readb(b + ROM_DATA_PTR + 1) << 8);
  72                 sz = 512 * (readb(b + data + PCDATA_IMAGE_SZ) +
  73                             (readb(b + data + PCDATA_IMAGE_SZ + 1) << 8));
  74                 if ((sz == 0) || (readb(b + data + PCDATA_INDICATOR) & 0x80))
  75                         break;
  76                 b += sz;
  77                 ofs += sz;
  78                 img++;
  79         }
  80         return 0;
  81 }
  82
  83 /*=====================================================================
  84
  85     These are similar to setup_cis_mem and release_cis_mem for 16-bit
  86     cards.  The "result" that is used externally is the cb_cis_virt
  87     pointer in the struct pcmcia_socket structure.
  88
  89 =====================================================================*/
  90
  91 static void cb_release_cis_mem(struct pcmcia_socket *s)
  92 {
  93         if (s->cb_cis_virt) {
  94                 dev_dbg(&s->dev, "cb_release_cis_mem()\n");
  95                 iounmap(s->cb_cis_virt);
  96                 s->cb_cis_virt = NULL;
  97                 s->cb_cis_res = NULL;
  98         }
  99 }
 100
 101 static int cb_setup_cis_mem(struct pcmcia_socket *s, struct resource *res)
 102 {
 103         unsigned int start, size;
 104
 105         if (res == s->cb_cis_res)
 106                 return 0;
 107
 108         if (s->cb_cis_res)
 109                 cb_release_cis_mem(s);
 110
 111         start = res->start;
 112         size = res->end - start + 1;
 113         s->cb_cis_virt = ioremap(start, size);
 114
 115         if (!s->cb_cis_virt)
 116                 return -1;
 117
 118         s->cb_cis_res = res;
 119
 120         return 0;
 121 }
 122
 123 /*=====================================================================
 124
 125     This is used by the CIS processing code to read CIS information
 126     from a CardBus device.
 127
 128 =====================================================================*/
 129
 130 int read_cb_mem(struct pcmcia_socket *s, int space, u_int addr, u_int len,
 131                 void *ptr)
 132 {
 133         struct pci_dev *dev;
 134         struct resource *res;
 135
 136         dev_dbg(&s->dev, "read_cb_mem(%d, %#x, %u)\n", space, addr, len);
 137
 138         dev = pci_get_slot(s->cb_dev->subordinate, 0);
 139         if (!dev)
 140                 goto fail;
 141
 142         /* Config space? */
 143         if (space == 0) {
 144                 if (addr + len > 0x100)
 145                         goto failput;
 146                 for (; len; addr++, ptr++, len--)
 147                         pci_read_config_byte(dev, addr, ptr);
 148                 return 0;
 149         }
 150
 151         res = dev->resource + space - 1;
 152
 153         pci_dev_put(dev);
 154
 155         if (!res->flags)
 156                 goto fail;
 157
 158         if (cb_setup_cis_mem(s, res) != 0)
 159                 goto fail;
 160
 161         if (space == 7) {
 162                 addr = xlate_rom_addr(s->cb_cis_virt, addr);
 163                 if (addr == 0)
 164                         goto fail;
 165         }
 166
 167         if (addr + len > res->end - res->start)
 168                 goto fail;
 169
 170         memcpy_fromio(ptr, s->cb_cis_virt + addr, len);
 171         return 0;
 172
 173 failput:
 174         pci_dev_put(dev);
 175 fail:
 176         memset(ptr, 0xff, len);
 177         return -1;
 178 }
 179
 180 /*=====================================================================
 181
 182     cb_alloc() and cb_free() allocate and free the kernel data
 183     structures for a Cardbus device, and handle the lowest level PCI
 184     device setup issues.
 185
 186 =====================================================================*/
 187
 188 static void cardbus_config_irq_and_cls(struct pci_bus *bus, int irq)
 189 {
 190         struct pci_dev *dev;
 191
 192         list_for_each_entry(dev, &bus->devices, bus_list) {
 193                 u8 irq_pin;
 194
 195                 /*
 196                  * Since there is only one interrupt available to
 197                  * CardBus devices, all devices downstream of this
 198                  * device must be using this IRQ.
 199                  */
 200                 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq_pin);
 201                 if (irq_pin) {
 202                         dev->irq = irq;
 203                         pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
 204                 }
 205
 206                 /*
 207                  * Some controllers transfer very slowly with 0 CLS.
 208                  * Configure it.  This may fail as CLS configuration
 209                  * is mandatory only for MWI.
 210                  */
 211                 pci_set_cacheline_size(dev);
 212
 213                 if (dev->subordinate)
 214                         cardbus_config_irq_and_cls(dev->subordinate, irq);
 215         }
 216 }
 217
 218 int __ref cb_alloc(struct pcmcia_socket *s)
 219 {
 220         struct pci_bus *bus = s->cb_dev->subordinate;
 221         struct pci_dev *dev;
 222         unsigned int max, pass;
 223
 224         s->functions = pci_scan_slot(bus, PCI_DEVFN(0, 0));
 225         pci_fixup_cardbus(bus);
 226
 227         max = bus->secondary;
 228         for (pass = 0; pass < 2; pass++)
 229                 list_for_each_entry(dev, &bus->devices, bus_list)
 230                         if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
 231                             dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
 232                                 max = pci_scan_bridge(bus, dev, max, pass);
 233
 234         /*
 235          * Size all resources below the CardBus controller.
 236          */
 237         pci_bus_size_bridges(bus);
 238         pci_bus_assign_resources(bus);
 239         cardbus_config_irq_and_cls(bus, s->pci_irq);
 240
 241         /* socket specific tune function */
 242         if (s->tune_bridge)
 243                 s->tune_bridge(s, bus);
 244
 245         pci_enable_bridges(bus);
 246         pci_bus_add_devices(bus);
 247
 248         s->irq.AssignedIRQ = s->pci_irq;
 249         return 0;
 250 }
 251
 252 void cb_free(struct pcmcia_socket *s)
 253 {
 254         struct pci_dev *bridge = s->cb_dev;
 255
 256         cb_release_cis_mem(s);
 257
 258         if (bridge)
 259                 pci_remove_behind_bridge(bridge);
 260 }