2 * Copyright (C) ST-Ericsson SA 2010
4 * License Terms: GNU General Public License, version 2
7 #ifndef __LINUX_MFD_TC35892_H
8 #define __LINUX_MFD_TC35892_H
10 #include <linux/device.h>
12 #define TC35892_RSTCTRL_IRQRST (1 << 4)
13 #define TC35892_RSTCTRL_TIMRST (1 << 3)
14 #define TC35892_RSTCTRL_ROTRST (1 << 2)
15 #define TC35892_RSTCTRL_KBDRST (1 << 1)
16 #define TC35892_RSTCTRL_GPIRST (1 << 0)
18 #define TC35892_IRQST 0x91
20 #define TC35892_MANFCODE_MAGIC 0x03
21 #define TC35892_MANFCODE 0x80
22 #define TC35892_VERSION 0x81
23 #define TC35892_IOCFG 0xA7
25 #define TC35892_CLKMODE 0x88
26 #define TC35892_CLKCFG 0x89
27 #define TC35892_CLKEN 0x8A
29 #define TC35892_RSTCTRL 0x82
30 #define TC35892_EXTRSTN 0x83
31 #define TC35892_RSTINTCLR 0x84
33 #define TC35892_GPIOIS0 0xC9
34 #define TC35892_GPIOIS1 0xCA
35 #define TC35892_GPIOIS2 0xCB
36 #define TC35892_GPIOIBE0 0xCC
37 #define TC35892_GPIOIBE1 0xCD
38 #define TC35892_GPIOIBE2 0xCE
39 #define TC35892_GPIOIEV0 0xCF
40 #define TC35892_GPIOIEV1 0xD0
41 #define TC35892_GPIOIEV2 0xD1
42 #define TC35892_GPIOIE0 0xD2
43 #define TC35892_GPIOIE1 0xD3
44 #define TC35892_GPIOIE2 0xD4
45 #define TC35892_GPIORIS0 0xD6
46 #define TC35892_GPIORIS1 0xD7
47 #define TC35892_GPIORIS2 0xD8
48 #define TC35892_GPIOMIS0 0xD9
49 #define TC35892_GPIOMIS1 0xDA
50 #define TC35892_GPIOMIS2 0xDB
51 #define TC35892_GPIOIC0 0xDC
52 #define TC35892_GPIOIC1 0xDD
53 #define TC35892_GPIOIC2 0xDE
55 #define TC35892_GPIODATA0 0xC0
56 #define TC35892_GPIOMASK0 0xc1
57 #define TC35892_GPIODATA1 0xC2
58 #define TC35892_GPIOMASK1 0xc3
59 #define TC35892_GPIODATA2 0xC4
60 #define TC35892_GPIOMASK2 0xC5
62 #define TC35892_GPIODIR0 0xC6
63 #define TC35892_GPIODIR1 0xC7
64 #define TC35892_GPIODIR2 0xC8
66 #define TC35892_GPIOSYNC0 0xE6
67 #define TC35892_GPIOSYNC1 0xE7
68 #define TC35892_GPIOSYNC2 0xE8
70 #define TC35892_GPIOWAKE0 0xE9
71 #define TC35892_GPIOWAKE1 0xEA
72 #define TC35892_GPIOWAKE2 0xEB
74 #define TC35892_GPIOODM0 0xE0
75 #define TC35892_GPIOODE0 0xE1
76 #define TC35892_GPIOODM1 0xE2
77 #define TC35892_GPIOODE1 0xE3
78 #define TC35892_GPIOODM2 0xE4
79 #define TC35892_GPIOODE2 0xE5
81 #define TC35892_INT_GPIIRQ 0
82 #define TC35892_INT_TI0IRQ 1
83 #define TC35892_INT_TI1IRQ 2
84 #define TC35892_INT_TI2IRQ 3
85 #define TC35892_INT_ROTIRQ 5
86 #define TC35892_INT_KBDIRQ 6
87 #define TC35892_INT_PORIRQ 7
89 #define TC35892_NR_INTERNAL_IRQS 8
90 #define TC35892_INT_GPIO(x) (TC35892_NR_INTERNAL_IRQS + (x))
95 struct i2c_client
*i2c
;
99 struct tc35892_platform_data
*pdata
;
102 extern int tc35892_reg_write(struct tc35892
*tc35892
, u8 reg
, u8 data
);
103 extern int tc35892_reg_read(struct tc35892
*tc35892
, u8 reg
);
104 extern int tc35892_block_read(struct tc35892
*tc35892
, u8 reg
, u8 length
,
106 extern int tc35892_block_write(struct tc35892
*tc35892
, u8 reg
, u8 length
,
108 extern int tc35892_set_bits(struct tc35892
*tc35892
, u8 reg
, u8 mask
, u8 val
);
111 * struct tc35892_gpio_platform_data - TC35892 GPIO platform data
112 * @gpio_base: first gpio number assigned to TC35892. A maximum of
113 * %TC35892_NR_GPIOS GPIOs will be allocated.
115 struct tc35892_gpio_platform_data
{
120 * struct tc35892_platform_data - TC35892 platform data
121 * @irq_base: base IRQ number. %TC35892_NR_IRQS irqs will be used.
122 * @gpio: GPIO-specific platform data
124 struct tc35892_platform_data
{
126 struct tc35892_gpio_platform_data
*gpio
;
129 #define TC35892_NR_GPIOS 24
130 #define TC35892_NR_IRQS TC35892_INT_GPIO(TC35892_NR_GPIOS)