1 * Synopsys DesignWare PCIe root complex in ECAM shift mode
3 In some cases, firmware may already have configured the Synopsys DesignWare
4 PCIe controller in RC mode with static ATU window mappings that cover all
5 config, MMIO and I/O spaces in a [mostly] ECAM compatible fashion.
6 In this case, there is no need for the OS to perform any low level setup
7 of clocks, PHYs or device registers, nor is there any reason for the driver
8 to reconfigure ATU windows for config and/or IO space accesses at runtime.
10 In cases where the IP was synthesized with a minimum ATU window size of
11 64 KB, it cannot be supported by the generic ECAM driver, because it
12 requires special config space accessors that filter accesses to device #1
13 and beyond on the first bus.
16 - compatible: "marvell,armada8k-pcie-ecam" or
17 "socionext,synquacer-pcie-ecam" or
18 "snps,dw-pcie-ecam" (must be preceded by a more specific match)
20 Please refer to the binding document of "pci-host-ecam-generic" in the
21 file host-generic-pci.txt for a description of the remaining required
22 and optional properties.
26 pcie1: pcie@7f000000 {
27 compatible = "socionext,synquacer-pcie-ecam", "snps,dw-pcie-ecam";
29 reg = <0x0 0x7f000000 0x0 0xf00000>;
30 bus-range = <0x0 0xe>;
33 ranges = <0x1000000 0x00 0x00010000 0x00 0x7ff00000 0x0 0x00010000>,
34 <0x2000000 0x00 0x70000000 0x00 0x70000000 0x0 0x0f000000>,
35 <0x3000000 0x3f 0x00000000 0x3f 0x00000000 0x1 0x00000000>;
37 #interrupt-cells = <0x1>;
38 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
39 interrupt-map = <0x0 0x0 0x0 0x0 &gic 0x0 0x0 0x0 182 0x4>;
40 msi-map = <0x0 &its 0x0 0x10000>;