Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[cris-mirror.git] / arch / arm / mach-pxa / pxa25x.c
blobba431fad5c47fd4456871083c5f81092da6814da
1 /*
2 * linux/arch/arm/mach-pxa/pxa25x.c
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
8 * Code specific to PXA21x/25x/26x variants.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
19 #include <linux/gpio.h>
20 #include <linux/gpio-pxa.h>
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/platform_device.h>
25 #include <linux/suspend.h>
26 #include <linux/syscore_ops.h>
27 #include <linux/irq.h>
28 #include <linux/irqchip.h>
30 #include <asm/mach/map.h>
31 #include <asm/suspend.h>
32 #include <mach/hardware.h>
33 #include <mach/irqs.h>
34 #include "pxa25x.h"
35 #include <mach/reset.h>
36 #include "pm.h"
37 #include <mach/dma.h>
38 #include <mach/smemc.h>
40 #include "generic.h"
41 #include "devices.h"
44 * Various clock factors driven by the CCCR register.
47 #ifdef CONFIG_PM
49 #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
50 #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
53 * List of global PXA peripheral registers to preserve.
54 * More ones like CP and general purpose register values are preserved
55 * with the stack pointer in sleep.S.
57 enum {
58 SLEEP_SAVE_PSTR,
59 SLEEP_SAVE_COUNT
63 static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
65 SAVE(PSTR);
68 static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
70 RESTORE(PSTR);
73 static void pxa25x_cpu_pm_enter(suspend_state_t state)
75 /* Clear reset status */
76 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
78 switch (state) {
79 case PM_SUSPEND_MEM:
80 cpu_suspend(PWRMODE_SLEEP, pxa25x_finish_suspend);
81 break;
85 static int pxa25x_cpu_pm_prepare(void)
87 /* set resume return address */
88 PSPR = __pa_symbol(cpu_resume);
89 return 0;
92 static void pxa25x_cpu_pm_finish(void)
94 /* ensure not to come back here if it wasn't intended */
95 PSPR = 0;
98 static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
99 .save_count = SLEEP_SAVE_COUNT,
100 .valid = suspend_valid_only_mem,
101 .save = pxa25x_cpu_pm_save,
102 .restore = pxa25x_cpu_pm_restore,
103 .enter = pxa25x_cpu_pm_enter,
104 .prepare = pxa25x_cpu_pm_prepare,
105 .finish = pxa25x_cpu_pm_finish,
108 static void __init pxa25x_init_pm(void)
110 pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
112 #else
113 static inline void pxa25x_init_pm(void) {}
114 #endif
116 /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
119 static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
121 int gpio = pxa_irq_to_gpio(d->irq);
122 uint32_t mask = 0;
124 if (gpio >= 0 && gpio < 85)
125 return gpio_set_wake(gpio, on);
127 if (d->irq == IRQ_RTCAlrm) {
128 mask = PWER_RTC;
129 goto set_pwer;
132 return -EINVAL;
134 set_pwer:
135 if (on)
136 PWER |= mask;
137 else
138 PWER &=~mask;
140 return 0;
143 void __init pxa25x_init_irq(void)
145 pxa_init_irq(32, pxa25x_set_wake);
148 #ifdef CONFIG_CPU_PXA26x
149 void __init pxa26x_init_irq(void)
151 pxa_init_irq(32, pxa25x_set_wake);
153 #endif
155 static int __init __init
156 pxa25x_dt_init_irq(struct device_node *node, struct device_node *parent)
158 pxa_dt_irq_init(pxa25x_set_wake);
159 set_handle_irq(icip_handle_irq);
161 return 0;
163 IRQCHIP_DECLARE(pxa25x_intc, "marvell,pxa-intc", pxa25x_dt_init_irq);
165 static struct map_desc pxa25x_io_desc[] __initdata = {
166 { /* Mem Ctl */
167 .virtual = (unsigned long)SMEMC_VIRT,
168 .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE),
169 .length = SMEMC_SIZE,
170 .type = MT_DEVICE
171 }, { /* UNCACHED_PHYS_0 */
172 .virtual = UNCACHED_PHYS_0,
173 .pfn = __phys_to_pfn(0x00000000),
174 .length = UNCACHED_PHYS_0_SIZE,
175 .type = MT_DEVICE
179 void __init pxa25x_map_io(void)
181 pxa_map_io();
182 iotable_init(ARRAY_AND_SIZE(pxa25x_io_desc));
183 pxa25x_get_clk_frequency_khz(1);
186 static struct pxa_gpio_platform_data pxa25x_gpio_info __initdata = {
187 .irq_base = PXA_GPIO_TO_IRQ(0),
188 .gpio_set_wake = gpio_set_wake,
191 static struct platform_device *pxa25x_devices[] __initdata = {
192 &pxa25x_device_udc,
193 &pxa_device_pmu,
194 &pxa_device_i2s,
195 &sa1100_device_rtc,
196 &pxa25x_device_ssp,
197 &pxa25x_device_nssp,
198 &pxa25x_device_assp,
199 &pxa25x_device_pwm0,
200 &pxa25x_device_pwm1,
201 &pxa_device_asoc_platform,
204 static int __init pxa25x_init(void)
206 int ret = 0;
208 if (cpu_is_pxa25x()) {
210 reset_status = RCSR;
212 pxa25x_init_pm();
214 register_syscore_ops(&pxa_irq_syscore_ops);
215 register_syscore_ops(&pxa2xx_mfp_syscore_ops);
217 if (!of_have_populated_dt()) {
218 pxa2xx_set_dmac_info(16, 40);
219 pxa_register_device(&pxa25x_device_gpio, &pxa25x_gpio_info);
220 ret = platform_add_devices(pxa25x_devices,
221 ARRAY_SIZE(pxa25x_devices));
225 return ret;
228 postcore_initcall(pxa25x_init);