1 # SPDX-License-Identifier: GPL-2.0
3 # For a description of the syntax of this configuration file,
4 # see Documentation/kbuild/kconfig-language.txt.
10 select OF_EARLY_FLATTREE
12 select HANDLE_DOMAIN_IRQ
15 select HAVE_ARCH_TRACEHOOK
17 select GENERIC_IRQ_CHIP
18 select GENERIC_IRQ_PROBE
19 select GENERIC_IRQ_SHOW
21 select GENERIC_CPU_DEVICES
23 select GENERIC_ATOMIC64
24 select GENERIC_CLOCKEVENTS
25 select GENERIC_CLOCKEVENTS_BROADCAST
26 select GENERIC_STRNCPY_FROM_USER
27 select GENERIC_STRNLEN_USER
28 select GENERIC_SMP_IDLE_THREAD
29 select MODULES_USE_ELF_RELA
30 select HAVE_DEBUG_STACKOVERFLOW
32 select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
34 select ARCH_USE_QUEUED_SPINLOCKS
35 select ARCH_USE_QUEUED_RWLOCKS
37 select ARCH_WANT_FRAME_POINTERS
45 config RWSEM_GENERIC_SPINLOCK
48 config RWSEM_XCHGADD_ALGORITHM
51 config GENERIC_HWEIGHT
57 config TRACE_IRQFLAGS_SUPPORT
60 # For now, use generic checksum functions
61 #These can be reimplemented in assembly later if so inclined
65 config STACKTRACE_SUPPORT
68 config LOCKDEP_SUPPORT
73 source "kernel/Kconfig.freezer"
75 menu "Processor type and features"
78 prompt "Subarchitecture"
84 Generic OpenRISC 1200 architecture
88 config DCACHE_WRITETHROUGH
89 bool "Have write through data caches"
92 Select this if your implementation features write through data caches.
93 Selecting 'N' here will allow the kernel to force flushing of data
94 caches at relevant times. Most OpenRISC implementations support write-
99 config OPENRISC_BUILTIN_DTB
103 menu "Class II Instructions"
105 config OPENRISC_HAVE_INST_FF1
106 bool "Have instruction l.ff1"
109 Select this if your implementation has the Class II instruction l.ff1
111 config OPENRISC_HAVE_INST_FL1
112 bool "Have instruction l.fl1"
115 Select this if your implementation has the Class II instruction l.fl1
117 config OPENRISC_HAVE_INST_MUL
118 bool "Have instruction l.mul for hardware multiply"
121 Select this if your implementation has a hardware multiply instruction
123 config OPENRISC_HAVE_INST_DIV
124 bool "Have instruction l.div for hardware divide"
127 Select this if your implementation has a hardware divide instruction
131 int "Maximum number of CPUs (2-32)"
137 bool "Symmetric Multi-Processing support"
139 This enables support for systems with more than one CPU. If you have
140 a system with only one CPU, say N. If you have a system with more
143 If you don't know what to do here, say N.
145 source kernel/Kconfig.hz
146 source kernel/Kconfig.preempt
149 config OPENRISC_NO_SPR_SR_DSX
150 bool "use SPR_SR_DSX software emulation" if OR1K_1200
153 SPR_SR_DSX bit is status register bit indicating whether
154 the last exception has happened in delay slot.
156 OpenRISC architecture makes it optional to have it implemented
157 in hardware and the OR1200 does not have it.
159 Say N here if you know that your OpenRISC processor has
160 SPR_SR_DSX bit implemented. Say Y if you are unsure.
162 config OPENRISC_HAVE_SHADOW_GPRS
163 bool "Support for shadow gpr files" if !SMP
166 Say Y here if your OpenRISC processor features shadowed
167 register files. They will in such case be used as a
168 scratch reg storage on exception entry.
170 On SMP systems, this feature is mandatory.
171 On a unicore system it's safe to say N here if you are unsure.
174 string "Default kernel command string"
177 On some architectures there is currently no way for the boot loader
178 to pass arguments to the kernel. For these architectures, you should
179 supply some command-line options at build time by entering them
182 menu "Debugging options"
184 config JUMP_UPON_UNHANDLED_EXCEPTION
185 bool "Try to die gracefully"
188 Now this puts kernel into infinite loop after first oops. Till
189 your kernel crashes this doesn't have any influence.
191 Say Y if you are unsure.
193 config OPENRISC_ESR_EXCEPTION_BUG_CHECK
194 bool "Check for possible ESR exception bug"
197 This option enables some checks that might expose some problems
200 Say N if you are unsure.
206 menu "Executable file formats"
208 source "fs/Kconfig.binfmt"
214 source "drivers/Kconfig"
218 source "security/Kconfig"
220 source "crypto/Kconfig"
224 menu "Kernel hacking"
226 source "lib/Kconfig.debug"