drivers/gpu/drm/i915/intel_dsi.h

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #ifndef _INTEL_DSI_H
  25 #define _INTEL_DSI_H
  26
  27 #include <drm/drmP.h>
  28 #include <drm/drm_crtc.h>
  29 #include <drm/drm_mipi_dsi.h>
  30 #include "intel_drv.h"
  31
  32 /* Dual Link support */
  33 #define DSI_DUAL_LINK_NONE              0
  34 #define DSI_DUAL_LINK_FRONT_BACK        1
  35 #define DSI_DUAL_LINK_PIXEL_ALT         2
  36
  37 struct intel_dsi_host;
  38
  39 struct intel_dsi {
  40         struct intel_encoder base;
  41
  42         struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
  43
  44         /* GPIO Desc for CRC based Panel control */
  45         struct gpio_desc *gpio_panel;
  46
  47         struct intel_connector *attached_connector;
  48
  49         /* bit mask of ports being driven */
  50         u16 ports;
  51
  52         /* if true, use HS mode, otherwise LP */
  53         bool hs;
  54
  55         /* virtual channel */
  56         int channel;
  57
  58         /* Video mode or command mode */
  59         u16 operation_mode;
  60
  61         /* number of DSI lanes */
  62         unsigned int lane_count;
  63
  64         /*
  65          * video mode pixel format
  66          *
  67          * XXX: consolidate on .format in struct mipi_dsi_device.
  68          */
  69         enum mipi_dsi_pixel_format pixel_format;
  70
  71         /* video mode format for MIPI_VIDEO_MODE_FORMAT register */
  72         u32 video_mode_format;
  73
  74         /* eot for MIPI_EOT_DISABLE register */
  75         u8 eotp_pkt;
  76         u8 clock_stop;
  77
  78         u8 escape_clk_div;
  79         u8 dual_link;
  80
  81         u16 dcs_backlight_ports;
  82         u16 dcs_cabc_ports;
  83
  84         u8 pixel_overlap;
  85         u32 port_bits;
  86         u32 bw_timer;
  87         u32 dphy_reg;
  88         u32 video_frmt_cfg_bits;
  89         u16 lp_byte_clk;
  90
  91         /* timeouts in byte clocks */
  92         u16 lp_rx_timeout;
  93         u16 turn_arnd_val;
  94         u16 rst_timer_val;
  95         u16 hs_to_lp_count;
  96         u16 clk_lp_to_hs_count;
  97         u16 clk_hs_to_lp_count;
  98
  99         u16 init_count;
 100         u32 pclk;
 101         u16 burst_mode_ratio;
 102
 103         /* all delays in ms */
 104         u16 backlight_off_delay;
 105         u16 backlight_on_delay;
 106         u16 panel_on_delay;
 107         u16 panel_off_delay;
 108         u16 panel_pwr_cycle_delay;
 109 };
 110
 111 struct intel_dsi_host {
 112         struct mipi_dsi_host base;
 113         struct intel_dsi *intel_dsi;
 114         enum port port;
 115
 116         /* our little hack */
 117         struct mipi_dsi_device *device;
 118 };
 119
 120 static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
 121 {
 122         return container_of(h, struct intel_dsi_host, base);
 123 }
 124
 125 #define for_each_dsi_port(__port, __ports_mask) for_each_port_masked(__port, __ports_mask)
 126
 127 static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 128 {
 129         return container_of(encoder, struct intel_dsi, base.base);
 130 }
 131
 132 /* intel_dsi.c */
 133 void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
 134 enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt);
 135
 136 /* intel_dsi_pll.c */
 137 bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
 138 int intel_compute_dsi_pll(struct intel_encoder *encoder,
 139                           struct intel_crtc_state *config);
 140 void intel_enable_dsi_pll(struct intel_encoder *encoder,
 141                           const struct intel_crtc_state *config);
 142 void intel_disable_dsi_pll(struct intel_encoder *encoder);
 143 u32 intel_dsi_get_pclk(struct intel_encoder *encoder, int pipe_bpp,
 144                        struct intel_crtc_state *config);
 145 void intel_dsi_reset_clocks(struct intel_encoder *encoder,
 146                             enum port port);
 147
 148 /* intel_dsi_vbt.c */
 149 bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id);
 150 int intel_dsi_vbt_get_modes(struct intel_dsi *intel_dsi);
 151 void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
 152                                  enum mipi_seq seq_id);
 153
 154 #endif /* _INTEL_DSI_H */