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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[cris-mirror.git] / drivers / gpu / drm / i915 / intel_panel.c
blobfa6831f8c004ef5f0fb1525bee456028404377ba
1 /*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33 #include <linux/kernel.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pwm.h>
36 #include "intel_drv.h"
37
38 #define CRC_PMIC_PWM_PERIOD_NS 21333
39
40 void
41 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
42 struct drm_display_mode *adjusted_mode)
43 {
44 drm_mode_copy(adjusted_mode, fixed_mode);
45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
47 }
48
49 /**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev_priv: i915 device instance
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58 struct drm_display_mode *
59 intel_find_panel_downclock(struct drm_i915_private *dev_priv,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62 {
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
98 else
99 return NULL;
100 }
101
102 /* adjusted_mode has been preset to be the panel's fixed mode */
103 void
104 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
105 struct intel_crtc_state *pipe_config,
106 int fitting_mode)
107 {
108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
110
111 /* Native modes don't need fitting */
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
114 !pipe_config->ycbcr420)
115 goto done;
116
117 switch (fitting_mode) {
118 case DRM_MODE_SCALE_CENTER:
119 width = pipe_config->pipe_src_w;
120 height = pipe_config->pipe_src_h;
121 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
122 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
123 break;
124
125 case DRM_MODE_SCALE_ASPECT:
126 /* Scale but preserve the aspect ratio */
127 {
128 u32 scaled_width = adjusted_mode->crtc_hdisplay
129 * pipe_config->pipe_src_h;
130 u32 scaled_height = pipe_config->pipe_src_w
131 * adjusted_mode->crtc_vdisplay;
132 if (scaled_width > scaled_height) { /* pillar */
133 width = scaled_height / pipe_config->pipe_src_h;
134 if (width & 1)
135 width++;
136 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
137 y = 0;
138 height = adjusted_mode->crtc_vdisplay;
139 } else if (scaled_width < scaled_height) { /* letter */
140 height = scaled_width / pipe_config->pipe_src_w;
141 if (height & 1)
142 height++;
143 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
144 x = 0;
145 width = adjusted_mode->crtc_hdisplay;
146 } else {
147 x = y = 0;
148 width = adjusted_mode->crtc_hdisplay;
149 height = adjusted_mode->crtc_vdisplay;
150 }
151 }
152 break;
153
154 case DRM_MODE_SCALE_FULLSCREEN:
155 x = y = 0;
156 width = adjusted_mode->crtc_hdisplay;
157 height = adjusted_mode->crtc_vdisplay;
158 break;
159
160 default:
161 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
162 return;
163 }
164
165 done:
166 pipe_config->pch_pfit.pos = (x << 16) | y;
167 pipe_config->pch_pfit.size = (width << 16) | height;
168 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
169 }
170
171 static void
172 centre_horizontally(struct drm_display_mode *adjusted_mode,
173 int width)
174 {
175 u32 border, sync_pos, blank_width, sync_width;
176
177 /* keep the hsync and hblank widths constant */
178 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
179 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
180 sync_pos = (blank_width - sync_width + 1) / 2;
181
182 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
183 border += border & 1; /* make the border even */
184
185 adjusted_mode->crtc_hdisplay = width;
186 adjusted_mode->crtc_hblank_start = width + border;
187 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
188
189 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
190 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
191 }
192
193 static void
194 centre_vertically(struct drm_display_mode *adjusted_mode,
195 int height)
196 {
197 u32 border, sync_pos, blank_width, sync_width;
198
199 /* keep the vsync and vblank widths constant */
200 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
201 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
202 sync_pos = (blank_width - sync_width + 1) / 2;
203
204 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
205
206 adjusted_mode->crtc_vdisplay = height;
207 adjusted_mode->crtc_vblank_start = height + border;
208 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
209
210 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
211 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
212 }
213
214 static inline u32 panel_fitter_scaling(u32 source, u32 target)
215 {
216 /*
217 * Floating point operation is not supported. So the FACTOR
218 * is defined, which can avoid the floating point computation
219 * when calculating the panel ratio.
220 */
221 #define ACCURACY 12
222 #define FACTOR (1 << ACCURACY)
223 u32 ratio = source * FACTOR / target;
224 return (FACTOR * ratio + FACTOR/2) / FACTOR;
225 }
226
227 static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
228 u32 *pfit_control)
229 {
230 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
231 u32 scaled_width = adjusted_mode->crtc_hdisplay *
232 pipe_config->pipe_src_h;
233 u32 scaled_height = pipe_config->pipe_src_w *
234 adjusted_mode->crtc_vdisplay;
235
236 /* 965+ is easy, it does everything in hw */
237 if (scaled_width > scaled_height)
238 *pfit_control |= PFIT_ENABLE |
239 PFIT_SCALING_PILLAR;
240 else if (scaled_width < scaled_height)
241 *pfit_control |= PFIT_ENABLE |
242 PFIT_SCALING_LETTER;
243 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
244 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
245 }
246
247 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
248 u32 *pfit_control, u32 *pfit_pgm_ratios,
249 u32 *border)
250 {
251 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
252 u32 scaled_width = adjusted_mode->crtc_hdisplay *
253 pipe_config->pipe_src_h;
254 u32 scaled_height = pipe_config->pipe_src_w *
255 adjusted_mode->crtc_vdisplay;
256 u32 bits;
257
258 /*
259 * For earlier chips we have to calculate the scaling
260 * ratio by hand and program it into the
261 * PFIT_PGM_RATIO register
262 */
263 if (scaled_width > scaled_height) { /* pillar */
264 centre_horizontally(adjusted_mode,
265 scaled_height /
266 pipe_config->pipe_src_h);
267
268 *border = LVDS_BORDER_ENABLE;
269 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
270 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
271 adjusted_mode->crtc_vdisplay);
272
273 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
274 bits << PFIT_VERT_SCALE_SHIFT);
275 *pfit_control |= (PFIT_ENABLE |
276 VERT_INTERP_BILINEAR |
277 HORIZ_INTERP_BILINEAR);
278 }
279 } else if (scaled_width < scaled_height) { /* letter */
280 centre_vertically(adjusted_mode,
281 scaled_width /
282 pipe_config->pipe_src_w);
283
284 *border = LVDS_BORDER_ENABLE;
285 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
286 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
287 adjusted_mode->crtc_hdisplay);
288
289 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
290 bits << PFIT_VERT_SCALE_SHIFT);
291 *pfit_control |= (PFIT_ENABLE |
292 VERT_INTERP_BILINEAR |
293 HORIZ_INTERP_BILINEAR);
294 }
295 } else {
296 /* Aspects match, Let hw scale both directions */
297 *pfit_control |= (PFIT_ENABLE |
298 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
299 VERT_INTERP_BILINEAR |
300 HORIZ_INTERP_BILINEAR);
301 }
302 }
303
304 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
305 struct intel_crtc_state *pipe_config,
306 int fitting_mode)
307 {
308 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
309 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
310 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
311
312 /* Native modes don't need fitting */
313 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
314 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
315 goto out;
316
317 switch (fitting_mode) {
318 case DRM_MODE_SCALE_CENTER:
319 /*
320 * For centered modes, we have to calculate border widths &
321 * heights and modify the values programmed into the CRTC.
322 */
323 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
324 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
325 border = LVDS_BORDER_ENABLE;
326 break;
327 case DRM_MODE_SCALE_ASPECT:
328 /* Scale but preserve the aspect ratio */
329 if (INTEL_GEN(dev_priv) >= 4)
330 i965_scale_aspect(pipe_config, &pfit_control);
331 else
332 i9xx_scale_aspect(pipe_config, &pfit_control,
333 &pfit_pgm_ratios, &border);
334 break;
335 case DRM_MODE_SCALE_FULLSCREEN:
336 /*
337 * Full scaling, even if it changes the aspect ratio.
338 * Fortunately this is all done for us in hw.
339 */
340 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
341 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
342 pfit_control |= PFIT_ENABLE;
343 if (INTEL_GEN(dev_priv) >= 4)
344 pfit_control |= PFIT_SCALING_AUTO;
345 else
346 pfit_control |= (VERT_AUTO_SCALE |
347 VERT_INTERP_BILINEAR |
348 HORIZ_AUTO_SCALE |
349 HORIZ_INTERP_BILINEAR);
350 }
351 break;
352 default:
353 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
354 return;
355 }
356
357 /* 965+ wants fuzzy fitting */
358 /* FIXME: handle multiple panels by failing gracefully */
359 if (INTEL_GEN(dev_priv) >= 4)
360 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
361 PFIT_FILTER_FUZZY);
362
363 out:
364 if ((pfit_control & PFIT_ENABLE) == 0) {
365 pfit_control = 0;
366 pfit_pgm_ratios = 0;
367 }
368
369 /* Make sure pre-965 set dither correctly for 18bpp panels. */
370 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
371 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
372
373 pipe_config->gmch_pfit.control = pfit_control;
374 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
375 pipe_config->gmch_pfit.lvds_border_bits = border;
376 }
377
378 enum drm_connector_status
379 intel_panel_detect(struct drm_i915_private *dev_priv)
380 {
381 /* Assume that the BIOS does not lie through the OpRegion... */
382 if (!i915_modparams.panel_ignore_lid && dev_priv->opregion.lid_state) {
383 return *dev_priv->opregion.lid_state & 0x1 ?
384 connector_status_connected :
385 connector_status_disconnected;
386 }
387
388 switch (i915_modparams.panel_ignore_lid) {
389 case -2:
390 return connector_status_connected;
391 case -1:
392 return connector_status_disconnected;
393 default:
394 return connector_status_unknown;
395 }
396 }
397
398 /**
399 * scale - scale values from one range to another
400 *
401 * @source_val: value in range [@source_min..@source_max]
402 *
403 * Return @source_val in range [@source_min..@source_max] scaled to range
404 * [@target_min..@target_max].
405 */
406 static uint32_t scale(uint32_t source_val,
407 uint32_t source_min, uint32_t source_max,
408 uint32_t target_min, uint32_t target_max)
409 {
410 uint64_t target_val;
411
412 WARN_ON(source_min > source_max);
413 WARN_ON(target_min > target_max);
414
415 /* defensive */
416 source_val = clamp(source_val, source_min, source_max);
417
418 /* avoid overflows */
419 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
420 (target_max - target_min), source_max - source_min);
421 target_val += target_min;
422
423 return target_val;
424 }
425
426 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
427 static inline u32 scale_user_to_hw(struct intel_connector *connector,
428 u32 user_level, u32 user_max)
429 {
430 struct intel_panel *panel = &connector->panel;
431
432 return scale(user_level, 0, user_max,
433 panel->backlight.min, panel->backlight.max);
434 }
435
436 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
437 * to [hw_min..hw_max]. */
438 static inline u32 clamp_user_to_hw(struct intel_connector *connector,
439 u32 user_level, u32 user_max)
440 {
441 struct intel_panel *panel = &connector->panel;
442 u32 hw_level;
443
444 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
445 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
446
447 return hw_level;
448 }
449
450 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
451 static inline u32 scale_hw_to_user(struct intel_connector *connector,
452 u32 hw_level, u32 user_max)
453 {
454 struct intel_panel *panel = &connector->panel;
455
456 return scale(hw_level, panel->backlight.min, panel->backlight.max,
457 0, user_max);
458 }
459
460 static u32 intel_panel_compute_brightness(struct intel_connector *connector,
461 u32 val)
462 {
463 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
464 struct intel_panel *panel = &connector->panel;
465
466 WARN_ON(panel->backlight.max == 0);
467
468 if (i915_modparams.invert_brightness < 0)
469 return val;
470
471 if (i915_modparams.invert_brightness > 0 ||
472 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
473 return panel->backlight.max - val + panel->backlight.min;
474 }
475
476 return val;
477 }
478
479 static u32 lpt_get_backlight(struct intel_connector *connector)
480 {
481 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
482
483 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
484 }
485
486 static u32 pch_get_backlight(struct intel_connector *connector)
487 {
488 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
489
490 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
491 }
492
493 static u32 i9xx_get_backlight(struct intel_connector *connector)
494 {
495 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
496 struct intel_panel *panel = &connector->panel;
497 u32 val;
498
499 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
500 if (INTEL_INFO(dev_priv)->gen < 4)
501 val >>= 1;
502
503 if (panel->backlight.combination_mode) {
504 u8 lbpc;
505
506 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
507 val *= lbpc;
508 }
509
510 return val;
511 }
512
513 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
514 {
515 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
516 return 0;
517
518 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
519 }
520
521 static u32 vlv_get_backlight(struct intel_connector *connector)
522 {
523 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
524 enum pipe pipe = intel_get_pipe_from_connector(connector);
525
526 return _vlv_get_backlight(dev_priv, pipe);
527 }
528
529 static u32 bxt_get_backlight(struct intel_connector *connector)
530 {
531 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
532 struct intel_panel *panel = &connector->panel;
533
534 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
535 }
536
537 static u32 pwm_get_backlight(struct intel_connector *connector)
538 {
539 struct intel_panel *panel = &connector->panel;
540 int duty_ns;
541
542 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
543 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
544 }
545
546 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
547 {
548 struct intel_connector *connector = to_intel_connector(conn_state->connector);
549 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
550
551 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
552 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
553 }
554
555 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
556 {
557 struct intel_connector *connector = to_intel_connector(conn_state->connector);
558 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
559 u32 tmp;
560
561 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
562 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
563 }
564
565 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
566 {
567 struct intel_connector *connector = to_intel_connector(conn_state->connector);
568 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
569 struct intel_panel *panel = &connector->panel;
570 u32 tmp, mask;
571
572 WARN_ON(panel->backlight.max == 0);
573
574 if (panel->backlight.combination_mode) {
575 u8 lbpc;
576
577 lbpc = level * 0xfe / panel->backlight.max + 1;
578 level /= lbpc;
579 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
580 }
581
582 if (IS_GEN4(dev_priv)) {
583 mask = BACKLIGHT_DUTY_CYCLE_MASK;
584 } else {
585 level <<= 1;
586 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
587 }
588
589 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
590 I915_WRITE(BLC_PWM_CTL, tmp | level);
591 }
592
593 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
594 {
595 struct intel_connector *connector = to_intel_connector(conn_state->connector);
596 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
597 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
598 u32 tmp;
599
600 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
601 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
602 }
603
604 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
605 {
606 struct intel_connector *connector = to_intel_connector(conn_state->connector);
607 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
608 struct intel_panel *panel = &connector->panel;
609
610 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
611 }
612
613 static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
614 {
615 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
616 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
617
618 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
619 }
620
621 static void
622 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
623 {
624 struct intel_connector *connector = to_intel_connector(conn_state->connector);
625 struct intel_panel *panel = &connector->panel;
626
627 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
628
629 level = intel_panel_compute_brightness(connector, level);
630 panel->backlight.set(conn_state, level);
631 }
632
633 /* set backlight brightness to level in range [0..max], assuming hw min is
634 * respected.
635 */
636 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
637 u32 user_level, u32 user_max)
638 {
639 struct intel_connector *connector = to_intel_connector(conn_state->connector);
640 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
641 struct intel_panel *panel = &connector->panel;
642 u32 hw_level;
643
644 /*
645 * Lack of crtc may occur during driver init because
646 * connection_mutex isn't held across the entire backlight
647 * setup + modeset readout, and the BIOS can issue the
648 * requests at any time.
649 */
650 if (!panel->backlight.present || !conn_state->crtc)
651 return;
652
653 mutex_lock(&dev_priv->backlight_lock);
654
655 WARN_ON(panel->backlight.max == 0);
656
657 hw_level = clamp_user_to_hw(connector, user_level, user_max);
658 panel->backlight.level = hw_level;
659
660 if (panel->backlight.device)
661 panel->backlight.device->props.brightness =
662 scale_hw_to_user(connector,
663 panel->backlight.level,
664 panel->backlight.device->props.max_brightness);
665
666 if (panel->backlight.enabled)
667 intel_panel_actually_set_backlight(conn_state, hw_level);
668
669 mutex_unlock(&dev_priv->backlight_lock);
670 }
671
672 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
673 {
674 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
675 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
676 u32 tmp;
677
678 intel_panel_actually_set_backlight(old_conn_state, 0);
679
680 /*
681 * Although we don't support or enable CPU PWM with LPT/SPT based
682 * systems, it may have been enabled prior to loading the
683 * driver. Disable to avoid warnings on LCPLL disable.
684 *
685 * This needs rework if we need to add support for CPU PWM on PCH split
686 * platforms.
687 */
688 tmp = I915_READ(BLC_PWM_CPU_CTL2);
689 if (tmp & BLM_PWM_ENABLE) {
690 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
691 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
692 }
693
694 tmp = I915_READ(BLC_PWM_PCH_CTL1);
695 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
696 }
697
698 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
699 {
700 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
701 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
702 u32 tmp;
703
704 intel_panel_actually_set_backlight(old_conn_state, 0);
705
706 tmp = I915_READ(BLC_PWM_CPU_CTL2);
707 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
708
709 tmp = I915_READ(BLC_PWM_PCH_CTL1);
710 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
711 }
712
713 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
714 {
715 intel_panel_actually_set_backlight(old_conn_state, 0);
716 }
717
718 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
719 {
720 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
721 u32 tmp;
722
723 intel_panel_actually_set_backlight(old_conn_state, 0);
724
725 tmp = I915_READ(BLC_PWM_CTL2);
726 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
727 }
728
729 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
730 {
731 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
732 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
733 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
734 u32 tmp;
735
736 intel_panel_actually_set_backlight(old_conn_state, 0);
737
738 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
739 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
740 }
741
742 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
743 {
744 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
745 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
746 struct intel_panel *panel = &connector->panel;
747 u32 tmp, val;
748
749 intel_panel_actually_set_backlight(old_conn_state, 0);
750
751 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
752 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
753 tmp & ~BXT_BLC_PWM_ENABLE);
754
755 if (panel->backlight.controller == 1) {
756 val = I915_READ(UTIL_PIN_CTL);
757 val &= ~UTIL_PIN_ENABLE;
758 I915_WRITE(UTIL_PIN_CTL, val);
759 }
760 }
761
762 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
763 {
764 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
765 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
766 struct intel_panel *panel = &connector->panel;
767 u32 tmp;
768
769 intel_panel_actually_set_backlight(old_conn_state, 0);
770
771 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
772 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
773 tmp & ~BXT_BLC_PWM_ENABLE);
774 }
775
776 static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
777 {
778 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
779 struct intel_panel *panel = &connector->panel;
780
781 /* Disable the backlight */
782 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
783 usleep_range(2000, 3000);
784 pwm_disable(panel->backlight.pwm);
785 }
786
787 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
788 {
789 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
790 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
791 struct intel_panel *panel = &connector->panel;
792
793 if (!panel->backlight.present)
794 return;
795
796 /*
797 * Do not disable backlight on the vga_switcheroo path. When switching
798 * away from i915, the other client may depend on i915 to handle the
799 * backlight. This will leave the backlight on unnecessarily when
800 * another client is not activated.
801 */
802 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
803 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
804 return;
805 }
806
807 mutex_lock(&dev_priv->backlight_lock);
808
809 if (panel->backlight.device)
810 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
811 panel->backlight.enabled = false;
812 panel->backlight.disable(old_conn_state);
813
814 mutex_unlock(&dev_priv->backlight_lock);
815 }
816
817 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
818 const struct drm_connector_state *conn_state)
819 {
820 struct intel_connector *connector = to_intel_connector(conn_state->connector);
821 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
822 struct intel_panel *panel = &connector->panel;
823 u32 pch_ctl1, pch_ctl2, schicken;
824
825 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
826 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
827 DRM_DEBUG_KMS("pch backlight already enabled\n");
828 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
829 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
830 }
831
832 if (HAS_PCH_LPT(dev_priv)) {
833 schicken = I915_READ(SOUTH_CHICKEN2);
834 if (panel->backlight.alternate_pwm_increment)
835 schicken |= LPT_PWM_GRANULARITY;
836 else
837 schicken &= ~LPT_PWM_GRANULARITY;
838 I915_WRITE(SOUTH_CHICKEN2, schicken);
839 } else {
840 schicken = I915_READ(SOUTH_CHICKEN1);
841 if (panel->backlight.alternate_pwm_increment)
842 schicken |= SPT_PWM_GRANULARITY;
843 else
844 schicken &= ~SPT_PWM_GRANULARITY;
845 I915_WRITE(SOUTH_CHICKEN1, schicken);
846 }
847
848 pch_ctl2 = panel->backlight.max << 16;
849 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
850
851 pch_ctl1 = 0;
852 if (panel->backlight.active_low_pwm)
853 pch_ctl1 |= BLM_PCH_POLARITY;
854
855 /* After LPT, override is the default. */
856 if (HAS_PCH_LPT(dev_priv))
857 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
858
859 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
860 POSTING_READ(BLC_PWM_PCH_CTL1);
861 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
862
863 /* This won't stick until the above enable. */
864 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
865 }
866
867 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
868 const struct drm_connector_state *conn_state)
869 {
870 struct intel_connector *connector = to_intel_connector(conn_state->connector);
871 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
872 struct intel_panel *panel = &connector->panel;
873 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
874 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
875
876 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
877 if (cpu_ctl2 & BLM_PWM_ENABLE) {
878 DRM_DEBUG_KMS("cpu backlight already enabled\n");
879 cpu_ctl2 &= ~BLM_PWM_ENABLE;
880 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
881 }
882
883 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
884 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
885 DRM_DEBUG_KMS("pch backlight already enabled\n");
886 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
887 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
888 }
889
890 if (cpu_transcoder == TRANSCODER_EDP)
891 cpu_ctl2 = BLM_TRANSCODER_EDP;
892 else
893 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
894 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
895 POSTING_READ(BLC_PWM_CPU_CTL2);
896 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
897
898 /* This won't stick until the above enable. */
899 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
900
901 pch_ctl2 = panel->backlight.max << 16;
902 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
903
904 pch_ctl1 = 0;
905 if (panel->backlight.active_low_pwm)
906 pch_ctl1 |= BLM_PCH_POLARITY;
907
908 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
909 POSTING_READ(BLC_PWM_PCH_CTL1);
910 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
911 }
912
913 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
914 const struct drm_connector_state *conn_state)
915 {
916 struct intel_connector *connector = to_intel_connector(conn_state->connector);
917 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
918 struct intel_panel *panel = &connector->panel;
919 u32 ctl, freq;
920
921 ctl = I915_READ(BLC_PWM_CTL);
922 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
923 DRM_DEBUG_KMS("backlight already enabled\n");
924 I915_WRITE(BLC_PWM_CTL, 0);
925 }
926
927 freq = panel->backlight.max;
928 if (panel->backlight.combination_mode)
929 freq /= 0xff;
930
931 ctl = freq << 17;
932 if (panel->backlight.combination_mode)
933 ctl |= BLM_LEGACY_MODE;
934 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
935 ctl |= BLM_POLARITY_PNV;
936
937 I915_WRITE(BLC_PWM_CTL, ctl);
938 POSTING_READ(BLC_PWM_CTL);
939
940 /* XXX: combine this into above write? */
941 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
942
943 /*
944 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
945 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
946 * that has backlight.
947 */
948 if (IS_GEN2(dev_priv))
949 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
950 }
951
952 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
953 const struct drm_connector_state *conn_state)
954 {
955 struct intel_connector *connector = to_intel_connector(conn_state->connector);
956 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
957 struct intel_panel *panel = &connector->panel;
958 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
959 u32 ctl, ctl2, freq;
960
961 ctl2 = I915_READ(BLC_PWM_CTL2);
962 if (ctl2 & BLM_PWM_ENABLE) {
963 DRM_DEBUG_KMS("backlight already enabled\n");
964 ctl2 &= ~BLM_PWM_ENABLE;
965 I915_WRITE(BLC_PWM_CTL2, ctl2);
966 }
967
968 freq = panel->backlight.max;
969 if (panel->backlight.combination_mode)
970 freq /= 0xff;
971
972 ctl = freq << 16;
973 I915_WRITE(BLC_PWM_CTL, ctl);
974
975 ctl2 = BLM_PIPE(pipe);
976 if (panel->backlight.combination_mode)
977 ctl2 |= BLM_COMBINATION_MODE;
978 if (panel->backlight.active_low_pwm)
979 ctl2 |= BLM_POLARITY_I965;
980 I915_WRITE(BLC_PWM_CTL2, ctl2);
981 POSTING_READ(BLC_PWM_CTL2);
982 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
983
984 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
985 }
986
987 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
988 const struct drm_connector_state *conn_state)
989 {
990 struct intel_connector *connector = to_intel_connector(conn_state->connector);
991 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
992 struct intel_panel *panel = &connector->panel;
993 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
994 u32 ctl, ctl2;
995
996 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
997 if (ctl2 & BLM_PWM_ENABLE) {
998 DRM_DEBUG_KMS("backlight already enabled\n");
999 ctl2 &= ~BLM_PWM_ENABLE;
1000 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1001 }
1002
1003 ctl = panel->backlight.max << 16;
1004 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1005
1006 /* XXX: combine this into above write? */
1007 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1008
1009 ctl2 = 0;
1010 if (panel->backlight.active_low_pwm)
1011 ctl2 |= BLM_POLARITY_I965;
1012 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1013 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1014 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1015 }
1016
1017 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
1018 const struct drm_connector_state *conn_state)
1019 {
1020 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1021 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1022 struct intel_panel *panel = &connector->panel;
1023 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1024 u32 pwm_ctl, val;
1025
1026 /* Controller 1 uses the utility pin. */
1027 if (panel->backlight.controller == 1) {
1028 val = I915_READ(UTIL_PIN_CTL);
1029 if (val & UTIL_PIN_ENABLE) {
1030 DRM_DEBUG_KMS("util pin already enabled\n");
1031 val &= ~UTIL_PIN_ENABLE;
1032 I915_WRITE(UTIL_PIN_CTL, val);
1033 }
1034
1035 val = 0;
1036 if (panel->backlight.util_pin_active_low)
1037 val |= UTIL_PIN_POLARITY;
1038 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1039 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1040 }
1041
1042 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1043 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1044 DRM_DEBUG_KMS("backlight already enabled\n");
1045 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1046 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1047 pwm_ctl);
1048 }
1049
1050 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1051 panel->backlight.max);
1052
1053 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1054
1055 pwm_ctl = 0;
1056 if (panel->backlight.active_low_pwm)
1057 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1058
1059 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1060 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1061 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1062 pwm_ctl | BXT_BLC_PWM_ENABLE);
1063 }
1064
1065 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
1066 const struct drm_connector_state *conn_state)
1067 {
1068 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1069 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1070 struct intel_panel *panel = &connector->panel;
1071 u32 pwm_ctl;
1072
1073 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1074 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1075 DRM_DEBUG_KMS("backlight already enabled\n");
1076 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1077 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1078 pwm_ctl);
1079 }
1080
1081 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1082 panel->backlight.max);
1083
1084 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1085
1086 pwm_ctl = 0;
1087 if (panel->backlight.active_low_pwm)
1088 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1089
1090 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1091 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1092 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1093 pwm_ctl | BXT_BLC_PWM_ENABLE);
1094 }
1095
1096 static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
1097 const struct drm_connector_state *conn_state)
1098 {
1099 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1100 struct intel_panel *panel = &connector->panel;
1101
1102 pwm_enable(panel->backlight.pwm);
1103 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1104 }
1105
1106 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
1107 const struct drm_connector_state *conn_state)
1108 {
1109 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1110 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1111 struct intel_panel *panel = &connector->panel;
1112 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1113
1114 if (!panel->backlight.present)
1115 return;
1116
1117 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1118
1119 mutex_lock(&dev_priv->backlight_lock);
1120
1121 WARN_ON(panel->backlight.max == 0);
1122
1123 if (panel->backlight.level <= panel->backlight.min) {
1124 panel->backlight.level = panel->backlight.max;
1125 if (panel->backlight.device)
1126 panel->backlight.device->props.brightness =
1127 scale_hw_to_user(connector,
1128 panel->backlight.level,
1129 panel->backlight.device->props.max_brightness);
1130 }
1131
1132 panel->backlight.enable(crtc_state, conn_state);
1133 panel->backlight.enabled = true;
1134 if (panel->backlight.device)
1135 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1136
1137 mutex_unlock(&dev_priv->backlight_lock);
1138 }
1139
1140 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1141 static u32 intel_panel_get_backlight(struct intel_connector *connector)
1142 {
1143 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1144 struct intel_panel *panel = &connector->panel;
1145 u32 val = 0;
1146
1147 mutex_lock(&dev_priv->backlight_lock);
1148
1149 if (panel->backlight.enabled) {
1150 val = panel->backlight.get(connector);
1151 val = intel_panel_compute_brightness(connector, val);
1152 }
1153
1154 mutex_unlock(&dev_priv->backlight_lock);
1155
1156 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
1157 return val;
1158 }
1159
1160 /* set backlight brightness to level in range [0..max], scaling wrt hw min */
1161 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
1162 u32 user_level, u32 user_max)
1163 {
1164 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1165 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1166 struct intel_panel *panel = &connector->panel;
1167 u32 hw_level;
1168
1169 if (!panel->backlight.present)
1170 return;
1171
1172 mutex_lock(&dev_priv->backlight_lock);
1173
1174 WARN_ON(panel->backlight.max == 0);
1175
1176 hw_level = scale_user_to_hw(connector, user_level, user_max);
1177 panel->backlight.level = hw_level;
1178
1179 if (panel->backlight.enabled)
1180 intel_panel_actually_set_backlight(conn_state, hw_level);
1181
1182 mutex_unlock(&dev_priv->backlight_lock);
1183 }
1184
1185 static int intel_backlight_device_update_status(struct backlight_device *bd)
1186 {
1187 struct intel_connector *connector = bl_get_data(bd);
1188 struct intel_panel *panel = &connector->panel;
1189 struct drm_device *dev = connector->base.dev;
1190
1191 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1192 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1193 bd->props.brightness, bd->props.max_brightness);
1194 intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1195 bd->props.max_brightness);
1196
1197 /*
1198 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1199 * backlight class device does not make it easy to to differentiate
1200 * between callbacks for brightness and bl_power, so our backlight_power
1201 * callback needs to take this into account.
1202 */
1203 if (panel->backlight.enabled) {
1204 if (panel->backlight.power) {
1205 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1206 bd->props.brightness != 0;
1207 panel->backlight.power(connector, enable);
1208 }
1209 } else {
1210 bd->props.power = FB_BLANK_POWERDOWN;
1211 }
1212
1213 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1214 return 0;
1215 }
1216
1217 static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1218 {
1219 struct intel_connector *connector = bl_get_data(bd);
1220 struct drm_device *dev = connector->base.dev;
1221 struct drm_i915_private *dev_priv = to_i915(dev);
1222 u32 hw_level;
1223 int ret;
1224
1225 intel_runtime_pm_get(dev_priv);
1226 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1227
1228 hw_level = intel_panel_get_backlight(connector);
1229 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1230
1231 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1232 intel_runtime_pm_put(dev_priv);
1233
1234 return ret;
1235 }
1236
1237 static const struct backlight_ops intel_backlight_device_ops = {
1238 .update_status = intel_backlight_device_update_status,
1239 .get_brightness = intel_backlight_device_get_brightness,
1240 };
1241
1242 int intel_backlight_device_register(struct intel_connector *connector)
1243 {
1244 struct intel_panel *panel = &connector->panel;
1245 struct backlight_properties props;
1246
1247 if (WARN_ON(panel->backlight.device))
1248 return -ENODEV;
1249
1250 if (!panel->backlight.present)
1251 return 0;
1252
1253 WARN_ON(panel->backlight.max == 0);
1254
1255 memset(&props, 0, sizeof(props));
1256 props.type = BACKLIGHT_RAW;
1257
1258 /*
1259 * Note: Everything should work even if the backlight device max
1260 * presented to the userspace is arbitrarily chosen.
1261 */
1262 props.max_brightness = panel->backlight.max;
1263 props.brightness = scale_hw_to_user(connector,
1264 panel->backlight.level,
1265 props.max_brightness);
1266
1267 if (panel->backlight.enabled)
1268 props.power = FB_BLANK_UNBLANK;
1269 else
1270 props.power = FB_BLANK_POWERDOWN;
1271
1272 /*
1273 * Note: using the same name independent of the connector prevents
1274 * registration of multiple backlight devices in the driver.
1275 */
1276 panel->backlight.device =
1277 backlight_device_register("intel_backlight",
1278 connector->base.kdev,
1279 connector,
1280 &intel_backlight_device_ops, &props);
1281
1282 if (IS_ERR(panel->backlight.device)) {
1283 DRM_ERROR("Failed to register backlight: %ld\n",
1284 PTR_ERR(panel->backlight.device));
1285 panel->backlight.device = NULL;
1286 return -ENODEV;
1287 }
1288
1289 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1290 connector->base.name);
1291
1292 return 0;
1293 }
1294
1295 void intel_backlight_device_unregister(struct intel_connector *connector)
1296 {
1297 struct intel_panel *panel = &connector->panel;
1298
1299 if (panel->backlight.device) {
1300 backlight_device_unregister(panel->backlight.device);
1301 panel->backlight.device = NULL;
1302 }
1303 }
1304 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1305
1306 /*
1307 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
1308 * PWM increment = 1
1309 */
1310 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1311 {
1312 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1313
1314 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
1315 }
1316
1317 /*
1318 * BXT: PWM clock frequency = 19.2 MHz.
1319 */
1320 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1321 {
1322 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1323 }
1324
1325 /*
1326 * SPT: This value represents the period of the PWM stream in clock periods
1327 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1328 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1329 */
1330 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1331 {
1332 struct intel_panel *panel = &connector->panel;
1333 u32 mul;
1334
1335 if (panel->backlight.alternate_pwm_increment)
1336 mul = 128;
1337 else
1338 mul = 16;
1339
1340 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1341 }
1342
1343 /*
1344 * LPT: This value represents the period of the PWM stream in clock periods
1345 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1346 * LPT SOUTH_CHICKEN2 register bit 5).
1347 */
1348 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1349 {
1350 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1351 struct intel_panel *panel = &connector->panel;
1352 u32 mul, clock;
1353
1354 if (panel->backlight.alternate_pwm_increment)
1355 mul = 16;
1356 else
1357 mul = 128;
1358
1359 if (HAS_PCH_LPT_H(dev_priv))
1360 clock = MHz(135); /* LPT:H */
1361 else
1362 clock = MHz(24); /* LPT:LP */
1363
1364 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1365 }
1366
1367 /*
1368 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1369 * display raw clocks multiplied by 128.
1370 */
1371 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1372 {
1373 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1374
1375 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1376 }
1377
1378 /*
1379 * Gen2: This field determines the number of time base events (display core
1380 * clock frequency/32) in total for a complete cycle of modulated backlight
1381 * control.
1382 *
1383 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1384 * divided by 32.
1385 */
1386 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1387 {
1388 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1389 int clock;
1390
1391 if (IS_PINEVIEW(dev_priv))
1392 clock = KHz(dev_priv->rawclk_freq);
1393 else
1394 clock = KHz(dev_priv->cdclk.hw.cdclk);
1395
1396 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1397 }
1398
1399 /*
1400 * Gen4: This value represents the period of the PWM stream in display core
1401 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1402 *
1403 */
1404 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1405 {
1406 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1407 int clock;
1408
1409 if (IS_G4X(dev_priv))
1410 clock = KHz(dev_priv->rawclk_freq);
1411 else
1412 clock = KHz(dev_priv->cdclk.hw.cdclk);
1413
1414 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1415 }
1416
1417 /*
1418 * VLV: This value represents the period of the PWM stream in display core
1419 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1420 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1421 */
1422 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1423 {
1424 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1425 int mul, clock;
1426
1427 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1428 if (IS_CHERRYVIEW(dev_priv))
1429 clock = KHz(19200);
1430 else
1431 clock = MHz(25);
1432 mul = 16;
1433 } else {
1434 clock = KHz(dev_priv->rawclk_freq);
1435 mul = 128;
1436 }
1437
1438 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1439 }
1440
1441 static u32 get_backlight_max_vbt(struct intel_connector *connector)
1442 {
1443 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1444 struct intel_panel *panel = &connector->panel;
1445 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1446 u32 pwm;
1447
1448 if (!panel->backlight.hz_to_pwm) {
1449 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1450 return 0;
1451 }
1452
1453 if (pwm_freq_hz) {
1454 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1455 pwm_freq_hz);
1456 } else {
1457 pwm_freq_hz = 200;
1458 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1459 pwm_freq_hz);
1460 }
1461
1462 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1463 if (!pwm) {
1464 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1465 return 0;
1466 }
1467
1468 return pwm;
1469 }
1470
1471 /*
1472 * Note: The setup hooks can't assume pipe is set!
1473 */
1474 static u32 get_backlight_min_vbt(struct intel_connector *connector)
1475 {
1476 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1477 struct intel_panel *panel = &connector->panel;
1478 int min;
1479
1480 WARN_ON(panel->backlight.max == 0);
1481
1482 /*
1483 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1484 * to problems. There are such machines out there. Either our
1485 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1486 * against this by letting the minimum be at most (arbitrarily chosen)
1487 * 25% of the max.
1488 */
1489 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1490 if (min != dev_priv->vbt.backlight.min_brightness) {
1491 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1492 dev_priv->vbt.backlight.min_brightness, min);
1493 }
1494
1495 /* vbt value is a coefficient in range [0..255] */
1496 return scale(min, 0, 255, 0, panel->backlight.max);
1497 }
1498
1499 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1500 {
1501 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1502 struct intel_panel *panel = &connector->panel;
1503 u32 pch_ctl1, pch_ctl2, val;
1504 bool alt;
1505
1506 if (HAS_PCH_LPT(dev_priv))
1507 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1508 else
1509 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1510 panel->backlight.alternate_pwm_increment = alt;
1511
1512 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1513 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1514
1515 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1516 panel->backlight.max = pch_ctl2 >> 16;
1517
1518 if (!panel->backlight.max)
1519 panel->backlight.max = get_backlight_max_vbt(connector);
1520
1521 if (!panel->backlight.max)
1522 return -ENODEV;
1523
1524 panel->backlight.min = get_backlight_min_vbt(connector);
1525
1526 val = lpt_get_backlight(connector);
1527 val = intel_panel_compute_brightness(connector, val);
1528 panel->backlight.level = clamp(val, panel->backlight.min,
1529 panel->backlight.max);
1530
1531 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1532
1533 return 0;
1534 }
1535
1536 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1537 {
1538 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1539 struct intel_panel *panel = &connector->panel;
1540 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1541
1542 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1543 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1544
1545 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1546 panel->backlight.max = pch_ctl2 >> 16;
1547
1548 if (!panel->backlight.max)
1549 panel->backlight.max = get_backlight_max_vbt(connector);
1550
1551 if (!panel->backlight.max)
1552 return -ENODEV;
1553
1554 panel->backlight.min = get_backlight_min_vbt(connector);
1555
1556 val = pch_get_backlight(connector);
1557 val = intel_panel_compute_brightness(connector, val);
1558 panel->backlight.level = clamp(val, panel->backlight.min,
1559 panel->backlight.max);
1560
1561 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1562 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1563 (pch_ctl1 & BLM_PCH_PWM_ENABLE);
1564
1565 return 0;
1566 }
1567
1568 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1569 {
1570 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1571 struct intel_panel *panel = &connector->panel;
1572 u32 ctl, val;
1573
1574 ctl = I915_READ(BLC_PWM_CTL);
1575
1576 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1577 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1578
1579 if (IS_PINEVIEW(dev_priv))
1580 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1581
1582 panel->backlight.max = ctl >> 17;
1583
1584 if (!panel->backlight.max) {
1585 panel->backlight.max = get_backlight_max_vbt(connector);
1586 panel->backlight.max >>= 1;
1587 }
1588
1589 if (!panel->backlight.max)
1590 return -ENODEV;
1591
1592 if (panel->backlight.combination_mode)
1593 panel->backlight.max *= 0xff;
1594
1595 panel->backlight.min = get_backlight_min_vbt(connector);
1596
1597 val = i9xx_get_backlight(connector);
1598 val = intel_panel_compute_brightness(connector, val);
1599 panel->backlight.level = clamp(val, panel->backlight.min,
1600 panel->backlight.max);
1601
1602 panel->backlight.enabled = val != 0;
1603
1604 return 0;
1605 }
1606
1607 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1608 {
1609 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1610 struct intel_panel *panel = &connector->panel;
1611 u32 ctl, ctl2, val;
1612
1613 ctl2 = I915_READ(BLC_PWM_CTL2);
1614 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1615 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1616
1617 ctl = I915_READ(BLC_PWM_CTL);
1618 panel->backlight.max = ctl >> 16;
1619
1620 if (!panel->backlight.max)
1621 panel->backlight.max = get_backlight_max_vbt(connector);
1622
1623 if (!panel->backlight.max)
1624 return -ENODEV;
1625
1626 if (panel->backlight.combination_mode)
1627 panel->backlight.max *= 0xff;
1628
1629 panel->backlight.min = get_backlight_min_vbt(connector);
1630
1631 val = i9xx_get_backlight(connector);
1632 val = intel_panel_compute_brightness(connector, val);
1633 panel->backlight.level = clamp(val, panel->backlight.min,
1634 panel->backlight.max);
1635
1636 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1637
1638 return 0;
1639 }
1640
1641 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1642 {
1643 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1644 struct intel_panel *panel = &connector->panel;
1645 u32 ctl, ctl2, val;
1646
1647 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1648 return -ENODEV;
1649
1650 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1651 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1652
1653 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1654 panel->backlight.max = ctl >> 16;
1655
1656 if (!panel->backlight.max)
1657 panel->backlight.max = get_backlight_max_vbt(connector);
1658
1659 if (!panel->backlight.max)
1660 return -ENODEV;
1661
1662 panel->backlight.min = get_backlight_min_vbt(connector);
1663
1664 val = _vlv_get_backlight(dev_priv, pipe);
1665 val = intel_panel_compute_brightness(connector, val);
1666 panel->backlight.level = clamp(val, panel->backlight.min,
1667 panel->backlight.max);
1668
1669 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1670
1671 return 0;
1672 }
1673
1674 static int
1675 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1676 {
1677 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1678 struct intel_panel *panel = &connector->panel;
1679 u32 pwm_ctl, val;
1680
1681 panel->backlight.controller = dev_priv->vbt.backlight.controller;
1682
1683 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1684
1685 /* Controller 1 uses the utility pin. */
1686 if (panel->backlight.controller == 1) {
1687 val = I915_READ(UTIL_PIN_CTL);
1688 panel->backlight.util_pin_active_low =
1689 val & UTIL_PIN_POLARITY;
1690 }
1691
1692 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1693 panel->backlight.max =
1694 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1695
1696 if (!panel->backlight.max)
1697 panel->backlight.max = get_backlight_max_vbt(connector);
1698
1699 if (!panel->backlight.max)
1700 return -ENODEV;
1701
1702 panel->backlight.min = get_backlight_min_vbt(connector);
1703
1704 val = bxt_get_backlight(connector);
1705 val = intel_panel_compute_brightness(connector, val);
1706 panel->backlight.level = clamp(val, panel->backlight.min,
1707 panel->backlight.max);
1708
1709 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1710
1711 return 0;
1712 }
1713
1714 static int
1715 cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
1716 {
1717 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1718 struct intel_panel *panel = &connector->panel;
1719 u32 pwm_ctl, val;
1720
1721 /*
1722 * CNP has the BXT implementation of backlight, but with only
1723 * one controller. Future platforms could have multiple controllers
1724 * so let's make this extensible and prepared for the future.
1725 */
1726 panel->backlight.controller = 0;
1727
1728 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1729
1730 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1731 panel->backlight.max =
1732 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1733
1734 if (!panel->backlight.max)
1735 panel->backlight.max = get_backlight_max_vbt(connector);
1736
1737 if (!panel->backlight.max)
1738 return -ENODEV;
1739
1740 panel->backlight.min = get_backlight_min_vbt(connector);
1741
1742 val = bxt_get_backlight(connector);
1743 val = intel_panel_compute_brightness(connector, val);
1744 panel->backlight.level = clamp(val, panel->backlight.min,
1745 panel->backlight.max);
1746
1747 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1748
1749 return 0;
1750 }
1751
1752 static int pwm_setup_backlight(struct intel_connector *connector,
1753 enum pipe pipe)
1754 {
1755 struct drm_device *dev = connector->base.dev;
1756 struct intel_panel *panel = &connector->panel;
1757 int retval;
1758
1759 /* Get the PWM chip for backlight control */
1760 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1761 if (IS_ERR(panel->backlight.pwm)) {
1762 DRM_ERROR("Failed to own the pwm chip\n");
1763 panel->backlight.pwm = NULL;
1764 return -ENODEV;
1765 }
1766
1767 /*
1768 * FIXME: pwm_apply_args() should be removed when switching to
1769 * the atomic PWM API.
1770 */
1771 pwm_apply_args(panel->backlight.pwm);
1772
1773 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1774 CRC_PMIC_PWM_PERIOD_NS);
1775 if (retval < 0) {
1776 DRM_ERROR("Failed to configure the pwm chip\n");
1777 pwm_put(panel->backlight.pwm);
1778 panel->backlight.pwm = NULL;
1779 return retval;
1780 }
1781
1782 panel->backlight.min = 0; /* 0% */
1783 panel->backlight.max = 100; /* 100% */
1784 panel->backlight.level = DIV_ROUND_UP(
1785 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1786 CRC_PMIC_PWM_PERIOD_NS);
1787 panel->backlight.enabled = panel->backlight.level != 0;
1788
1789 return 0;
1790 }
1791
1792 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1793 {
1794 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1795 struct intel_connector *intel_connector = to_intel_connector(connector);
1796 struct intel_panel *panel = &intel_connector->panel;
1797 int ret;
1798
1799 if (!dev_priv->vbt.backlight.present) {
1800 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1801 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1802 } else {
1803 DRM_DEBUG_KMS("no backlight present per VBT\n");
1804 return 0;
1805 }
1806 }
1807
1808 /* ensure intel_panel has been initialized first */
1809 if (WARN_ON(!panel->backlight.setup))
1810 return -ENODEV;
1811
1812 /* set level and max in panel struct */
1813 mutex_lock(&dev_priv->backlight_lock);
1814 ret = panel->backlight.setup(intel_connector, pipe);
1815 mutex_unlock(&dev_priv->backlight_lock);
1816
1817 if (ret) {
1818 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1819 connector->name);
1820 return ret;
1821 }
1822
1823 panel->backlight.present = true;
1824
1825 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1826 connector->name,
1827 enableddisabled(panel->backlight.enabled),
1828 panel->backlight.level, panel->backlight.max);
1829
1830 return 0;
1831 }
1832
1833 void intel_panel_destroy_backlight(struct drm_connector *connector)
1834 {
1835 struct intel_connector *intel_connector = to_intel_connector(connector);
1836 struct intel_panel *panel = &intel_connector->panel;
1837
1838 /* dispose of the pwm */
1839 if (panel->backlight.pwm)
1840 pwm_put(panel->backlight.pwm);
1841
1842 panel->backlight.present = false;
1843 }
1844
1845 /* Set up chip specific backlight functions */
1846 static void
1847 intel_panel_init_backlight_funcs(struct intel_panel *panel)
1848 {
1849 struct intel_connector *connector =
1850 container_of(panel, struct intel_connector, panel);
1851 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1852
1853 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
1854 intel_dp_aux_init_backlight_funcs(connector) == 0)
1855 return;
1856
1857 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
1858 intel_dsi_dcs_init_backlight_funcs(connector) == 0)
1859 return;
1860
1861 if (IS_GEN9_LP(dev_priv)) {
1862 panel->backlight.setup = bxt_setup_backlight;
1863 panel->backlight.enable = bxt_enable_backlight;
1864 panel->backlight.disable = bxt_disable_backlight;
1865 panel->backlight.set = bxt_set_backlight;
1866 panel->backlight.get = bxt_get_backlight;
1867 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1868 } else if (HAS_PCH_CNP(dev_priv)) {
1869 panel->backlight.setup = cnp_setup_backlight;
1870 panel->backlight.enable = cnp_enable_backlight;
1871 panel->backlight.disable = cnp_disable_backlight;
1872 panel->backlight.set = bxt_set_backlight;
1873 panel->backlight.get = bxt_get_backlight;
1874 panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
1875 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
1876 HAS_PCH_KBP(dev_priv)) {
1877 panel->backlight.setup = lpt_setup_backlight;
1878 panel->backlight.enable = lpt_enable_backlight;
1879 panel->backlight.disable = lpt_disable_backlight;
1880 panel->backlight.set = lpt_set_backlight;
1881 panel->backlight.get = lpt_get_backlight;
1882 if (HAS_PCH_LPT(dev_priv))
1883 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1884 else
1885 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1886 } else if (HAS_PCH_SPLIT(dev_priv)) {
1887 panel->backlight.setup = pch_setup_backlight;
1888 panel->backlight.enable = pch_enable_backlight;
1889 panel->backlight.disable = pch_disable_backlight;
1890 panel->backlight.set = pch_set_backlight;
1891 panel->backlight.get = pch_get_backlight;
1892 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1893 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1894 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
1895 panel->backlight.setup = pwm_setup_backlight;
1896 panel->backlight.enable = pwm_enable_backlight;
1897 panel->backlight.disable = pwm_disable_backlight;
1898 panel->backlight.set = pwm_set_backlight;
1899 panel->backlight.get = pwm_get_backlight;
1900 } else {
1901 panel->backlight.setup = vlv_setup_backlight;
1902 panel->backlight.enable = vlv_enable_backlight;
1903 panel->backlight.disable = vlv_disable_backlight;
1904 panel->backlight.set = vlv_set_backlight;
1905 panel->backlight.get = vlv_get_backlight;
1906 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1907 }
1908 } else if (IS_GEN4(dev_priv)) {
1909 panel->backlight.setup = i965_setup_backlight;
1910 panel->backlight.enable = i965_enable_backlight;
1911 panel->backlight.disable = i965_disable_backlight;
1912 panel->backlight.set = i9xx_set_backlight;
1913 panel->backlight.get = i9xx_get_backlight;
1914 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1915 } else {
1916 panel->backlight.setup = i9xx_setup_backlight;
1917 panel->backlight.enable = i9xx_enable_backlight;
1918 panel->backlight.disable = i9xx_disable_backlight;
1919 panel->backlight.set = i9xx_set_backlight;
1920 panel->backlight.get = i9xx_get_backlight;
1921 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1922 }
1923 }
1924
1925 int intel_panel_init(struct intel_panel *panel,
1926 struct drm_display_mode *fixed_mode,
1927 struct drm_display_mode *alt_fixed_mode,
1928 struct drm_display_mode *downclock_mode)
1929 {
1930 intel_panel_init_backlight_funcs(panel);
1931
1932 panel->fixed_mode = fixed_mode;
1933 panel->alt_fixed_mode = alt_fixed_mode;
1934 panel->downclock_mode = downclock_mode;
1935
1936 return 0;
1937 }
1938
1939 void intel_panel_fini(struct intel_panel *panel)
1940 {
1941 struct intel_connector *intel_connector =
1942 container_of(panel, struct intel_connector, panel);
1943
1944 if (panel->fixed_mode)
1945 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1946
1947 if (panel->alt_fixed_mode)
1948 drm_mode_destroy(intel_connector->base.dev,
1949 panel->alt_fixed_mode);
1950
1951 if (panel->downclock_mode)
1952 drm_mode_destroy(intel_connector->base.dev,
1953 panel->downclock_mode);
1954 }
CRIS linux kernel tree