drivers/usb/host/xhci-mtk.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * MediaTek xHCI Host Controller Driver
   4  *
   5  * Copyright (c) 2015 MediaTek Inc.
   6  * Author:
   7  *  Chunfeng Yun <chunfeng.yun@mediatek.com>
   8  */
   9
  10 #include <linux/clk.h>
  11 #include <linux/dma-mapping.h>
  12 #include <linux/iopoll.h>
  13 #include <linux/kernel.h>
  14 #include <linux/mfd/syscon.h>
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/phy/phy.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/pm_runtime.h>
  20 #include <linux/regmap.h>
  21 #include <linux/regulator/consumer.h>
  22
  23 #include "xhci.h"
  24 #include "xhci-mtk.h"
  25
  26 /* ip_pw_ctrl0 register */
  27 #define CTRL0_IP_SW_RST BIT(0)
  28
  29 /* ip_pw_ctrl1 register */
  30 #define CTRL1_IP_HOST_PDN       BIT(0)
  31
  32 /* ip_pw_ctrl2 register */
  33 #define CTRL2_IP_DEV_PDN        BIT(0)
  34
  35 /* ip_pw_sts1 register */
  36 #define STS1_IP_SLEEP_STS       BIT(30)
  37 #define STS1_U3_MAC_RST BIT(16)
  38 #define STS1_XHCI_RST           BIT(11)
  39 #define STS1_SYS125_RST BIT(10)
  40 #define STS1_REF_RST            BIT(8)
  41 #define STS1_SYSPLL_STABLE      BIT(0)
  42
  43 /* ip_xhci_cap register */
  44 #define CAP_U3_PORT_NUM(p)      ((p) & 0xff)
  45 #define CAP_U2_PORT_NUM(p)      (((p) >> 8) & 0xff)
  46
  47 /* u3_ctrl_p register */
  48 #define CTRL_U3_PORT_HOST_SEL   BIT(2)
  49 #define CTRL_U3_PORT_PDN        BIT(1)
  50 #define CTRL_U3_PORT_DIS        BIT(0)
  51
  52 /* u2_ctrl_p register */
  53 #define CTRL_U2_PORT_HOST_SEL   BIT(2)
  54 #define CTRL_U2_PORT_PDN        BIT(1)
  55 #define CTRL_U2_PORT_DIS        BIT(0)
  56
  57 /* u2_phy_pll register */
  58 #define CTRL_U2_FORCE_PLL_STB   BIT(28)
  59
  60 /* usb remote wakeup registers in syscon */
  61 /* mt8173 etc */
  62 #define PERI_WK_CTRL1   0x4
  63 #define WC1_IS_C(x)     (((x) & 0xf) << 26)  /* cycle debounce */
  64 #define WC1_IS_EN       BIT(25)
  65 #define WC1_IS_P        BIT(6)  /* polarity for ip sleep */
  66
  67 /* mt2712 etc */
  68 #define PERI_SSUSB_SPM_CTRL     0x0
  69 #define SSC_IP_SLEEP_EN BIT(4)
  70 #define SSC_SPM_INT_EN          BIT(1)
  71
  72 enum ssusb_uwk_vers {
  73         SSUSB_UWK_V1 = 1,
  74         SSUSB_UWK_V2,
  75 };
  76
  77 static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk)
  78 {
  79         struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
  80         u32 value, check_val;
  81         int u3_ports_disabed = 0;
  82         int ret;
  83         int i;
  84
  85         if (!mtk->has_ippc)
  86                 return 0;
  87
  88         /* power on host ip */
  89         value = readl(&ippc->ip_pw_ctr1);
  90         value &= ~CTRL1_IP_HOST_PDN;
  91         writel(value, &ippc->ip_pw_ctr1);
  92
  93         /* power on and enable u3 ports except skipped ones */
  94         for (i = 0; i < mtk->num_u3_ports; i++) {
  95                 if ((0x1 << i) & mtk->u3p_dis_msk) {
  96                         u3_ports_disabed++;
  97                         continue;
  98                 }
  99
 100                 value = readl(&ippc->u3_ctrl_p[i]);
 101                 value &= ~(CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS);
 102                 value |= CTRL_U3_PORT_HOST_SEL;
 103                 writel(value, &ippc->u3_ctrl_p[i]);
 104         }
 105
 106         /* power on and enable all u2 ports */
 107         for (i = 0; i < mtk->num_u2_ports; i++) {
 108                 value = readl(&ippc->u2_ctrl_p[i]);
 109                 value &= ~(CTRL_U2_PORT_PDN | CTRL_U2_PORT_DIS);
 110                 value |= CTRL_U2_PORT_HOST_SEL;
 111                 writel(value, &ippc->u2_ctrl_p[i]);
 112         }
 113
 114         /*
 115          * wait for clocks to be stable, and clock domains reset to
 116          * be inactive after power on and enable ports
 117          */
 118         check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
 119                         STS1_SYS125_RST | STS1_XHCI_RST;
 120
 121         if (mtk->num_u3_ports > u3_ports_disabed)
 122                 check_val |= STS1_U3_MAC_RST;
 123
 124         ret = readl_poll_timeout(&ippc->ip_pw_sts1, value,
 125                           (check_val == (value & check_val)), 100, 20000);
 126         if (ret) {
 127                 dev_err(mtk->dev, "clocks are not stable (0x%x)\n", value);
 128                 return ret;
 129         }
 130
 131         return 0;
 132 }
 133
 134 static int xhci_mtk_host_disable(struct xhci_hcd_mtk *mtk)
 135 {
 136         struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
 137         u32 value;
 138         int ret;
 139         int i;
 140
 141         if (!mtk->has_ippc)
 142                 return 0;
 143
 144         /* power down u3 ports except skipped ones */
 145         for (i = 0; i < mtk->num_u3_ports; i++) {
 146                 if ((0x1 << i) & mtk->u3p_dis_msk)
 147                         continue;
 148
 149                 value = readl(&ippc->u3_ctrl_p[i]);
 150                 value |= CTRL_U3_PORT_PDN;
 151                 writel(value, &ippc->u3_ctrl_p[i]);
 152         }
 153
 154         /* power down all u2 ports */
 155         for (i = 0; i < mtk->num_u2_ports; i++) {
 156                 value = readl(&ippc->u2_ctrl_p[i]);
 157                 value |= CTRL_U2_PORT_PDN;
 158                 writel(value, &ippc->u2_ctrl_p[i]);
 159         }
 160
 161         /* power down host ip */
 162         value = readl(&ippc->ip_pw_ctr1);
 163         value |= CTRL1_IP_HOST_PDN;
 164         writel(value, &ippc->ip_pw_ctr1);
 165
 166         /* wait for host ip to sleep */
 167         ret = readl_poll_timeout(&ippc->ip_pw_sts1, value,
 168                           (value & STS1_IP_SLEEP_STS), 100, 100000);
 169         if (ret) {
 170                 dev_err(mtk->dev, "ip sleep failed!!!\n");
 171                 return ret;
 172         }
 173         return 0;
 174 }
 175
 176 static int xhci_mtk_ssusb_config(struct xhci_hcd_mtk *mtk)
 177 {
 178         struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
 179         u32 value;
 180
 181         if (!mtk->has_ippc)
 182                 return 0;
 183
 184         /* reset whole ip */
 185         value = readl(&ippc->ip_pw_ctr0);
 186         value |= CTRL0_IP_SW_RST;
 187         writel(value, &ippc->ip_pw_ctr0);
 188         udelay(1);
 189         value = readl(&ippc->ip_pw_ctr0);
 190         value &= ~CTRL0_IP_SW_RST;
 191         writel(value, &ippc->ip_pw_ctr0);
 192
 193         /*
 194          * device ip is default power-on in fact
 195          * power down device ip, otherwise ip-sleep will fail
 196          */
 197         value = readl(&ippc->ip_pw_ctr2);
 198         value |= CTRL2_IP_DEV_PDN;
 199         writel(value, &ippc->ip_pw_ctr2);
 200
 201         value = readl(&ippc->ip_xhci_cap);
 202         mtk->num_u3_ports = CAP_U3_PORT_NUM(value);
 203         mtk->num_u2_ports = CAP_U2_PORT_NUM(value);
 204         dev_dbg(mtk->dev, "%s u2p:%d, u3p:%d\n", __func__,
 205                         mtk->num_u2_ports, mtk->num_u3_ports);
 206
 207         return xhci_mtk_host_enable(mtk);
 208 }
 209
 210 /* ignore the error if the clock does not exist */
 211 static struct clk *optional_clk_get(struct device *dev, const char *id)
 212 {
 213         struct clk *opt_clk;
 214
 215         opt_clk = devm_clk_get(dev, id);
 216         /* ignore error number except EPROBE_DEFER */
 217         if (IS_ERR(opt_clk) && (PTR_ERR(opt_clk) != -EPROBE_DEFER))
 218                 opt_clk = NULL;
 219
 220         return opt_clk;
 221 }
 222
 223 static int xhci_mtk_clks_get(struct xhci_hcd_mtk *mtk)
 224 {
 225         struct device *dev = mtk->dev;
 226
 227         mtk->sys_clk = devm_clk_get(dev, "sys_ck");
 228         if (IS_ERR(mtk->sys_clk)) {
 229                 dev_err(dev, "fail to get sys_ck\n");
 230                 return PTR_ERR(mtk->sys_clk);
 231         }
 232
 233         mtk->ref_clk = optional_clk_get(dev, "ref_ck");
 234         if (IS_ERR(mtk->ref_clk))
 235                 return PTR_ERR(mtk->ref_clk);
 236
 237         mtk->mcu_clk = optional_clk_get(dev, "mcu_ck");
 238         if (IS_ERR(mtk->mcu_clk))
 239                 return PTR_ERR(mtk->mcu_clk);
 240
 241         mtk->dma_clk = optional_clk_get(dev, "dma_ck");
 242         return PTR_ERR_OR_ZERO(mtk->dma_clk);
 243 }
 244
 245 static int xhci_mtk_clks_enable(struct xhci_hcd_mtk *mtk)
 246 {
 247         int ret;
 248
 249         ret = clk_prepare_enable(mtk->ref_clk);
 250         if (ret) {
 251                 dev_err(mtk->dev, "failed to enable ref_clk\n");
 252                 goto ref_clk_err;
 253         }
 254
 255         ret = clk_prepare_enable(mtk->sys_clk);
 256         if (ret) {
 257                 dev_err(mtk->dev, "failed to enable sys_clk\n");
 258                 goto sys_clk_err;
 259         }
 260
 261         ret = clk_prepare_enable(mtk->mcu_clk);
 262         if (ret) {
 263                 dev_err(mtk->dev, "failed to enable mcu_clk\n");
 264                 goto mcu_clk_err;
 265         }
 266
 267         ret = clk_prepare_enable(mtk->dma_clk);
 268         if (ret) {
 269                 dev_err(mtk->dev, "failed to enable dma_clk\n");
 270                 goto dma_clk_err;
 271         }
 272
 273         return 0;
 274
 275 dma_clk_err:
 276         clk_disable_unprepare(mtk->mcu_clk);
 277 mcu_clk_err:
 278         clk_disable_unprepare(mtk->sys_clk);
 279 sys_clk_err:
 280         clk_disable_unprepare(mtk->ref_clk);
 281 ref_clk_err:
 282         return ret;
 283 }
 284
 285 static void xhci_mtk_clks_disable(struct xhci_hcd_mtk *mtk)
 286 {
 287         clk_disable_unprepare(mtk->dma_clk);
 288         clk_disable_unprepare(mtk->mcu_clk);
 289         clk_disable_unprepare(mtk->sys_clk);
 290         clk_disable_unprepare(mtk->ref_clk);
 291 }
 292
 293 /* only clocks can be turn off for ip-sleep wakeup mode */
 294 static void usb_wakeup_ip_sleep_set(struct xhci_hcd_mtk *mtk, bool enable)
 295 {
 296         u32 reg, msk, val;
 297
 298         switch (mtk->uwk_vers) {
 299         case SSUSB_UWK_V1:
 300                 reg = mtk->uwk_reg_base + PERI_WK_CTRL1;
 301                 msk = WC1_IS_EN | WC1_IS_C(0xf) | WC1_IS_P;
 302                 val = enable ? (WC1_IS_EN | WC1_IS_C(0x8)) : 0;
 303                 break;
 304         case SSUSB_UWK_V2:
 305                 reg = mtk->uwk_reg_base + PERI_SSUSB_SPM_CTRL;
 306                 msk = SSC_IP_SLEEP_EN | SSC_SPM_INT_EN;
 307                 val = enable ? msk : 0;
 308                 break;
 309         default:
 310                 return;
 311         }
 312         regmap_update_bits(mtk->uwk, reg, msk, val);
 313 }
 314
 315 static int usb_wakeup_of_property_parse(struct xhci_hcd_mtk *mtk,
 316                                 struct device_node *dn)
 317 {
 318         struct of_phandle_args args;
 319         int ret;
 320
 321         /* Wakeup function is optional */
 322         mtk->uwk_en = of_property_read_bool(dn, "wakeup-source");
 323         if (!mtk->uwk_en)
 324                 return 0;
 325
 326         ret = of_parse_phandle_with_fixed_args(dn,
 327                                 "mediatek,syscon-wakeup", 2, 0, &args);
 328         if (ret)
 329                 return ret;
 330
 331         mtk->uwk_reg_base = args.args[0];
 332         mtk->uwk_vers = args.args[1];
 333         mtk->uwk = syscon_node_to_regmap(args.np);
 334         of_node_put(args.np);
 335         dev_info(mtk->dev, "uwk - reg:0x%x, version:%d\n",
 336                         mtk->uwk_reg_base, mtk->uwk_vers);
 337
 338         return PTR_ERR_OR_ZERO(mtk->uwk);
 339
 340 }
 341
 342 static void usb_wakeup_set(struct xhci_hcd_mtk *mtk, bool enable)
 343 {
 344         if (mtk->uwk_en)
 345                 usb_wakeup_ip_sleep_set(mtk, enable);
 346 }
 347
 348 static int xhci_mtk_setup(struct usb_hcd *hcd);
 349 static const struct xhci_driver_overrides xhci_mtk_overrides __initconst = {
 350         .reset = xhci_mtk_setup,
 351 };
 352
 353 static struct hc_driver __read_mostly xhci_mtk_hc_driver;
 354
 355 static int xhci_mtk_phy_init(struct xhci_hcd_mtk *mtk)
 356 {
 357         int i;
 358         int ret;
 359
 360         for (i = 0; i < mtk->num_phys; i++) {
 361                 ret = phy_init(mtk->phys[i]);
 362                 if (ret)
 363                         goto exit_phy;
 364         }
 365         return 0;
 366
 367 exit_phy:
 368         for (; i > 0; i--)
 369                 phy_exit(mtk->phys[i - 1]);
 370
 371         return ret;
 372 }
 373
 374 static int xhci_mtk_phy_exit(struct xhci_hcd_mtk *mtk)
 375 {
 376         int i;
 377
 378         for (i = 0; i < mtk->num_phys; i++)
 379                 phy_exit(mtk->phys[i]);
 380
 381         return 0;
 382 }
 383
 384 static int xhci_mtk_phy_power_on(struct xhci_hcd_mtk *mtk)
 385 {
 386         int i;
 387         int ret;
 388
 389         for (i = 0; i < mtk->num_phys; i++) {
 390                 ret = phy_power_on(mtk->phys[i]);
 391                 if (ret)
 392                         goto power_off_phy;
 393         }
 394         return 0;
 395
 396 power_off_phy:
 397         for (; i > 0; i--)
 398                 phy_power_off(mtk->phys[i - 1]);
 399
 400         return ret;
 401 }
 402
 403 static void xhci_mtk_phy_power_off(struct xhci_hcd_mtk *mtk)
 404 {
 405         unsigned int i;
 406
 407         for (i = 0; i < mtk->num_phys; i++)
 408                 phy_power_off(mtk->phys[i]);
 409 }
 410
 411 static int xhci_mtk_ldos_enable(struct xhci_hcd_mtk *mtk)
 412 {
 413         int ret;
 414
 415         ret = regulator_enable(mtk->vbus);
 416         if (ret) {
 417                 dev_err(mtk->dev, "failed to enable vbus\n");
 418                 return ret;
 419         }
 420
 421         ret = regulator_enable(mtk->vusb33);
 422         if (ret) {
 423                 dev_err(mtk->dev, "failed to enable vusb33\n");
 424                 regulator_disable(mtk->vbus);
 425                 return ret;
 426         }
 427         return 0;
 428 }
 429
 430 static void xhci_mtk_ldos_disable(struct xhci_hcd_mtk *mtk)
 431 {
 432         regulator_disable(mtk->vbus);
 433         regulator_disable(mtk->vusb33);
 434 }
 435
 436 static void xhci_mtk_quirks(struct device *dev, struct xhci_hcd *xhci)
 437 {
 438         struct usb_hcd *hcd = xhci_to_hcd(xhci);
 439         struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
 440
 441         /*
 442          * As of now platform drivers don't provide MSI support so we ensure
 443          * here that the generic code does not try to make a pci_dev from our
 444          * dev struct in order to setup MSI
 445          */
 446         xhci->quirks |= XHCI_PLAT;
 447         xhci->quirks |= XHCI_MTK_HOST;
 448         /*
 449          * MTK host controller gives a spurious successful event after a
 450          * short transfer. Ignore it.
 451          */
 452         xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
 453         if (mtk->lpm_support)
 454                 xhci->quirks |= XHCI_LPM_SUPPORT;
 455 }
 456
 457 /* called during probe() after chip reset completes */
 458 static int xhci_mtk_setup(struct usb_hcd *hcd)
 459 {
 460         struct xhci_hcd_mtk *mtk = hcd_to_mtk(hcd);
 461         int ret;
 462
 463         if (usb_hcd_is_primary_hcd(hcd)) {
 464                 ret = xhci_mtk_ssusb_config(mtk);
 465                 if (ret)
 466                         return ret;
 467         }
 468
 469         ret = xhci_gen_setup(hcd, xhci_mtk_quirks);
 470         if (ret)
 471                 return ret;
 472
 473         if (usb_hcd_is_primary_hcd(hcd)) {
 474                 ret = xhci_mtk_sch_init(mtk);
 475                 if (ret)
 476                         return ret;
 477         }
 478
 479         return ret;
 480 }
 481
 482 static int xhci_mtk_probe(struct platform_device *pdev)
 483 {
 484         struct device *dev = &pdev->dev;
 485         struct device_node *node = dev->of_node;
 486         struct xhci_hcd_mtk *mtk;
 487         const struct hc_driver *driver;
 488         struct xhci_hcd *xhci;
 489         struct resource *res;
 490         struct usb_hcd *hcd;
 491         struct phy *phy;
 492         int phy_num;
 493         int ret = -ENODEV;
 494         int irq;
 495
 496         if (usb_disabled())
 497                 return -ENODEV;
 498
 499         driver = &xhci_mtk_hc_driver;
 500         mtk = devm_kzalloc(dev, sizeof(*mtk), GFP_KERNEL);
 501         if (!mtk)
 502                 return -ENOMEM;
 503
 504         mtk->dev = dev;
 505         mtk->vbus = devm_regulator_get(dev, "vbus");
 506         if (IS_ERR(mtk->vbus)) {
 507                 dev_err(dev, "fail to get vbus\n");
 508                 return PTR_ERR(mtk->vbus);
 509         }
 510
 511         mtk->vusb33 = devm_regulator_get(dev, "vusb33");
 512         if (IS_ERR(mtk->vusb33)) {
 513                 dev_err(dev, "fail to get vusb33\n");
 514                 return PTR_ERR(mtk->vusb33);
 515         }
 516
 517         ret = xhci_mtk_clks_get(mtk);
 518         if (ret)
 519                 return ret;
 520
 521         mtk->lpm_support = of_property_read_bool(node, "usb3-lpm-capable");
 522         /* optional property, ignore the error if it does not exist */
 523         of_property_read_u32(node, "mediatek,u3p-dis-msk",
 524                              &mtk->u3p_dis_msk);
 525
 526         ret = usb_wakeup_of_property_parse(mtk, node);
 527         if (ret) {
 528                 dev_err(dev, "failed to parse uwk property\n");
 529                 return ret;
 530         }
 531
 532         mtk->num_phys = of_count_phandle_with_args(node,
 533                         "phys", "#phy-cells");
 534         if (mtk->num_phys > 0) {
 535                 mtk->phys = devm_kcalloc(dev, mtk->num_phys,
 536                                         sizeof(*mtk->phys), GFP_KERNEL);
 537                 if (!mtk->phys)
 538                         return -ENOMEM;
 539         } else {
 540                 mtk->num_phys = 0;
 541         }
 542         pm_runtime_enable(dev);
 543         pm_runtime_get_sync(dev);
 544         device_enable_async_suspend(dev);
 545
 546         ret = xhci_mtk_ldos_enable(mtk);
 547         if (ret)
 548                 goto disable_pm;
 549
 550         ret = xhci_mtk_clks_enable(mtk);
 551         if (ret)
 552                 goto disable_ldos;
 553
 554         irq = platform_get_irq(pdev, 0);
 555         if (irq < 0) {
 556                 ret = irq;
 557                 goto disable_clk;
 558         }
 559
 560         /* Initialize dma_mask and coherent_dma_mask to 32-bits */
 561         ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
 562         if (ret)
 563                 goto disable_clk;
 564
 565         hcd = usb_create_hcd(driver, dev, dev_name(dev));
 566         if (!hcd) {
 567                 ret = -ENOMEM;
 568                 goto disable_clk;
 569         }
 570
 571         /*
 572          * USB 2.0 roothub is stored in the platform_device.
 573          * Swap it with mtk HCD.
 574          */
 575         mtk->hcd = platform_get_drvdata(pdev);
 576         platform_set_drvdata(pdev, mtk);
 577
 578         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac");
 579         hcd->regs = devm_ioremap_resource(dev, res);
 580         if (IS_ERR(hcd->regs)) {
 581                 ret = PTR_ERR(hcd->regs);
 582                 goto put_usb2_hcd;
 583         }
 584         hcd->rsrc_start = res->start;
 585         hcd->rsrc_len = resource_size(res);
 586
 587         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ippc");
 588         if (res) {      /* ippc register is optional */
 589                 mtk->ippc_regs = devm_ioremap_resource(dev, res);
 590                 if (IS_ERR(mtk->ippc_regs)) {
 591                         ret = PTR_ERR(mtk->ippc_regs);
 592                         goto put_usb2_hcd;
 593                 }
 594                 mtk->has_ippc = true;
 595         } else {
 596                 mtk->has_ippc = false;
 597         }
 598
 599         for (phy_num = 0; phy_num < mtk->num_phys; phy_num++) {
 600                 phy = devm_of_phy_get_by_index(dev, node, phy_num);
 601                 if (IS_ERR(phy)) {
 602                         ret = PTR_ERR(phy);
 603                         goto put_usb2_hcd;
 604                 }
 605                 mtk->phys[phy_num] = phy;
 606         }
 607
 608         ret = xhci_mtk_phy_init(mtk);
 609         if (ret)
 610                 goto put_usb2_hcd;
 611
 612         ret = xhci_mtk_phy_power_on(mtk);
 613         if (ret)
 614                 goto exit_phys;
 615
 616         device_init_wakeup(dev, true);
 617
 618         xhci = hcd_to_xhci(hcd);
 619         xhci->main_hcd = hcd;
 620
 621         /*
 622          * imod_interval is the interrupt moderation value in nanoseconds.
 623          * The increment interval is 8 times as much as that defined in
 624          * the xHCI spec on MTK's controller.
 625          */
 626         xhci->imod_interval = 5000;
 627         device_property_read_u32(dev, "imod-interval-ns", &xhci->imod_interval);
 628
 629         xhci->shared_hcd = usb_create_shared_hcd(driver, dev,
 630                         dev_name(dev), hcd);
 631         if (!xhci->shared_hcd) {
 632                 ret = -ENOMEM;
 633                 goto power_off_phys;
 634         }
 635
 636         ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
 637         if (ret)
 638                 goto put_usb3_hcd;
 639
 640         if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
 641                 xhci->shared_hcd->can_do_streams = 1;
 642
 643         ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED);
 644         if (ret)
 645                 goto dealloc_usb2_hcd;
 646
 647         return 0;
 648
 649 dealloc_usb2_hcd:
 650         usb_remove_hcd(hcd);
 651
 652 put_usb3_hcd:
 653         xhci_mtk_sch_exit(mtk);
 654         usb_put_hcd(xhci->shared_hcd);
 655
 656 power_off_phys:
 657         xhci_mtk_phy_power_off(mtk);
 658         device_init_wakeup(dev, false);
 659
 660 exit_phys:
 661         xhci_mtk_phy_exit(mtk);
 662
 663 put_usb2_hcd:
 664         usb_put_hcd(hcd);
 665
 666 disable_clk:
 667         xhci_mtk_clks_disable(mtk);
 668
 669 disable_ldos:
 670         xhci_mtk_ldos_disable(mtk);
 671
 672 disable_pm:
 673         pm_runtime_put_sync(dev);
 674         pm_runtime_disable(dev);
 675         return ret;
 676 }
 677
 678 static int xhci_mtk_remove(struct platform_device *dev)
 679 {
 680         struct xhci_hcd_mtk *mtk = platform_get_drvdata(dev);
 681         struct usb_hcd  *hcd = mtk->hcd;
 682         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 683
 684         usb_remove_hcd(xhci->shared_hcd);
 685         xhci_mtk_phy_power_off(mtk);
 686         xhci_mtk_phy_exit(mtk);
 687         device_init_wakeup(&dev->dev, false);
 688
 689         usb_remove_hcd(hcd);
 690         usb_put_hcd(xhci->shared_hcd);
 691         usb_put_hcd(hcd);
 692         xhci_mtk_sch_exit(mtk);
 693         xhci_mtk_clks_disable(mtk);
 694         xhci_mtk_ldos_disable(mtk);
 695         pm_runtime_put_sync(&dev->dev);
 696         pm_runtime_disable(&dev->dev);
 697
 698         return 0;
 699 }
 700
 701 /*
 702  * if ip sleep fails, and all clocks are disabled, access register will hang
 703  * AHB bus, so stop polling roothubs to avoid regs access on bus suspend.
 704  * and no need to check whether ip sleep failed or not; this will cause SPM
 705  * to wake up system immediately after system suspend complete if ip sleep
 706  * fails, it is what we wanted.
 707  */
 708 static int __maybe_unused xhci_mtk_suspend(struct device *dev)
 709 {
 710         struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev);
 711         struct usb_hcd *hcd = mtk->hcd;
 712         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 713
 714         xhci_dbg(xhci, "%s: stop port polling\n", __func__);
 715         clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 716         del_timer_sync(&hcd->rh_timer);
 717         clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
 718         del_timer_sync(&xhci->shared_hcd->rh_timer);
 719
 720         xhci_mtk_host_disable(mtk);
 721         xhci_mtk_phy_power_off(mtk);
 722         xhci_mtk_clks_disable(mtk);
 723         usb_wakeup_set(mtk, true);
 724         return 0;
 725 }
 726
 727 static int __maybe_unused xhci_mtk_resume(struct device *dev)
 728 {
 729         struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev);
 730         struct usb_hcd *hcd = mtk->hcd;
 731         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
 732
 733         usb_wakeup_set(mtk, false);
 734         xhci_mtk_clks_enable(mtk);
 735         xhci_mtk_phy_power_on(mtk);
 736         xhci_mtk_host_enable(mtk);
 737
 738         xhci_dbg(xhci, "%s: restart port polling\n", __func__);
 739         set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 740         usb_hcd_poll_rh_status(hcd);
 741         set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags);
 742         usb_hcd_poll_rh_status(xhci->shared_hcd);
 743         return 0;
 744 }
 745
 746 static const struct dev_pm_ops xhci_mtk_pm_ops = {
 747         SET_SYSTEM_SLEEP_PM_OPS(xhci_mtk_suspend, xhci_mtk_resume)
 748 };
 749 #define DEV_PM_OPS IS_ENABLED(CONFIG_PM) ? &xhci_mtk_pm_ops : NULL
 750
 751 #ifdef CONFIG_OF
 752 static const struct of_device_id mtk_xhci_of_match[] = {
 753         { .compatible = "mediatek,mt8173-xhci"},
 754         { .compatible = "mediatek,mtk-xhci"},
 755         { },
 756 };
 757 MODULE_DEVICE_TABLE(of, mtk_xhci_of_match);
 758 #endif
 759
 760 static struct platform_driver mtk_xhci_driver = {
 761         .probe  = xhci_mtk_probe,
 762         .remove = xhci_mtk_remove,
 763         .driver = {
 764                 .name = "xhci-mtk",
 765                 .pm = DEV_PM_OPS,
 766                 .of_match_table = of_match_ptr(mtk_xhci_of_match),
 767         },
 768 };
 769 MODULE_ALIAS("platform:xhci-mtk");
 770
 771 static int __init xhci_mtk_init(void)
 772 {
 773         xhci_init_driver(&xhci_mtk_hc_driver, &xhci_mtk_overrides);
 774         return platform_driver_register(&mtk_xhci_driver);
 775 }
 776 module_init(xhci_mtk_init);
 777
 778 static void __exit xhci_mtk_exit(void)
 779 {
 780         platform_driver_unregister(&mtk_xhci_driver);
 781 }
 782 module_exit(xhci_mtk_exit);
 783
 784 MODULE_AUTHOR("Chunfeng Yun <chunfeng.yun@mediatek.com>");
 785 MODULE_DESCRIPTION("MediaTek xHCI Host Controller Driver");
 786 MODULE_LICENSE("GPL v2");