include/linux/sxgbe_platform.h

   1 /*
   2  * 10G controller driver for Samsung EXYNOS SoCs
   3  *
   4  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * Author: Siva Reddy Kallam <siva.kallam@samsung.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13 #ifndef __SXGBE_PLATFORM_H__
  14 #define __SXGBE_PLATFORM_H__
  15
  16 /* MDC Clock Selection define*/
  17 #define SXGBE_CSR_100_150M      0x0     /* MDC = clk_scr_i/62 */
  18 #define SXGBE_CSR_150_250M      0x1     /* MDC = clk_scr_i/102 */
  19 #define SXGBE_CSR_250_300M      0x2     /* MDC = clk_scr_i/122 */
  20 #define SXGBE_CSR_300_350M      0x3     /* MDC = clk_scr_i/142 */
  21 #define SXGBE_CSR_350_400M      0x4     /* MDC = clk_scr_i/162 */
  22 #define SXGBE_CSR_400_500M      0x5     /* MDC = clk_scr_i/202 */
  23
  24 /* Platfrom data for platform device structure's
  25  * platform_data field
  26  */
  27 struct sxgbe_mdio_bus_data {
  28         unsigned int phy_mask;
  29         int *irqs;
  30         int probed_phy_irq;
  31 };
  32
  33 struct sxgbe_dma_cfg {
  34         int pbl;
  35         int fixed_burst;
  36         int burst_map;
  37         int adv_addr_mode;
  38 };
  39
  40 struct sxgbe_plat_data {
  41         char *phy_bus_name;
  42         int bus_id;
  43         int phy_addr;
  44         int interface;
  45         struct sxgbe_mdio_bus_data *mdio_bus_data;
  46         struct sxgbe_dma_cfg *dma_cfg;
  47         int clk_csr;
  48         int pmt;
  49         int force_sf_dma_mode;
  50         int force_thresh_dma_mode;
  51         int riwt_off;
  52 };
  53
  54 #endif /* __SXGBE_PLATFORM_H__ */