[PATCH] aic7xxx_osm build fix
[cris-mirror.git] / drivers / ide / pci / atiixp.c
blobdf9ee9a784350c2d63ab3ba345d90bd2da25c9cb
1 /*
2 * linux/drivers/ide/pci/atiixp.c Version 0.01-bart2 Feb. 26, 2004
4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
5 * Copyright (C) 2004 Bartlomiej Zolnierkiewicz
7 */
9 #include <linux/config.h>
10 #include <linux/types.h>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/ioport.h>
14 #include <linux/pci.h>
15 #include <linux/hdreg.h>
16 #include <linux/ide.h>
17 #include <linux/delay.h>
18 #include <linux/init.h>
20 #include <asm/io.h>
22 #define ATIIXP_IDE_PIO_TIMING 0x40
23 #define ATIIXP_IDE_MDMA_TIMING 0x44
24 #define ATIIXP_IDE_PIO_CONTROL 0x48
25 #define ATIIXP_IDE_PIO_MODE 0x4a
26 #define ATIIXP_IDE_UDMA_CONTROL 0x54
27 #define ATIIXP_IDE_UDMA_MODE 0x56
29 typedef struct {
30 u8 command_width;
31 u8 recover_width;
32 } atiixp_ide_timing;
34 static atiixp_ide_timing pio_timing[] = {
35 { 0x05, 0x0d },
36 { 0x04, 0x07 },
37 { 0x03, 0x04 },
38 { 0x02, 0x02 },
39 { 0x02, 0x00 },
42 static atiixp_ide_timing mdma_timing[] = {
43 { 0x07, 0x07 },
44 { 0x02, 0x01 },
45 { 0x02, 0x00 },
48 static int save_mdma_mode[4];
50 /**
51 * atiixp_ratemask - compute rate mask for ATIIXP IDE
52 * @drive: IDE drive to compute for
54 * Returns the available modes for the ATIIXP IDE controller.
57 static u8 atiixp_ratemask(ide_drive_t *drive)
59 u8 mode = 3;
61 if (!eighty_ninty_three(drive))
62 mode = min(mode, (u8)1);
63 return mode;
66 /**
67 * atiixp_dma_2_pio - return the PIO mode matching DMA
68 * @xfer_rate: transfer speed
70 * Returns the nearest equivalent PIO timing for the PIO or DMA
71 * mode requested by the controller.
74 static u8 atiixp_dma_2_pio(u8 xfer_rate) {
75 switch(xfer_rate) {
76 case XFER_UDMA_6:
77 case XFER_UDMA_5:
78 case XFER_UDMA_4:
79 case XFER_UDMA_3:
80 case XFER_UDMA_2:
81 case XFER_UDMA_1:
82 case XFER_UDMA_0:
83 case XFER_MW_DMA_2:
84 case XFER_PIO_4:
85 return 4;
86 case XFER_MW_DMA_1:
87 case XFER_PIO_3:
88 return 3;
89 case XFER_SW_DMA_2:
90 case XFER_PIO_2:
91 return 2;
92 case XFER_MW_DMA_0:
93 case XFER_SW_DMA_1:
94 case XFER_SW_DMA_0:
95 case XFER_PIO_1:
96 case XFER_PIO_0:
97 case XFER_PIO_SLOW:
98 default:
99 return 0;
103 static int atiixp_ide_dma_host_on(ide_drive_t *drive)
105 struct pci_dev *dev = drive->hwif->pci_dev;
106 unsigned long flags;
107 u16 tmp16;
109 spin_lock_irqsave(&ide_lock, flags);
111 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
112 if (save_mdma_mode[drive->dn])
113 tmp16 &= ~(1 << drive->dn);
114 else
115 tmp16 |= (1 << drive->dn);
116 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
118 spin_unlock_irqrestore(&ide_lock, flags);
120 return __ide_dma_host_on(drive);
123 static int atiixp_ide_dma_host_off(ide_drive_t *drive)
125 struct pci_dev *dev = drive->hwif->pci_dev;
126 unsigned long flags;
127 u16 tmp16;
129 spin_lock_irqsave(&ide_lock, flags);
131 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
132 tmp16 &= ~(1 << drive->dn);
133 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
135 spin_unlock_irqrestore(&ide_lock, flags);
137 return __ide_dma_host_off(drive);
141 * atiixp_tune_drive - tune a drive attached to a ATIIXP
142 * @drive: drive to tune
143 * @pio: desired PIO mode
145 * Set the interface PIO mode.
148 static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
150 struct pci_dev *dev = drive->hwif->pci_dev;
151 unsigned long flags;
152 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
153 u32 pio_timing_data;
154 u16 pio_mode_data;
156 spin_lock_irqsave(&ide_lock, flags);
158 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
159 pio_mode_data &= ~(0x07 << (drive->dn * 4));
160 pio_mode_data |= (pio << (drive->dn * 4));
161 pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
163 pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
164 pio_timing_data &= ~(0xff << timing_shift);
165 pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
166 (pio_timing[pio].command_width << (timing_shift + 4));
167 pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
169 spin_unlock_irqrestore(&ide_lock, flags);
173 * atiixp_tune_chipset - tune a ATIIXP interface
174 * @drive: IDE drive to tune
175 * @xferspeed: speed to configure
177 * Set a ATIIXP interface channel to the desired speeds. This involves
178 * requires the right timing data into the ATIIXP configuration space
179 * then setting the drive parameters appropriately
182 static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed)
184 struct pci_dev *dev = drive->hwif->pci_dev;
185 unsigned long flags;
186 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
187 u32 tmp32;
188 u16 tmp16;
189 u8 speed, pio;
191 speed = ide_rate_filter(atiixp_ratemask(drive), xferspeed);
193 spin_lock_irqsave(&ide_lock, flags);
195 save_mdma_mode[drive->dn] = 0;
196 if (speed >= XFER_UDMA_0) {
197 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
198 tmp16 &= ~(0x07 << (drive->dn * 4));
199 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
200 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
201 } else {
202 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
203 save_mdma_mode[drive->dn] = speed;
204 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
205 tmp32 &= ~(0xff << timing_shift);
206 tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
207 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
208 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
212 spin_unlock_irqrestore(&ide_lock, flags);
214 if (speed >= XFER_SW_DMA_0)
215 pio = atiixp_dma_2_pio(speed);
216 else
217 pio = speed - XFER_PIO_0;
219 atiixp_tuneproc(drive, pio);
221 return ide_config_drive_speed(drive, speed);
225 * atiixp_config_drive_for_dma - configure drive for DMA
226 * @drive: IDE drive to configure
228 * Set up a ATIIXP interface channel for the best available speed.
229 * We prefer UDMA if it is available and then MWDMA. If DMA is
230 * not available we switch to PIO and return 0.
233 static int atiixp_config_drive_for_dma(ide_drive_t *drive)
235 u8 speed = ide_dma_speed(drive, atiixp_ratemask(drive));
237 /* If no DMA speed was available then disable DMA and use PIO. */
238 if (!speed) {
239 u8 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
240 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
243 (void) atiixp_speedproc(drive, speed);
244 return ide_dma_enable(drive);
248 * atiixp_dma_check - set up an IDE device
249 * @drive: IDE drive to configure
251 * Set up the ATIIXP interface for the best available speed on this
252 * interface, preferring DMA to PIO.
255 static int atiixp_dma_check(ide_drive_t *drive)
257 ide_hwif_t *hwif = HWIF(drive);
258 struct hd_driveid *id = drive->id;
259 u8 tspeed, speed;
261 drive->init_speed = 0;
263 if ((id->capability & 1) && drive->autodma) {
265 if (ide_use_dma(drive)) {
266 if (atiixp_config_drive_for_dma(drive))
267 return hwif->ide_dma_on(drive);
270 goto fast_ata_pio;
272 } else if ((id->capability & 8) || (id->field_valid & 2)) {
273 fast_ata_pio:
274 tspeed = ide_get_best_pio_mode(drive, 255, 5, NULL);
275 speed = atiixp_dma_2_pio(XFER_PIO_0 + tspeed) + XFER_PIO_0;
276 hwif->speedproc(drive, speed);
277 return hwif->ide_dma_off_quietly(drive);
279 /* IORDY not supported */
280 return 0;
284 * init_hwif_atiixp - fill in the hwif for the ATIIXP
285 * @hwif: IDE interface
287 * Set up the ide_hwif_t for the ATIIXP interface according to the
288 * capabilities of the hardware.
291 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
293 if (!hwif->irq)
294 hwif->irq = hwif->channel ? 15 : 14;
296 hwif->autodma = 0;
297 hwif->tuneproc = &atiixp_tuneproc;
298 hwif->speedproc = &atiixp_speedproc;
299 hwif->drives[0].autotune = 1;
300 hwif->drives[1].autotune = 1;
302 if (!hwif->dma_base)
303 return;
305 hwif->atapi_dma = 1;
306 hwif->ultra_mask = 0x3f;
307 hwif->mwdma_mask = 0x06;
308 hwif->swdma_mask = 0x04;
310 /* FIXME: proper cable detection needed */
311 hwif->udma_four = 1;
312 hwif->ide_dma_host_on = &atiixp_ide_dma_host_on;
313 hwif->ide_dma_host_off = &atiixp_ide_dma_host_off;
314 hwif->ide_dma_check = &atiixp_dma_check;
315 if (!noautodma)
316 hwif->autodma = 1;
318 hwif->drives[1].autodma = hwif->autodma;
319 hwif->drives[0].autodma = hwif->autodma;
322 static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
323 { /* 0 */
324 .name = "ATIIXP",
325 .init_hwif = init_hwif_atiixp,
326 .channels = 2,
327 .autodma = AUTODMA,
328 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
329 .bootable = ON_BOARD,
334 * atiixp_init_one - called when a ATIIXP is found
335 * @dev: the atiixp device
336 * @id: the matching pci id
338 * Called when the PCI registration layer (or the IDE initialization)
339 * finds a device matching our IDE device tables.
342 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
344 return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
347 static struct pci_device_id atiixp_pci_tbl[] = {
348 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
349 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
350 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
351 { 0, },
353 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
355 static struct pci_driver driver = {
356 .name = "ATIIXP_IDE",
357 .id_table = atiixp_pci_tbl,
358 .probe = atiixp_init_one,
361 static int atiixp_ide_init(void)
363 return ide_pci_register_driver(&driver);
366 module_init(atiixp_ide_init);
368 MODULE_AUTHOR("HUI YU");
369 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
370 MODULE_LICENSE("GPL");