[PATCH] aic7xxx_osm build fix
[cris-mirror.git] / drivers / pci / pci-sysfs.c
blob6ca0061137a6937891fb1757699e010abec9d688
1 /*
2 * drivers/pci/pci-sysfs.c
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
11 * File attributes for PCI devices
13 * Modeled after usb's driverfs.c
18 #include <linux/config.h>
19 #include <linux/kernel.h>
20 #include <linux/pci.h>
21 #include <linux/stat.h>
22 #include <linux/topology.h>
23 #include <linux/mm.h>
25 #include "pci.h"
27 static int sysfs_initialized; /* = 0 */
29 /* show configuration fields */
30 #define pci_config_attr(field, format_string) \
31 static ssize_t \
32 field##_show(struct device *dev, char *buf) \
33 { \
34 struct pci_dev *pdev; \
36 pdev = to_pci_dev (dev); \
37 return sprintf (buf, format_string, pdev->field); \
40 pci_config_attr(vendor, "0x%04x\n");
41 pci_config_attr(device, "0x%04x\n");
42 pci_config_attr(subsystem_vendor, "0x%04x\n");
43 pci_config_attr(subsystem_device, "0x%04x\n");
44 pci_config_attr(class, "0x%06x\n");
45 pci_config_attr(irq, "%u\n");
47 static ssize_t local_cpus_show(struct device *dev, char *buf)
49 cpumask_t mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
50 int len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
51 strcat(buf,"\n");
52 return 1+len;
55 /* show resources */
56 static ssize_t
57 resource_show(struct device * dev, char * buf)
59 struct pci_dev * pci_dev = to_pci_dev(dev);
60 char * str = buf;
61 int i;
62 int max = 7;
64 if (pci_dev->subordinate)
65 max = DEVICE_COUNT_RESOURCE;
67 for (i = 0; i < max; i++) {
68 str += sprintf(str,"0x%016lx 0x%016lx 0x%016lx\n",
69 pci_resource_start(pci_dev,i),
70 pci_resource_end(pci_dev,i),
71 pci_resource_flags(pci_dev,i));
73 return (str - buf);
76 static ssize_t modalias_show(struct device *dev, char *buf)
78 struct pci_dev *pci_dev = to_pci_dev(dev);
80 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
81 pci_dev->vendor, pci_dev->device,
82 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
83 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
84 (u8)(pci_dev->class));
87 struct device_attribute pci_dev_attrs[] = {
88 __ATTR_RO(resource),
89 __ATTR_RO(vendor),
90 __ATTR_RO(device),
91 __ATTR_RO(subsystem_vendor),
92 __ATTR_RO(subsystem_device),
93 __ATTR_RO(class),
94 __ATTR_RO(irq),
95 __ATTR_RO(local_cpus),
96 __ATTR_RO(modalias),
97 __ATTR_NULL,
100 static ssize_t
101 pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
103 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
104 unsigned int size = 64;
105 loff_t init_off = off;
106 u8 *data = (u8*) buf;
108 /* Several chips lock up trying to read undefined config space */
109 if (capable(CAP_SYS_ADMIN)) {
110 size = dev->cfg_size;
111 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
112 size = 128;
115 if (off > size)
116 return 0;
117 if (off + count > size) {
118 size -= off;
119 count = size;
120 } else {
121 size = count;
124 if ((off & 1) && size) {
125 u8 val;
126 pci_read_config_byte(dev, off, &val);
127 data[off - init_off] = val;
128 off++;
129 size--;
132 if ((off & 3) && size > 2) {
133 u16 val;
134 pci_read_config_word(dev, off, &val);
135 data[off - init_off] = val & 0xff;
136 data[off - init_off + 1] = (val >> 8) & 0xff;
137 off += 2;
138 size -= 2;
141 while (size > 3) {
142 u32 val;
143 pci_read_config_dword(dev, off, &val);
144 data[off - init_off] = val & 0xff;
145 data[off - init_off + 1] = (val >> 8) & 0xff;
146 data[off - init_off + 2] = (val >> 16) & 0xff;
147 data[off - init_off + 3] = (val >> 24) & 0xff;
148 off += 4;
149 size -= 4;
152 if (size >= 2) {
153 u16 val;
154 pci_read_config_word(dev, off, &val);
155 data[off - init_off] = val & 0xff;
156 data[off - init_off + 1] = (val >> 8) & 0xff;
157 off += 2;
158 size -= 2;
161 if (size > 0) {
162 u8 val;
163 pci_read_config_byte(dev, off, &val);
164 data[off - init_off] = val;
165 off++;
166 --size;
169 return count;
172 static ssize_t
173 pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
175 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
176 unsigned int size = count;
177 loff_t init_off = off;
178 u8 *data = (u8*) buf;
180 if (off > dev->cfg_size)
181 return 0;
182 if (off + count > dev->cfg_size) {
183 size = dev->cfg_size - off;
184 count = size;
187 if ((off & 1) && size) {
188 pci_write_config_byte(dev, off, data[off - init_off]);
189 off++;
190 size--;
193 if ((off & 3) && size > 2) {
194 u16 val = data[off - init_off];
195 val |= (u16) data[off - init_off + 1] << 8;
196 pci_write_config_word(dev, off, val);
197 off += 2;
198 size -= 2;
201 while (size > 3) {
202 u32 val = data[off - init_off];
203 val |= (u32) data[off - init_off + 1] << 8;
204 val |= (u32) data[off - init_off + 2] << 16;
205 val |= (u32) data[off - init_off + 3] << 24;
206 pci_write_config_dword(dev, off, val);
207 off += 4;
208 size -= 4;
211 if (size >= 2) {
212 u16 val = data[off - init_off];
213 val |= (u16) data[off - init_off + 1] << 8;
214 pci_write_config_word(dev, off, val);
215 off += 2;
216 size -= 2;
219 if (size) {
220 pci_write_config_byte(dev, off, data[off - init_off]);
221 off++;
222 --size;
225 return count;
228 #ifdef HAVE_PCI_LEGACY
230 * pci_read_legacy_io - read byte(s) from legacy I/O port space
231 * @kobj: kobject corresponding to file to read from
232 * @buf: buffer to store results
233 * @off: offset into legacy I/O port space
234 * @count: number of bytes to read
236 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
237 * callback routine (pci_legacy_read).
239 ssize_t
240 pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
242 struct pci_bus *bus = to_pci_bus(container_of(kobj,
243 struct class_device,
244 kobj));
246 /* Only support 1, 2 or 4 byte accesses */
247 if (count != 1 && count != 2 && count != 4)
248 return -EINVAL;
250 return pci_legacy_read(bus, off, (u32 *)buf, count);
254 * pci_write_legacy_io - write byte(s) to legacy I/O port space
255 * @kobj: kobject corresponding to file to read from
256 * @buf: buffer containing value to be written
257 * @off: offset into legacy I/O port space
258 * @count: number of bytes to write
260 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
261 * callback routine (pci_legacy_write).
263 ssize_t
264 pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
266 struct pci_bus *bus = to_pci_bus(container_of(kobj,
267 struct class_device,
268 kobj));
269 /* Only support 1, 2 or 4 byte accesses */
270 if (count != 1 && count != 2 && count != 4)
271 return -EINVAL;
273 return pci_legacy_write(bus, off, *(u32 *)buf, count);
277 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
278 * @kobj: kobject corresponding to device to be mapped
279 * @attr: struct bin_attribute for this file
280 * @vma: struct vm_area_struct passed to mmap
282 * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
283 * legacy memory space (first meg of bus space) into application virtual
284 * memory space.
287 pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
288 struct vm_area_struct *vma)
290 struct pci_bus *bus = to_pci_bus(container_of(kobj,
291 struct class_device,
292 kobj));
294 return pci_mmap_legacy_page_range(bus, vma);
296 #endif /* HAVE_PCI_LEGACY */
298 #ifdef HAVE_PCI_MMAP
300 * pci_mmap_resource - map a PCI resource into user memory space
301 * @kobj: kobject for mapping
302 * @attr: struct bin_attribute for the file being mapped
303 * @vma: struct vm_area_struct passed into the mmap
305 * Use the regular PCI mapping routines to map a PCI resource into userspace.
306 * FIXME: write combining? maybe automatic for prefetchable regions?
308 static int
309 pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
310 struct vm_area_struct *vma)
312 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
313 struct device, kobj));
314 struct resource *res = (struct resource *)attr->private;
315 enum pci_mmap_state mmap_type;
317 vma->vm_pgoff += res->start >> PAGE_SHIFT;
318 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
320 return pci_mmap_page_range(pdev, vma, mmap_type, 0);
324 * pci_create_resource_files - create resource files in sysfs for @dev
325 * @dev: dev in question
327 * Walk the resources in @dev creating files for each resource available.
329 static void
330 pci_create_resource_files(struct pci_dev *pdev)
332 int i;
334 /* Expose the PCI resources from this device as files */
335 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
336 struct bin_attribute *res_attr;
338 /* skip empty resources */
339 if (!pci_resource_len(pdev, i))
340 continue;
342 res_attr = kmalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
343 if (res_attr) {
344 memset(res_attr, 0, sizeof(*res_attr) + 10);
345 pdev->res_attr[i] = res_attr;
346 /* Allocated above after the res_attr struct */
347 res_attr->attr.name = (char *)(res_attr + 1);
348 sprintf(res_attr->attr.name, "resource%d", i);
349 res_attr->size = pci_resource_len(pdev, i);
350 res_attr->attr.mode = S_IRUSR | S_IWUSR;
351 res_attr->attr.owner = THIS_MODULE;
352 res_attr->mmap = pci_mmap_resource;
353 res_attr->private = &pdev->resource[i];
354 sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
360 * pci_remove_resource_files - cleanup resource files
361 * @dev: dev to cleanup
363 * If we created resource files for @dev, remove them from sysfs and
364 * free their resources.
366 static void
367 pci_remove_resource_files(struct pci_dev *pdev)
369 int i;
371 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
372 struct bin_attribute *res_attr;
374 res_attr = pdev->res_attr[i];
375 if (res_attr) {
376 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
377 kfree(res_attr);
381 #else /* !HAVE_PCI_MMAP */
382 static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
383 static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
384 #endif /* HAVE_PCI_MMAP */
387 * pci_write_rom - used to enable access to the PCI ROM display
388 * @kobj: kernel object handle
389 * @buf: user input
390 * @off: file offset
391 * @count: number of byte in input
393 * writing anything except 0 enables it
395 static ssize_t
396 pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
398 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
400 if ((off == 0) && (*buf == '0') && (count == 2))
401 pdev->rom_attr_enabled = 0;
402 else
403 pdev->rom_attr_enabled = 1;
405 return count;
409 * pci_read_rom - read a PCI ROM
410 * @kobj: kernel object handle
411 * @buf: where to put the data we read from the ROM
412 * @off: file offset
413 * @count: number of bytes to read
415 * Put @count bytes starting at @off into @buf from the ROM in the PCI
416 * device corresponding to @kobj.
418 static ssize_t
419 pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
421 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
422 void __iomem *rom;
423 size_t size;
425 if (!pdev->rom_attr_enabled)
426 return -EINVAL;
428 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
429 if (!rom)
430 return 0;
432 if (off >= size)
433 count = 0;
434 else {
435 if (off + count > size)
436 count = size - off;
438 memcpy_fromio(buf, rom + off, count);
440 pci_unmap_rom(pdev, rom);
442 return count;
445 static struct bin_attribute pci_config_attr = {
446 .attr = {
447 .name = "config",
448 .mode = S_IRUGO | S_IWUSR,
449 .owner = THIS_MODULE,
451 .size = 256,
452 .read = pci_read_config,
453 .write = pci_write_config,
456 static struct bin_attribute pcie_config_attr = {
457 .attr = {
458 .name = "config",
459 .mode = S_IRUGO | S_IWUSR,
460 .owner = THIS_MODULE,
462 .size = 4096,
463 .read = pci_read_config,
464 .write = pci_write_config,
467 int pci_create_sysfs_dev_files (struct pci_dev *pdev)
469 if (!sysfs_initialized)
470 return -EACCES;
472 if (pdev->cfg_size < 4096)
473 sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
474 else
475 sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
477 pci_create_resource_files(pdev);
479 /* If the device has a ROM, try to expose it in sysfs. */
480 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
481 struct bin_attribute *rom_attr;
483 rom_attr = kmalloc(sizeof(*rom_attr), GFP_ATOMIC);
484 if (rom_attr) {
485 memset(rom_attr, 0x00, sizeof(*rom_attr));
486 pdev->rom_attr = rom_attr;
487 rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
488 rom_attr->attr.name = "rom";
489 rom_attr->attr.mode = S_IRUSR;
490 rom_attr->attr.owner = THIS_MODULE;
491 rom_attr->read = pci_read_rom;
492 rom_attr->write = pci_write_rom;
493 sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
496 /* add platform-specific attributes */
497 pcibios_add_platform_entries(pdev);
499 return 0;
503 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
504 * @pdev: device whose entries we should free
506 * Cleanup when @pdev is removed from sysfs.
508 void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
510 if (pdev->cfg_size < 4096)
511 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
512 else
513 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
515 pci_remove_resource_files(pdev);
517 if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
518 if (pdev->rom_attr) {
519 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
520 kfree(pdev->rom_attr);
525 static int __init pci_sysfs_init(void)
527 struct pci_dev *pdev = NULL;
529 sysfs_initialized = 1;
530 for_each_pci_dev(pdev)
531 pci_create_sysfs_dev_files(pdev);
533 return 0;
536 __initcall(pci_sysfs_init);