[PATCH] aic7xxx_osm build fix
[cris-mirror.git] / drivers / pci / proc.c
blobe68bbfb1e7c318d0c34c11e3c76774ae17f3c60a
1 /*
2 * $Id: proc.c,v 1.13 1998/05/12 07:36:07 mj Exp $
4 * Procfs interface for the PCI bus.
6 * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz>
7 */
9 #include <linux/init.h>
10 #include <linux/pci.h>
11 #include <linux/module.h>
12 #include <linux/proc_fs.h>
13 #include <linux/seq_file.h>
14 #include <linux/smp_lock.h>
16 #include <asm/uaccess.h>
17 #include <asm/byteorder.h>
18 #include "pci.h"
20 static int proc_initialized; /* = 0 */
22 static loff_t
23 proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
25 loff_t new = -1;
26 struct inode *inode = file->f_dentry->d_inode;
28 down(&inode->i_sem);
29 switch (whence) {
30 case 0:
31 new = off;
32 break;
33 case 1:
34 new = file->f_pos + off;
35 break;
36 case 2:
37 new = inode->i_size + off;
38 break;
40 if (new < 0 || new > inode->i_size)
41 new = -EINVAL;
42 else
43 file->f_pos = new;
44 up(&inode->i_sem);
45 return new;
48 static ssize_t
49 proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
51 const struct inode *ino = file->f_dentry->d_inode;
52 const struct proc_dir_entry *dp = PDE(ino);
53 struct pci_dev *dev = dp->data;
54 unsigned int pos = *ppos;
55 unsigned int cnt, size;
58 * Normal users can read only the standardized portion of the
59 * configuration space as several chips lock up when trying to read
60 * undefined locations (think of Intel PIIX4 as a typical example).
63 if (capable(CAP_SYS_ADMIN))
64 size = dev->cfg_size;
65 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
66 size = 128;
67 else
68 size = 64;
70 if (pos >= size)
71 return 0;
72 if (nbytes >= size)
73 nbytes = size;
74 if (pos + nbytes > size)
75 nbytes = size - pos;
76 cnt = nbytes;
78 if (!access_ok(VERIFY_WRITE, buf, cnt))
79 return -EINVAL;
81 if ((pos & 1) && cnt) {
82 unsigned char val;
83 pci_read_config_byte(dev, pos, &val);
84 __put_user(val, buf);
85 buf++;
86 pos++;
87 cnt--;
90 if ((pos & 3) && cnt > 2) {
91 unsigned short val;
92 pci_read_config_word(dev, pos, &val);
93 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
94 buf += 2;
95 pos += 2;
96 cnt -= 2;
99 while (cnt >= 4) {
100 unsigned int val;
101 pci_read_config_dword(dev, pos, &val);
102 __put_user(cpu_to_le32(val), (unsigned int __user *) buf);
103 buf += 4;
104 pos += 4;
105 cnt -= 4;
108 if (cnt >= 2) {
109 unsigned short val;
110 pci_read_config_word(dev, pos, &val);
111 __put_user(cpu_to_le16(val), (unsigned short __user *) buf);
112 buf += 2;
113 pos += 2;
114 cnt -= 2;
117 if (cnt) {
118 unsigned char val;
119 pci_read_config_byte(dev, pos, &val);
120 __put_user(val, buf);
121 buf++;
122 pos++;
123 cnt--;
126 *ppos = pos;
127 return nbytes;
130 static ssize_t
131 proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
133 const struct inode *ino = file->f_dentry->d_inode;
134 const struct proc_dir_entry *dp = PDE(ino);
135 struct pci_dev *dev = dp->data;
136 int pos = *ppos;
137 int size = dev->cfg_size;
138 int cnt;
140 if (pos >= size)
141 return 0;
142 if (nbytes >= size)
143 nbytes = size;
144 if (pos + nbytes > size)
145 nbytes = size - pos;
146 cnt = nbytes;
148 if (!access_ok(VERIFY_READ, buf, cnt))
149 return -EINVAL;
151 if ((pos & 1) && cnt) {
152 unsigned char val;
153 __get_user(val, buf);
154 pci_write_config_byte(dev, pos, val);
155 buf++;
156 pos++;
157 cnt--;
160 if ((pos & 3) && cnt > 2) {
161 unsigned short val;
162 __get_user(val, (unsigned short __user *) buf);
163 pci_write_config_word(dev, pos, le16_to_cpu(val));
164 buf += 2;
165 pos += 2;
166 cnt -= 2;
169 while (cnt >= 4) {
170 unsigned int val;
171 __get_user(val, (unsigned int __user *) buf);
172 pci_write_config_dword(dev, pos, le32_to_cpu(val));
173 buf += 4;
174 pos += 4;
175 cnt -= 4;
178 if (cnt >= 2) {
179 unsigned short val;
180 __get_user(val, (unsigned short __user *) buf);
181 pci_write_config_word(dev, pos, le16_to_cpu(val));
182 buf += 2;
183 pos += 2;
184 cnt -= 2;
187 if (cnt) {
188 unsigned char val;
189 __get_user(val, buf);
190 pci_write_config_byte(dev, pos, val);
191 buf++;
192 pos++;
193 cnt--;
196 *ppos = pos;
197 return nbytes;
200 struct pci_filp_private {
201 enum pci_mmap_state mmap_state;
202 int write_combine;
205 static int proc_bus_pci_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
207 const struct proc_dir_entry *dp = PDE(inode);
208 struct pci_dev *dev = dp->data;
209 #ifdef HAVE_PCI_MMAP
210 struct pci_filp_private *fpriv = file->private_data;
211 #endif /* HAVE_PCI_MMAP */
212 int ret = 0;
214 switch (cmd) {
215 case PCIIOC_CONTROLLER:
216 ret = pci_domain_nr(dev->bus);
217 break;
219 #ifdef HAVE_PCI_MMAP
220 case PCIIOC_MMAP_IS_IO:
221 fpriv->mmap_state = pci_mmap_io;
222 break;
224 case PCIIOC_MMAP_IS_MEM:
225 fpriv->mmap_state = pci_mmap_mem;
226 break;
228 case PCIIOC_WRITE_COMBINE:
229 if (arg)
230 fpriv->write_combine = 1;
231 else
232 fpriv->write_combine = 0;
233 break;
235 #endif /* HAVE_PCI_MMAP */
237 default:
238 ret = -EINVAL;
239 break;
242 return ret;
245 #ifdef HAVE_PCI_MMAP
246 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
248 struct inode *inode = file->f_dentry->d_inode;
249 const struct proc_dir_entry *dp = PDE(inode);
250 struct pci_dev *dev = dp->data;
251 struct pci_filp_private *fpriv = file->private_data;
252 int ret;
254 if (!capable(CAP_SYS_RAWIO))
255 return -EPERM;
257 ret = pci_mmap_page_range(dev, vma,
258 fpriv->mmap_state,
259 fpriv->write_combine);
260 if (ret < 0)
261 return ret;
263 return 0;
266 static int proc_bus_pci_open(struct inode *inode, struct file *file)
268 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
270 if (!fpriv)
271 return -ENOMEM;
273 fpriv->mmap_state = pci_mmap_io;
274 fpriv->write_combine = 0;
276 file->private_data = fpriv;
278 return 0;
281 static int proc_bus_pci_release(struct inode *inode, struct file *file)
283 kfree(file->private_data);
284 file->private_data = NULL;
286 return 0;
288 #endif /* HAVE_PCI_MMAP */
290 static struct file_operations proc_bus_pci_operations = {
291 .llseek = proc_bus_pci_lseek,
292 .read = proc_bus_pci_read,
293 .write = proc_bus_pci_write,
294 .ioctl = proc_bus_pci_ioctl,
295 #ifdef HAVE_PCI_MMAP
296 .open = proc_bus_pci_open,
297 .release = proc_bus_pci_release,
298 .mmap = proc_bus_pci_mmap,
299 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
300 .get_unmapped_area = get_pci_unmapped_area,
301 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
302 #endif /* HAVE_PCI_MMAP */
305 #if BITS_PER_LONG == 32
306 #define LONG_FORMAT "\t%08lx"
307 #else
308 #define LONG_FORMAT "\t%16lx"
309 #endif
311 /* iterator */
312 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
314 struct pci_dev *dev = NULL;
315 loff_t n = *pos;
317 for_each_pci_dev(dev) {
318 if (!n--)
319 break;
321 return dev;
324 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
326 struct pci_dev *dev = v;
328 (*pos)++;
329 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
330 return dev;
333 static void pci_seq_stop(struct seq_file *m, void *v)
335 if (v) {
336 struct pci_dev *dev = v;
337 pci_dev_put(dev);
341 static int show_device(struct seq_file *m, void *v)
343 const struct pci_dev *dev = v;
344 const struct pci_driver *drv;
345 int i;
347 if (dev == NULL)
348 return 0;
350 drv = pci_dev_driver(dev);
351 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
352 dev->bus->number,
353 dev->devfn,
354 dev->vendor,
355 dev->device,
356 dev->irq);
357 /* Here should be 7 and not PCI_NUM_RESOURCES as we need to preserve compatibility */
358 for(i=0; i<7; i++)
359 seq_printf(m, LONG_FORMAT,
360 dev->resource[i].start |
361 (dev->resource[i].flags & PCI_REGION_FLAG_MASK));
362 for(i=0; i<7; i++)
363 seq_printf(m, LONG_FORMAT,
364 dev->resource[i].start < dev->resource[i].end ?
365 dev->resource[i].end - dev->resource[i].start + 1 : 0);
366 seq_putc(m, '\t');
367 if (drv)
368 seq_printf(m, "%s", drv->name);
369 seq_putc(m, '\n');
370 return 0;
373 static struct seq_operations proc_bus_pci_devices_op = {
374 .start = pci_seq_start,
375 .next = pci_seq_next,
376 .stop = pci_seq_stop,
377 .show = show_device
380 static struct proc_dir_entry *proc_bus_pci_dir;
382 int pci_proc_attach_device(struct pci_dev *dev)
384 struct pci_bus *bus = dev->bus;
385 struct proc_dir_entry *e;
386 char name[16];
388 if (!proc_initialized)
389 return -EACCES;
391 if (!bus->procdir) {
392 if (pci_proc_domain(bus)) {
393 sprintf(name, "%04x:%02x", pci_domain_nr(bus),
394 bus->number);
395 } else {
396 sprintf(name, "%02x", bus->number);
398 bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
399 if (!bus->procdir)
400 return -ENOMEM;
403 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
404 e = create_proc_entry(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir);
405 if (!e)
406 return -ENOMEM;
407 e->proc_fops = &proc_bus_pci_operations;
408 e->data = dev;
409 e->size = dev->cfg_size;
410 dev->procent = e;
412 return 0;
415 int pci_proc_detach_device(struct pci_dev *dev)
417 struct proc_dir_entry *e;
419 if ((e = dev->procent)) {
420 if (atomic_read(&e->count))
421 return -EBUSY;
422 remove_proc_entry(e->name, dev->bus->procdir);
423 dev->procent = NULL;
425 return 0;
428 int pci_proc_attach_bus(struct pci_bus* bus)
430 struct proc_dir_entry *de = bus->procdir;
432 if (!proc_initialized)
433 return -EACCES;
435 if (!de) {
436 char name[16];
437 sprintf(name, "%02x", bus->number);
438 de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
439 if (!de)
440 return -ENOMEM;
442 return 0;
445 int pci_proc_detach_bus(struct pci_bus* bus)
447 struct proc_dir_entry *de = bus->procdir;
448 if (de)
449 remove_proc_entry(de->name, proc_bus_pci_dir);
450 return 0;
453 #ifdef CONFIG_PCI_LEGACY_PROC
456 * Backward compatible /proc/pci interface.
460 * Convert some of the configuration space registers of the device at
461 * address (bus,devfn) into a string (possibly several lines each).
462 * The configuration string is stored starting at buf[len]. If the
463 * string would exceed the size of the buffer (SIZE), 0 is returned.
465 static int show_dev_config(struct seq_file *m, void *v)
467 struct pci_dev *dev = v;
468 struct pci_dev *first_dev;
469 struct pci_driver *drv;
470 u32 class_rev;
471 unsigned char latency, min_gnt, max_lat, *class;
472 int reg;
474 first_dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL);
475 if (dev == first_dev)
476 seq_puts(m, "PCI devices found:\n");
477 pci_dev_put(first_dev);
479 drv = pci_dev_driver(dev);
481 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
482 pci_read_config_byte (dev, PCI_LATENCY_TIMER, &latency);
483 pci_read_config_byte (dev, PCI_MIN_GNT, &min_gnt);
484 pci_read_config_byte (dev, PCI_MAX_LAT, &max_lat);
485 seq_printf(m, " Bus %2d, device %3d, function %2d:\n",
486 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
487 class = pci_class_name(class_rev >> 16);
488 if (class)
489 seq_printf(m, " %s", class);
490 else
491 seq_printf(m, " Class %04x", class_rev >> 16);
492 #ifdef CONFIG_PCI_NAMES
493 seq_printf(m, ": %s", dev->pretty_name);
494 #else
495 seq_printf(m, ": PCI device %04x:%04x", dev->vendor, dev->device);
496 #endif
497 seq_printf(m, " (rev %d).\n", class_rev & 0xff);
499 if (dev->irq)
500 seq_printf(m, " IRQ %d.\n", dev->irq);
502 if (latency || min_gnt || max_lat) {
503 seq_printf(m, " Master Capable. ");
504 if (latency)
505 seq_printf(m, "Latency=%d. ", latency);
506 else
507 seq_puts(m, "No bursts. ");
508 if (min_gnt)
509 seq_printf(m, "Min Gnt=%d.", min_gnt);
510 if (max_lat)
511 seq_printf(m, "Max Lat=%d.", max_lat);
512 seq_putc(m, '\n');
515 for (reg = 0; reg < 6; reg++) {
516 struct resource *res = dev->resource + reg;
517 unsigned long base, end, flags;
519 base = res->start;
520 end = res->end;
521 flags = res->flags;
522 if (!end)
523 continue;
525 if (flags & PCI_BASE_ADDRESS_SPACE_IO) {
526 seq_printf(m, " I/O at 0x%lx [0x%lx].\n",
527 base, end);
528 } else {
529 const char *pref, *type = "unknown";
531 if (flags & PCI_BASE_ADDRESS_MEM_PREFETCH)
532 pref = "P";
533 else
534 pref = "Non-p";
535 switch (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) {
536 case PCI_BASE_ADDRESS_MEM_TYPE_32:
537 type = "32 bit"; break;
538 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
539 type = "20 bit"; break;
540 case PCI_BASE_ADDRESS_MEM_TYPE_64:
541 type = "64 bit"; break;
543 seq_printf(m, " %srefetchable %s memory at "
544 "0x%lx [0x%lx].\n", pref, type,
545 base,
546 end);
549 return 0;
552 static struct seq_operations proc_pci_op = {
553 .start = pci_seq_start,
554 .next = pci_seq_next,
555 .stop = pci_seq_stop,
556 .show = show_dev_config
559 static int proc_pci_open(struct inode *inode, struct file *file)
561 return seq_open(file, &proc_pci_op);
563 static struct file_operations proc_pci_operations = {
564 .open = proc_pci_open,
565 .read = seq_read,
566 .llseek = seq_lseek,
567 .release = seq_release,
570 static void legacy_proc_init(void)
572 struct proc_dir_entry * entry = create_proc_entry("pci", 0, NULL);
573 if (entry)
574 entry->proc_fops = &proc_pci_operations;
577 #else
579 static void legacy_proc_init(void)
584 #endif /* CONFIG_PCI_LEGACY_PROC */
586 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
588 return seq_open(file, &proc_bus_pci_devices_op);
590 static struct file_operations proc_bus_pci_dev_operations = {
591 .open = proc_bus_pci_dev_open,
592 .read = seq_read,
593 .llseek = seq_lseek,
594 .release = seq_release,
597 static int __init pci_proc_init(void)
599 struct proc_dir_entry *entry;
600 struct pci_dev *dev = NULL;
601 proc_bus_pci_dir = proc_mkdir("pci", proc_bus);
602 entry = create_proc_entry("devices", 0, proc_bus_pci_dir);
603 if (entry)
604 entry->proc_fops = &proc_bus_pci_dev_operations;
605 proc_initialized = 1;
606 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
607 pci_proc_attach_device(dev);
609 legacy_proc_init();
610 return 0;
613 __initcall(pci_proc_init);
615 #ifdef CONFIG_HOTPLUG
616 EXPORT_SYMBOL(pci_proc_attach_device);
617 EXPORT_SYMBOL(pci_proc_attach_bus);
618 EXPORT_SYMBOL(pci_proc_detach_bus);
619 #endif