2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
22 #include <linux/config.h>
24 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/ioport.h>
31 #include <linux/init.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/mca.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/tty.h>
38 #include <linux/tty_flip.h>
39 #include <linux/serial_reg.h>
40 #include <linux/serial_core.h>
41 #include <linux/serial.h>
42 #include <linux/serial_8250.h>
51 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
52 * is unsafe when used on edge-triggered interrupts.
54 static unsigned int share_irqs
= SERIAL8250_SHARE_IRQS
;
60 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
62 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
66 #define DEBUG_INTR(fmt...) printk(fmt)
68 #define DEBUG_INTR(fmt...) do { } while (0)
71 #define PASS_LIMIT 256
74 * We default to IRQ0 for the "no irq" hack. Some
75 * machine types want others as well - they're free
76 * to redefine this in their header file.
78 #define is_real_interrupt(irq) ((irq) != 0)
81 * This converts from our new CONFIG_ symbols to the symbols
82 * that asm/serial.h expects. You _NEED_ to comment out the
83 * linux/config.h include contained inside asm/serial.h for
86 #undef CONFIG_SERIAL_MANY_PORTS
87 #undef CONFIG_SERIAL_DETECT_IRQ
88 #undef CONFIG_SERIAL_MULTIPORT
91 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
92 #define CONFIG_SERIAL_DETECT_IRQ 1
94 #ifdef CONFIG_SERIAL_8250_MULTIPORT
95 #define CONFIG_SERIAL_MULTIPORT 1
97 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
98 #define CONFIG_SERIAL_MANY_PORTS 1
102 * HUB6 is always on. This will be removed once the header
103 * files have been cleaned.
105 #define CONFIG_HUB6 1
107 #include <asm/serial.h>
110 * SERIAL_PORT_DFNS tells us about built-in ports that have no
111 * standard enumeration mechanism. Platforms that can find all
112 * serial ports via mechanisms like ACPI or PCI need not supply it.
114 #ifndef SERIAL_PORT_DFNS
115 #define SERIAL_PORT_DFNS
118 static struct old_serial_port old_serial_port
[] = {
119 SERIAL_PORT_DFNS
/* defined in asm/serial.h */
122 #define UART_NR (ARRAY_SIZE(old_serial_port) + CONFIG_SERIAL_8250_NR_UARTS)
124 #ifdef CONFIG_SERIAL_8250_RSA
126 #define PORT_RSA_MAX 4
127 static unsigned long probe_rsa
[PORT_RSA_MAX
];
128 static unsigned int probe_rsa_count
;
129 #endif /* CONFIG_SERIAL_8250_RSA */
131 struct uart_8250_port
{
132 struct uart_port port
;
133 struct timer_list timer
; /* "no irq" timer */
134 struct list_head list
; /* ports on this IRQ */
135 unsigned int capabilities
; /* port capabilities */
136 unsigned int tx_loadsz
; /* transmit fifo load size */
142 unsigned char mcr_mask
; /* mask of user bits */
143 unsigned char mcr_force
; /* mask of forced bits */
144 unsigned char lsr_break_flag
;
147 * We provide a per-port pm hook.
149 void (*pm
)(struct uart_port
*port
,
150 unsigned int state
, unsigned int old
);
155 struct list_head
*head
;
158 static struct irq_info irq_lists
[NR_IRQS
];
161 * Here we define the default xmit fifo size used for each type of UART.
163 static const struct serial8250_config uart_config
[] = {
188 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
189 .flags
= UART_CAP_FIFO
,
200 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
206 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
208 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
214 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
|
216 .flags
= UART_CAP_FIFO
| UART_CAP_SLEEP
| UART_CAP_AFE
,
224 .name
= "16C950/954",
227 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
228 .flags
= UART_CAP_FIFO
,
234 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_01
|
236 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
242 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
243 .flags
= UART_CAP_FIFO
| UART_CAP_EFR
| UART_CAP_SLEEP
,
249 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_11
,
250 .flags
= UART_CAP_FIFO
,
256 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
257 .flags
= UART_CAP_FIFO
| UART_NATSEMI
,
263 .fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_R_TRIG_10
,
264 .flags
= UART_CAP_FIFO
| UART_CAP_UUE
,
268 static _INLINE_
unsigned int serial_in(struct uart_8250_port
*up
, int offset
)
270 offset
<<= up
->port
.regshift
;
272 switch (up
->port
.iotype
) {
274 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
275 return inb(up
->port
.iobase
+ 1);
278 return readb(up
->port
.membase
+ offset
);
281 return readl(up
->port
.membase
+ offset
);
284 return inb(up
->port
.iobase
+ offset
);
289 serial_out(struct uart_8250_port
*up
, int offset
, int value
)
291 offset
<<= up
->port
.regshift
;
293 switch (up
->port
.iotype
) {
295 outb(up
->port
.hub6
- 1 + offset
, up
->port
.iobase
);
296 outb(value
, up
->port
.iobase
+ 1);
300 writeb(value
, up
->port
.membase
+ offset
);
304 writel(value
, up
->port
.membase
+ offset
);
308 outb(value
, up
->port
.iobase
+ offset
);
313 * We used to support using pause I/O for certain machines. We
314 * haven't supported this for a while, but just in case it's badly
315 * needed for certain old 386 machines, I've left these #define's
318 #define serial_inp(up, offset) serial_in(up, offset)
319 #define serial_outp(up, offset, value) serial_out(up, offset, value)
325 static void serial_icr_write(struct uart_8250_port
*up
, int offset
, int value
)
327 serial_out(up
, UART_SCR
, offset
);
328 serial_out(up
, UART_ICR
, value
);
331 static unsigned int serial_icr_read(struct uart_8250_port
*up
, int offset
)
335 serial_icr_write(up
, UART_ACR
, up
->acr
| UART_ACR_ICRRD
);
336 serial_out(up
, UART_SCR
, offset
);
337 value
= serial_in(up
, UART_ICR
);
338 serial_icr_write(up
, UART_ACR
, up
->acr
);
346 static inline void serial8250_clear_fifos(struct uart_8250_port
*p
)
348 if (p
->capabilities
& UART_CAP_FIFO
) {
349 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
350 serial_outp(p
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
351 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
352 serial_outp(p
, UART_FCR
, 0);
357 * IER sleep support. UARTs which have EFRs need the "extended
358 * capability" bit enabled. Note that on XR16C850s, we need to
359 * reset LCR to write to IER.
361 static inline void serial8250_set_sleep(struct uart_8250_port
*p
, int sleep
)
363 if (p
->capabilities
& UART_CAP_SLEEP
) {
364 if (p
->capabilities
& UART_CAP_EFR
) {
365 serial_outp(p
, UART_LCR
, 0xBF);
366 serial_outp(p
, UART_EFR
, UART_EFR_ECB
);
367 serial_outp(p
, UART_LCR
, 0);
369 serial_outp(p
, UART_IER
, sleep
? UART_IERX_SLEEP
: 0);
370 if (p
->capabilities
& UART_CAP_EFR
) {
371 serial_outp(p
, UART_LCR
, 0xBF);
372 serial_outp(p
, UART_EFR
, 0);
373 serial_outp(p
, UART_LCR
, 0);
378 #ifdef CONFIG_SERIAL_8250_RSA
380 * Attempts to turn on the RSA FIFO. Returns zero on failure.
381 * We set the port uart clock rate if we succeed.
383 static int __enable_rsa(struct uart_8250_port
*up
)
388 mode
= serial_inp(up
, UART_RSA_MSR
);
389 result
= mode
& UART_RSA_MSR_FIFO
;
392 serial_outp(up
, UART_RSA_MSR
, mode
| UART_RSA_MSR_FIFO
);
393 mode
= serial_inp(up
, UART_RSA_MSR
);
394 result
= mode
& UART_RSA_MSR_FIFO
;
398 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE
* 16;
403 static void enable_rsa(struct uart_8250_port
*up
)
405 if (up
->port
.type
== PORT_RSA
) {
406 if (up
->port
.uartclk
!= SERIAL_RSA_BAUD_BASE
* 16) {
407 spin_lock_irq(&up
->port
.lock
);
409 spin_unlock_irq(&up
->port
.lock
);
411 if (up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16)
412 serial_outp(up
, UART_RSA_FRR
, 0);
417 * Attempts to turn off the RSA FIFO. Returns zero on failure.
418 * It is unknown why interrupts were disabled in here. However,
419 * the caller is expected to preserve this behaviour by grabbing
420 * the spinlock before calling this function.
422 static void disable_rsa(struct uart_8250_port
*up
)
427 if (up
->port
.type
== PORT_RSA
&&
428 up
->port
.uartclk
== SERIAL_RSA_BAUD_BASE
* 16) {
429 spin_lock_irq(&up
->port
.lock
);
431 mode
= serial_inp(up
, UART_RSA_MSR
);
432 result
= !(mode
& UART_RSA_MSR_FIFO
);
435 serial_outp(up
, UART_RSA_MSR
, mode
& ~UART_RSA_MSR_FIFO
);
436 mode
= serial_inp(up
, UART_RSA_MSR
);
437 result
= !(mode
& UART_RSA_MSR_FIFO
);
441 up
->port
.uartclk
= SERIAL_RSA_BAUD_BASE_LO
* 16;
442 spin_unlock_irq(&up
->port
.lock
);
445 #endif /* CONFIG_SERIAL_8250_RSA */
448 * This is a quickie test to see how big the FIFO is.
449 * It doesn't work at all the time, more's the pity.
451 static int size_fifo(struct uart_8250_port
*up
)
453 unsigned char old_fcr
, old_mcr
, old_dll
, old_dlm
, old_lcr
;
456 old_lcr
= serial_inp(up
, UART_LCR
);
457 serial_outp(up
, UART_LCR
, 0);
458 old_fcr
= serial_inp(up
, UART_FCR
);
459 old_mcr
= serial_inp(up
, UART_MCR
);
460 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
|
461 UART_FCR_CLEAR_RCVR
| UART_FCR_CLEAR_XMIT
);
462 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
);
463 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
464 old_dll
= serial_inp(up
, UART_DLL
);
465 old_dlm
= serial_inp(up
, UART_DLM
);
466 serial_outp(up
, UART_DLL
, 0x01);
467 serial_outp(up
, UART_DLM
, 0x00);
468 serial_outp(up
, UART_LCR
, 0x03);
469 for (count
= 0; count
< 256; count
++)
470 serial_outp(up
, UART_TX
, count
);
471 mdelay(20);/* FIXME - schedule_timeout */
472 for (count
= 0; (serial_inp(up
, UART_LSR
) & UART_LSR_DR
) &&
473 (count
< 256); count
++)
474 serial_inp(up
, UART_RX
);
475 serial_outp(up
, UART_FCR
, old_fcr
);
476 serial_outp(up
, UART_MCR
, old_mcr
);
477 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
478 serial_outp(up
, UART_DLL
, old_dll
);
479 serial_outp(up
, UART_DLM
, old_dlm
);
480 serial_outp(up
, UART_LCR
, old_lcr
);
486 * Read UART ID using the divisor method - set DLL and DLM to zero
487 * and the revision will be in DLL and device type in DLM. We
488 * preserve the device state across this.
490 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port
*p
)
492 unsigned char old_dll
, old_dlm
, old_lcr
;
495 old_lcr
= serial_inp(p
, UART_LCR
);
496 serial_outp(p
, UART_LCR
, UART_LCR_DLAB
);
498 old_dll
= serial_inp(p
, UART_DLL
);
499 old_dlm
= serial_inp(p
, UART_DLM
);
501 serial_outp(p
, UART_DLL
, 0);
502 serial_outp(p
, UART_DLM
, 0);
504 id
= serial_inp(p
, UART_DLL
) | serial_inp(p
, UART_DLM
) << 8;
506 serial_outp(p
, UART_DLL
, old_dll
);
507 serial_outp(p
, UART_DLM
, old_dlm
);
508 serial_outp(p
, UART_LCR
, old_lcr
);
514 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
515 * When this function is called we know it is at least a StarTech
516 * 16650 V2, but it might be one of several StarTech UARTs, or one of
517 * its clones. (We treat the broken original StarTech 16650 V1 as a
518 * 16550, and why not? Startech doesn't seem to even acknowledge its
521 * What evil have men's minds wrought...
523 static void autoconfig_has_efr(struct uart_8250_port
*up
)
525 unsigned int id1
, id2
, id3
, rev
;
528 * Everything with an EFR has SLEEP
530 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
533 * First we check to see if it's an Oxford Semiconductor UART.
535 * If we have to do this here because some non-National
536 * Semiconductor clone chips lock up if you try writing to the
537 * LSR register (which serial_icr_read does)
541 * Check for Oxford Semiconductor 16C950.
543 * EFR [4] must be set else this test fails.
545 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
546 * claims that it's needed for 952 dual UART's (which are not
547 * recommended for new designs).
550 serial_out(up
, UART_LCR
, 0xBF);
551 serial_out(up
, UART_EFR
, UART_EFR_ECB
);
552 serial_out(up
, UART_LCR
, 0x00);
553 id1
= serial_icr_read(up
, UART_ID1
);
554 id2
= serial_icr_read(up
, UART_ID2
);
555 id3
= serial_icr_read(up
, UART_ID3
);
556 rev
= serial_icr_read(up
, UART_REV
);
558 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1
, id2
, id3
, rev
);
560 if (id1
== 0x16 && id2
== 0xC9 &&
561 (id3
== 0x50 || id3
== 0x52 || id3
== 0x54)) {
562 up
->port
.type
= PORT_16C950
;
563 up
->rev
= rev
| (id3
<< 8);
568 * We check for a XR16C850 by setting DLL and DLM to 0, and then
569 * reading back DLL and DLM. The chip type depends on the DLM
571 * 0x10 - XR16C850 and the DLL contains the chip revision.
575 id1
= autoconfig_read_divisor_id(up
);
576 DEBUG_AUTOCONF("850id=%04x ", id1
);
579 if (id2
== 0x10 || id2
== 0x12 || id2
== 0x14) {
582 up
->port
.type
= PORT_16850
;
587 * It wasn't an XR16C850.
589 * We distinguish between the '654 and the '650 by counting
590 * how many bytes are in the FIFO. I'm using this for now,
591 * since that's the technique that was sent to me in the
592 * serial driver update, but I'm not convinced this works.
593 * I've had problems doing this in the past. -TYT
595 if (size_fifo(up
) == 64)
596 up
->port
.type
= PORT_16654
;
598 up
->port
.type
= PORT_16650V2
;
602 * We detected a chip without a FIFO. Only two fall into
603 * this category - the original 8250 and the 16450. The
604 * 16450 has a scratch register (accessible with LCR=0)
606 static void autoconfig_8250(struct uart_8250_port
*up
)
608 unsigned char scratch
, status1
, status2
;
610 up
->port
.type
= PORT_8250
;
612 scratch
= serial_in(up
, UART_SCR
);
613 serial_outp(up
, UART_SCR
, 0xa5);
614 status1
= serial_in(up
, UART_SCR
);
615 serial_outp(up
, UART_SCR
, 0x5a);
616 status2
= serial_in(up
, UART_SCR
);
617 serial_outp(up
, UART_SCR
, scratch
);
619 if (status1
== 0xa5 && status2
== 0x5a)
620 up
->port
.type
= PORT_16450
;
623 static int broken_efr(struct uart_8250_port
*up
)
626 * Exar ST16C2550 "A2" devices incorrectly detect as
627 * having an EFR, and report an ID of 0x0201. See
628 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
630 if (autoconfig_read_divisor_id(up
) == 0x0201 && size_fifo(up
) == 16)
637 * We know that the chip has FIFOs. Does it have an EFR? The
638 * EFR is located in the same register position as the IIR and
639 * we know the top two bits of the IIR are currently set. The
640 * EFR should contain zero. Try to read the EFR.
642 static void autoconfig_16550a(struct uart_8250_port
*up
)
644 unsigned char status1
, status2
;
645 unsigned int iersave
;
647 up
->port
.type
= PORT_16550A
;
648 up
->capabilities
|= UART_CAP_FIFO
;
651 * Check for presence of the EFR when DLAB is set.
652 * Only ST16C650V1 UARTs pass this test.
654 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
655 if (serial_in(up
, UART_EFR
) == 0) {
656 serial_outp(up
, UART_EFR
, 0xA8);
657 if (serial_in(up
, UART_EFR
) != 0) {
658 DEBUG_AUTOCONF("EFRv1 ");
659 up
->port
.type
= PORT_16650
;
660 up
->capabilities
|= UART_CAP_EFR
| UART_CAP_SLEEP
;
662 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
664 serial_outp(up
, UART_EFR
, 0);
669 * Maybe it requires 0xbf to be written to the LCR.
670 * (other ST16C650V2 UARTs, TI16C752A, etc)
672 serial_outp(up
, UART_LCR
, 0xBF);
673 if (serial_in(up
, UART_EFR
) == 0 && !broken_efr(up
)) {
674 DEBUG_AUTOCONF("EFRv2 ");
675 autoconfig_has_efr(up
);
680 * Check for a National Semiconductor SuperIO chip.
681 * Attempt to switch to bank 2, read the value of the LOOP bit
682 * from EXCR1. Switch back to bank 0, change it in MCR. Then
683 * switch back to bank 2, read it from EXCR1 again and check
684 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
686 serial_outp(up
, UART_LCR
, 0);
687 status1
= serial_in(up
, UART_MCR
);
688 serial_outp(up
, UART_LCR
, 0xE0);
689 status2
= serial_in(up
, 0x02); /* EXCR1 */
691 if (!((status2
^ status1
) & UART_MCR_LOOP
)) {
692 serial_outp(up
, UART_LCR
, 0);
693 serial_outp(up
, UART_MCR
, status1
^ UART_MCR_LOOP
);
694 serial_outp(up
, UART_LCR
, 0xE0);
695 status2
= serial_in(up
, 0x02); /* EXCR1 */
696 serial_outp(up
, UART_LCR
, 0);
697 serial_outp(up
, UART_MCR
, status1
);
699 if ((status2
^ status1
) & UART_MCR_LOOP
) {
702 serial_outp(up
, UART_LCR
, 0xE0);
704 quot
= serial_inp(up
, UART_DLM
) << 8;
705 quot
+= serial_inp(up
, UART_DLL
);
708 status1
= serial_in(up
, 0x04); /* EXCR1 */
709 status1
&= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
710 status1
|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
711 serial_outp(up
, 0x04, status1
);
713 serial_outp(up
, UART_DLL
, quot
& 0xff);
714 serial_outp(up
, UART_DLM
, quot
>> 8);
716 serial_outp(up
, UART_LCR
, 0);
718 up
->port
.uartclk
= 921600*16;
719 up
->port
.type
= PORT_NS16550A
;
720 up
->capabilities
|= UART_NATSEMI
;
726 * No EFR. Try to detect a TI16750, which only sets bit 5 of
727 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
728 * Try setting it with and without DLAB set. Cheap clones
729 * set bit 5 without DLAB set.
731 serial_outp(up
, UART_LCR
, 0);
732 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
733 status1
= serial_in(up
, UART_IIR
) >> 5;
734 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
735 serial_outp(up
, UART_LCR
, UART_LCR_DLAB
);
736 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
| UART_FCR7_64BYTE
);
737 status2
= serial_in(up
, UART_IIR
) >> 5;
738 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
739 serial_outp(up
, UART_LCR
, 0);
741 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1
, status2
);
743 if (status1
== 6 && status2
== 7) {
744 up
->port
.type
= PORT_16750
;
745 up
->capabilities
|= UART_CAP_AFE
| UART_CAP_SLEEP
;
750 * Try writing and reading the UART_IER_UUE bit (b6).
751 * If it works, this is probably one of the Xscale platform's
753 * We're going to explicitly set the UUE bit to 0 before
754 * trying to write and read a 1 just to make sure it's not
755 * already a 1 and maybe locked there before we even start start.
757 iersave
= serial_in(up
, UART_IER
);
758 serial_outp(up
, UART_IER
, iersave
& ~UART_IER_UUE
);
759 if (!(serial_in(up
, UART_IER
) & UART_IER_UUE
)) {
761 * OK it's in a known zero state, try writing and reading
762 * without disturbing the current state of the other bits.
764 serial_outp(up
, UART_IER
, iersave
| UART_IER_UUE
);
765 if (serial_in(up
, UART_IER
) & UART_IER_UUE
) {
768 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
770 DEBUG_AUTOCONF("Xscale ");
771 up
->port
.type
= PORT_XSCALE
;
772 up
->capabilities
|= UART_CAP_UUE
;
777 * If we got here we couldn't force the IER_UUE bit to 0.
778 * Log it and continue.
780 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
782 serial_outp(up
, UART_IER
, iersave
);
786 * This routine is called by rs_init() to initialize a specific serial
787 * port. It determines what type of UART chip this serial port is
788 * using: 8250, 16450, 16550, 16550A. The important question is
789 * whether or not this UART is a 16550A or not, since this will
790 * determine whether or not we can use its FIFO features or not.
792 static void autoconfig(struct uart_8250_port
*up
, unsigned int probeflags
)
794 unsigned char status1
, scratch
, scratch2
, scratch3
;
795 unsigned char save_lcr
, save_mcr
;
798 if (!up
->port
.iobase
&& !up
->port
.mapbase
&& !up
->port
.membase
)
801 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
802 up
->port
.line
, up
->port
.iobase
, up
->port
.membase
);
805 * We really do need global IRQs disabled here - we're going to
806 * be frobbing the chips IRQ enable register to see if it exists.
808 spin_lock_irqsave(&up
->port
.lock
, flags
);
809 // save_flags(flags); cli();
811 up
->capabilities
= 0;
813 if (!(up
->port
.flags
& UPF_BUGGY_UART
)) {
815 * Do a simple existence test first; if we fail this,
816 * there's no point trying anything else.
818 * 0x80 is used as a nonsense port to prevent against
819 * false positives due to ISA bus float. The
820 * assumption is that 0x80 is a non-existent port;
821 * which should be safe since include/asm/io.h also
822 * makes this assumption.
824 * Note: this is safe as long as MCR bit 4 is clear
825 * and the device is in "PC" mode.
827 scratch
= serial_inp(up
, UART_IER
);
828 serial_outp(up
, UART_IER
, 0);
832 scratch2
= serial_inp(up
, UART_IER
);
833 serial_outp(up
, UART_IER
, 0x0F);
837 scratch3
= serial_inp(up
, UART_IER
);
838 serial_outp(up
, UART_IER
, scratch
);
839 if (scratch2
!= 0 || scratch3
!= 0x0F) {
841 * We failed; there's nothing here
843 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
849 save_mcr
= serial_in(up
, UART_MCR
);
850 save_lcr
= serial_in(up
, UART_LCR
);
853 * Check to see if a UART is really there. Certain broken
854 * internal modems based on the Rockwell chipset fail this
855 * test, because they apparently don't implement the loopback
856 * test mode. So this test is skipped on the COM 1 through
857 * COM 4 ports. This *should* be safe, since no board
858 * manufacturer would be stupid enough to design a board
859 * that conflicts with COM 1-4 --- we hope!
861 if (!(up
->port
.flags
& UPF_SKIP_TEST
)) {
862 serial_outp(up
, UART_MCR
, UART_MCR_LOOP
| 0x0A);
863 status1
= serial_inp(up
, UART_MSR
) & 0xF0;
864 serial_outp(up
, UART_MCR
, save_mcr
);
865 if (status1
!= 0x90) {
866 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
873 * We're pretty sure there's a port here. Lets find out what
874 * type of port it is. The IIR top two bits allows us to find
875 * out if its 8250 or 16450, 16550, 16550A or later. This
876 * determines what we test for next.
878 * We also initialise the EFR (if any) to zero for later. The
879 * EFR occupies the same register location as the FCR and IIR.
881 serial_outp(up
, UART_LCR
, 0xBF);
882 serial_outp(up
, UART_EFR
, 0);
883 serial_outp(up
, UART_LCR
, 0);
885 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
886 scratch
= serial_in(up
, UART_IIR
) >> 6;
888 DEBUG_AUTOCONF("iir=%d ", scratch
);
895 up
->port
.type
= PORT_UNKNOWN
;
898 up
->port
.type
= PORT_16550
;
901 autoconfig_16550a(up
);
905 #ifdef CONFIG_SERIAL_8250_RSA
907 * Only probe for RSA ports if we got the region.
909 if (up
->port
.type
== PORT_16550A
&& probeflags
& PROBE_RSA
) {
912 for (i
= 0 ; i
< probe_rsa_count
; ++i
) {
913 if (probe_rsa
[i
] == up
->port
.iobase
&&
915 up
->port
.type
= PORT_RSA
;
921 serial_outp(up
, UART_LCR
, save_lcr
);
923 if (up
->capabilities
!= uart_config
[up
->port
.type
].flags
) {
925 "ttyS%d: detected caps %08x should be %08x\n",
926 up
->port
.line
, up
->capabilities
,
927 uart_config
[up
->port
.type
].flags
);
930 up
->port
.fifosize
= uart_config
[up
->port
.type
].fifo_size
;
931 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
932 up
->tx_loadsz
= uart_config
[up
->port
.type
].tx_loadsz
;
934 if (up
->port
.type
== PORT_UNKNOWN
)
940 #ifdef CONFIG_SERIAL_8250_RSA
941 if (up
->port
.type
== PORT_RSA
)
942 serial_outp(up
, UART_RSA_FRR
, 0);
944 serial_outp(up
, UART_MCR
, save_mcr
);
945 serial8250_clear_fifos(up
);
946 (void)serial_in(up
, UART_RX
);
947 serial_outp(up
, UART_IER
, 0);
950 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
951 // restore_flags(flags);
952 DEBUG_AUTOCONF("type=%s\n", uart_config
[up
->port
.type
].name
);
955 static void autoconfig_irq(struct uart_8250_port
*up
)
957 unsigned char save_mcr
, save_ier
;
958 unsigned char save_ICP
= 0;
959 unsigned int ICP
= 0;
963 if (up
->port
.flags
& UPF_FOURPORT
) {
964 ICP
= (up
->port
.iobase
& 0xfe0) | 0x1f;
965 save_ICP
= inb_p(ICP
);
970 /* forget possible initially masked and pending IRQ */
971 probe_irq_off(probe_irq_on());
972 save_mcr
= serial_inp(up
, UART_MCR
);
973 save_ier
= serial_inp(up
, UART_IER
);
974 serial_outp(up
, UART_MCR
, UART_MCR_OUT1
| UART_MCR_OUT2
);
976 irqs
= probe_irq_on();
977 serial_outp(up
, UART_MCR
, 0);
979 if (up
->port
.flags
& UPF_FOURPORT
) {
980 serial_outp(up
, UART_MCR
,
981 UART_MCR_DTR
| UART_MCR_RTS
);
983 serial_outp(up
, UART_MCR
,
984 UART_MCR_DTR
| UART_MCR_RTS
| UART_MCR_OUT2
);
986 serial_outp(up
, UART_IER
, 0x0f); /* enable all intrs */
987 (void)serial_inp(up
, UART_LSR
);
988 (void)serial_inp(up
, UART_RX
);
989 (void)serial_inp(up
, UART_IIR
);
990 (void)serial_inp(up
, UART_MSR
);
991 serial_outp(up
, UART_TX
, 0xFF);
993 irq
= probe_irq_off(irqs
);
995 serial_outp(up
, UART_MCR
, save_mcr
);
996 serial_outp(up
, UART_IER
, save_ier
);
998 if (up
->port
.flags
& UPF_FOURPORT
)
999 outb_p(save_ICP
, ICP
);
1001 up
->port
.irq
= (irq
> 0) ? irq
: 0;
1004 static void serial8250_stop_tx(struct uart_port
*port
, unsigned int tty_stop
)
1006 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1008 if (up
->ier
& UART_IER_THRI
) {
1009 up
->ier
&= ~UART_IER_THRI
;
1010 serial_out(up
, UART_IER
, up
->ier
);
1014 * We only do this from uart_stop - if we run out of
1015 * characters to send, we don't want to prevent the
1016 * FIFO from emptying.
1018 if (up
->port
.type
== PORT_16C950
&& tty_stop
) {
1019 up
->acr
|= UART_ACR_TXDIS
;
1020 serial_icr_write(up
, UART_ACR
, up
->acr
);
1024 static void serial8250_start_tx(struct uart_port
*port
, unsigned int tty_start
)
1026 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1028 if (!(up
->ier
& UART_IER_THRI
)) {
1029 up
->ier
|= UART_IER_THRI
;
1030 serial_out(up
, UART_IER
, up
->ier
);
1033 * We only do this from uart_start
1035 if (tty_start
&& up
->port
.type
== PORT_16C950
) {
1036 up
->acr
&= ~UART_ACR_TXDIS
;
1037 serial_icr_write(up
, UART_ACR
, up
->acr
);
1041 static void serial8250_stop_rx(struct uart_port
*port
)
1043 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1045 up
->ier
&= ~UART_IER_RLSI
;
1046 up
->port
.read_status_mask
&= ~UART_LSR_DR
;
1047 serial_out(up
, UART_IER
, up
->ier
);
1050 static void serial8250_enable_ms(struct uart_port
*port
)
1052 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1054 up
->ier
|= UART_IER_MSI
;
1055 serial_out(up
, UART_IER
, up
->ier
);
1058 static _INLINE_
void
1059 receive_chars(struct uart_8250_port
*up
, int *status
, struct pt_regs
*regs
)
1061 struct tty_struct
*tty
= up
->port
.info
->tty
;
1062 unsigned char ch
, lsr
= *status
;
1063 int max_count
= 256;
1067 /* The following is not allowed by the tty layer and
1068 unsafe. It should be fixed ASAP */
1069 if (unlikely(tty
->flip
.count
>= TTY_FLIPBUF_SIZE
)) {
1070 if (tty
->low_latency
) {
1071 spin_unlock(&up
->port
.lock
);
1072 tty_flip_buffer_push(tty
);
1073 spin_lock(&up
->port
.lock
);
1076 * If this failed then we will throw away the
1077 * bytes but must do so to clear interrupts
1080 ch
= serial_inp(up
, UART_RX
);
1082 up
->port
.icount
.rx
++;
1084 #ifdef CONFIG_SERIAL_8250_CONSOLE
1086 * Recover the break flag from console xmit
1088 if (up
->port
.line
== up
->port
.cons
->index
) {
1089 lsr
|= up
->lsr_break_flag
;
1090 up
->lsr_break_flag
= 0;
1094 if (unlikely(lsr
& (UART_LSR_BI
| UART_LSR_PE
|
1095 UART_LSR_FE
| UART_LSR_OE
))) {
1097 * For statistics only
1099 if (lsr
& UART_LSR_BI
) {
1100 lsr
&= ~(UART_LSR_FE
| UART_LSR_PE
);
1101 up
->port
.icount
.brk
++;
1103 * We do the SysRQ and SAK checking
1104 * here because otherwise the break
1105 * may get masked by ignore_status_mask
1106 * or read_status_mask.
1108 if (uart_handle_break(&up
->port
))
1110 } else if (lsr
& UART_LSR_PE
)
1111 up
->port
.icount
.parity
++;
1112 else if (lsr
& UART_LSR_FE
)
1113 up
->port
.icount
.frame
++;
1114 if (lsr
& UART_LSR_OE
)
1115 up
->port
.icount
.overrun
++;
1118 * Mask off conditions which should be ignored.
1120 lsr
&= up
->port
.read_status_mask
;
1122 if (lsr
& UART_LSR_BI
) {
1123 DEBUG_INTR("handling break....");
1125 } else if (lsr
& UART_LSR_PE
)
1127 else if (lsr
& UART_LSR_FE
)
1130 if (uart_handle_sysrq_char(&up
->port
, ch
, regs
))
1133 uart_insert_char(&up
->port
, lsr
, UART_LSR_OE
, ch
, flag
);
1136 lsr
= serial_inp(up
, UART_LSR
);
1137 } while ((lsr
& UART_LSR_DR
) && (max_count
-- > 0));
1138 spin_unlock(&up
->port
.lock
);
1139 tty_flip_buffer_push(tty
);
1140 spin_lock(&up
->port
.lock
);
1144 static _INLINE_
void transmit_chars(struct uart_8250_port
*up
)
1146 struct circ_buf
*xmit
= &up
->port
.info
->xmit
;
1149 if (up
->port
.x_char
) {
1150 serial_outp(up
, UART_TX
, up
->port
.x_char
);
1151 up
->port
.icount
.tx
++;
1152 up
->port
.x_char
= 0;
1155 if (uart_circ_empty(xmit
) || uart_tx_stopped(&up
->port
)) {
1156 serial8250_stop_tx(&up
->port
, 0);
1160 count
= up
->tx_loadsz
;
1162 serial_out(up
, UART_TX
, xmit
->buf
[xmit
->tail
]);
1163 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
1164 up
->port
.icount
.tx
++;
1165 if (uart_circ_empty(xmit
))
1167 } while (--count
> 0);
1169 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
1170 uart_write_wakeup(&up
->port
);
1172 DEBUG_INTR("THRE...");
1174 if (uart_circ_empty(xmit
))
1175 serial8250_stop_tx(&up
->port
, 0);
1178 static _INLINE_
void check_modem_status(struct uart_8250_port
*up
)
1182 status
= serial_in(up
, UART_MSR
);
1184 if ((status
& UART_MSR_ANY_DELTA
) == 0)
1187 if (status
& UART_MSR_TERI
)
1188 up
->port
.icount
.rng
++;
1189 if (status
& UART_MSR_DDSR
)
1190 up
->port
.icount
.dsr
++;
1191 if (status
& UART_MSR_DDCD
)
1192 uart_handle_dcd_change(&up
->port
, status
& UART_MSR_DCD
);
1193 if (status
& UART_MSR_DCTS
)
1194 uart_handle_cts_change(&up
->port
, status
& UART_MSR_CTS
);
1196 wake_up_interruptible(&up
->port
.info
->delta_msr_wait
);
1200 * This handles the interrupt from one port.
1203 serial8250_handle_port(struct uart_8250_port
*up
, struct pt_regs
*regs
)
1205 unsigned int status
= serial_inp(up
, UART_LSR
);
1207 DEBUG_INTR("status = %x...", status
);
1209 if (status
& UART_LSR_DR
)
1210 receive_chars(up
, &status
, regs
);
1211 check_modem_status(up
);
1212 if (status
& UART_LSR_THRE
)
1217 * This is the serial driver's interrupt routine.
1219 * Arjan thinks the old way was overly complex, so it got simplified.
1220 * Alan disagrees, saying that need the complexity to handle the weird
1221 * nature of ISA shared interrupts. (This is a special exception.)
1223 * In order to handle ISA shared interrupts properly, we need to check
1224 * that all ports have been serviced, and therefore the ISA interrupt
1225 * line has been de-asserted.
1227 * This means we need to loop through all ports. checking that they
1228 * don't have an interrupt pending.
1230 static irqreturn_t
serial8250_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1232 struct irq_info
*i
= dev_id
;
1233 struct list_head
*l
, *end
= NULL
;
1234 int pass_counter
= 0, handled
= 0;
1236 DEBUG_INTR("serial8250_interrupt(%d)...", irq
);
1238 spin_lock(&i
->lock
);
1242 struct uart_8250_port
*up
;
1245 up
= list_entry(l
, struct uart_8250_port
, list
);
1247 iir
= serial_in(up
, UART_IIR
);
1248 if (!(iir
& UART_IIR_NO_INT
)) {
1249 spin_lock(&up
->port
.lock
);
1250 serial8250_handle_port(up
, regs
);
1251 spin_unlock(&up
->port
.lock
);
1256 } else if (end
== NULL
)
1261 if (l
== i
->head
&& pass_counter
++ > PASS_LIMIT
) {
1262 /* If we hit this, we're dead. */
1263 printk(KERN_ERR
"serial8250: too much work for "
1269 spin_unlock(&i
->lock
);
1271 DEBUG_INTR("end.\n");
1273 return IRQ_RETVAL(handled
);
1277 * To support ISA shared interrupts, we need to have one interrupt
1278 * handler that ensures that the IRQ line has been deasserted
1279 * before returning. Failing to do this will result in the IRQ
1280 * line being stuck active, and, since ISA irqs are edge triggered,
1281 * no more IRQs will be seen.
1283 static void serial_do_unlink(struct irq_info
*i
, struct uart_8250_port
*up
)
1285 spin_lock_irq(&i
->lock
);
1287 if (!list_empty(i
->head
)) {
1288 if (i
->head
== &up
->list
)
1289 i
->head
= i
->head
->next
;
1290 list_del(&up
->list
);
1292 BUG_ON(i
->head
!= &up
->list
);
1296 spin_unlock_irq(&i
->lock
);
1299 static int serial_link_irq_chain(struct uart_8250_port
*up
)
1301 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1302 int ret
, irq_flags
= up
->port
.flags
& UPF_SHARE_IRQ
? SA_SHIRQ
: 0;
1304 spin_lock_irq(&i
->lock
);
1307 list_add(&up
->list
, i
->head
);
1308 spin_unlock_irq(&i
->lock
);
1312 INIT_LIST_HEAD(&up
->list
);
1313 i
->head
= &up
->list
;
1314 spin_unlock_irq(&i
->lock
);
1316 ret
= request_irq(up
->port
.irq
, serial8250_interrupt
,
1317 irq_flags
, "serial", i
);
1319 serial_do_unlink(i
, up
);
1325 static void serial_unlink_irq_chain(struct uart_8250_port
*up
)
1327 struct irq_info
*i
= irq_lists
+ up
->port
.irq
;
1329 BUG_ON(i
->head
== NULL
);
1331 if (list_empty(i
->head
))
1332 free_irq(up
->port
.irq
, i
);
1334 serial_do_unlink(i
, up
);
1338 * This function is used to handle ports that do not have an
1339 * interrupt. This doesn't work very well for 16450's, but gives
1340 * barely passable results for a 16550A. (Although at the expense
1341 * of much CPU overhead).
1343 static void serial8250_timeout(unsigned long data
)
1345 struct uart_8250_port
*up
= (struct uart_8250_port
*)data
;
1346 unsigned int timeout
;
1349 iir
= serial_in(up
, UART_IIR
);
1350 if (!(iir
& UART_IIR_NO_INT
)) {
1351 spin_lock(&up
->port
.lock
);
1352 serial8250_handle_port(up
, NULL
);
1353 spin_unlock(&up
->port
.lock
);
1356 timeout
= up
->port
.timeout
;
1357 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1358 mod_timer(&up
->timer
, jiffies
+ timeout
);
1361 static unsigned int serial8250_tx_empty(struct uart_port
*port
)
1363 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1364 unsigned long flags
;
1367 spin_lock_irqsave(&up
->port
.lock
, flags
);
1368 ret
= serial_in(up
, UART_LSR
) & UART_LSR_TEMT
? TIOCSER_TEMT
: 0;
1369 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1374 static unsigned int serial8250_get_mctrl(struct uart_port
*port
)
1376 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1377 unsigned long flags
;
1378 unsigned char status
;
1381 spin_lock_irqsave(&up
->port
.lock
, flags
);
1382 status
= serial_in(up
, UART_MSR
);
1383 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1386 if (status
& UART_MSR_DCD
)
1388 if (status
& UART_MSR_RI
)
1390 if (status
& UART_MSR_DSR
)
1392 if (status
& UART_MSR_CTS
)
1397 static void serial8250_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
1399 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1400 unsigned char mcr
= 0;
1402 if (mctrl
& TIOCM_RTS
)
1403 mcr
|= UART_MCR_RTS
;
1404 if (mctrl
& TIOCM_DTR
)
1405 mcr
|= UART_MCR_DTR
;
1406 if (mctrl
& TIOCM_OUT1
)
1407 mcr
|= UART_MCR_OUT1
;
1408 if (mctrl
& TIOCM_OUT2
)
1409 mcr
|= UART_MCR_OUT2
;
1410 if (mctrl
& TIOCM_LOOP
)
1411 mcr
|= UART_MCR_LOOP
;
1413 mcr
= (mcr
& up
->mcr_mask
) | up
->mcr_force
| up
->mcr
;
1415 serial_out(up
, UART_MCR
, mcr
);
1418 static void serial8250_break_ctl(struct uart_port
*port
, int break_state
)
1420 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1421 unsigned long flags
;
1423 spin_lock_irqsave(&up
->port
.lock
, flags
);
1424 if (break_state
== -1)
1425 up
->lcr
|= UART_LCR_SBC
;
1427 up
->lcr
&= ~UART_LCR_SBC
;
1428 serial_out(up
, UART_LCR
, up
->lcr
);
1429 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1432 static int serial8250_startup(struct uart_port
*port
)
1434 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1435 unsigned long flags
;
1438 up
->capabilities
= uart_config
[up
->port
.type
].flags
;
1441 if (up
->port
.type
== PORT_16C950
) {
1442 /* Wake up and initialize UART */
1444 serial_outp(up
, UART_LCR
, 0xBF);
1445 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1446 serial_outp(up
, UART_IER
, 0);
1447 serial_outp(up
, UART_LCR
, 0);
1448 serial_icr_write(up
, UART_CSR
, 0); /* Reset the UART */
1449 serial_outp(up
, UART_LCR
, 0xBF);
1450 serial_outp(up
, UART_EFR
, UART_EFR_ECB
);
1451 serial_outp(up
, UART_LCR
, 0);
1454 #ifdef CONFIG_SERIAL_8250_RSA
1456 * If this is an RSA port, see if we can kick it up to the
1457 * higher speed clock.
1463 * Clear the FIFO buffers and disable them.
1464 * (they will be reeanbled in set_termios())
1466 serial8250_clear_fifos(up
);
1469 * Clear the interrupt registers.
1471 (void) serial_inp(up
, UART_LSR
);
1472 (void) serial_inp(up
, UART_RX
);
1473 (void) serial_inp(up
, UART_IIR
);
1474 (void) serial_inp(up
, UART_MSR
);
1477 * At this point, there's no way the LSR could still be 0xff;
1478 * if it is, then bail out, because there's likely no UART
1481 if (!(up
->port
.flags
& UPF_BUGGY_UART
) &&
1482 (serial_inp(up
, UART_LSR
) == 0xff)) {
1483 printk("ttyS%d: LSR safety check engaged!\n", up
->port
.line
);
1488 * For a XR16C850, we need to set the trigger levels
1490 if (up
->port
.type
== PORT_16850
) {
1493 serial_outp(up
, UART_LCR
, 0xbf);
1495 fctr
= serial_inp(up
, UART_FCTR
) & ~(UART_FCTR_RX
|UART_FCTR_TX
);
1496 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_RX
);
1497 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1498 serial_outp(up
, UART_FCTR
, fctr
| UART_FCTR_TRGD
| UART_FCTR_TX
);
1499 serial_outp(up
, UART_TRG
, UART_TRG_96
);
1501 serial_outp(up
, UART_LCR
, 0);
1505 * If the "interrupt" for this port doesn't correspond with any
1506 * hardware interrupt, we use a timer-based system. The original
1507 * driver used to do this with IRQ0.
1509 if (!is_real_interrupt(up
->port
.irq
)) {
1510 unsigned int timeout
= up
->port
.timeout
;
1512 timeout
= timeout
> 6 ? (timeout
/ 2 - 2) : 1;
1514 up
->timer
.data
= (unsigned long)up
;
1515 mod_timer(&up
->timer
, jiffies
+ timeout
);
1517 retval
= serial_link_irq_chain(up
);
1523 * Now, initialize the UART
1525 serial_outp(up
, UART_LCR
, UART_LCR_WLEN8
);
1527 spin_lock_irqsave(&up
->port
.lock
, flags
);
1528 if (up
->port
.flags
& UPF_FOURPORT
) {
1529 if (!is_real_interrupt(up
->port
.irq
))
1530 up
->port
.mctrl
|= TIOCM_OUT1
;
1533 * Most PC uarts need OUT2 raised to enable interrupts.
1535 if (is_real_interrupt(up
->port
.irq
))
1536 up
->port
.mctrl
|= TIOCM_OUT2
;
1538 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1539 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1542 * Finally, enable interrupts. Note: Modem status interrupts
1543 * are set via set_termios(), which will be occurring imminently
1544 * anyway, so we don't enable them here.
1546 up
->ier
= UART_IER_RLSI
| UART_IER_RDI
;
1547 serial_outp(up
, UART_IER
, up
->ier
);
1549 if (up
->port
.flags
& UPF_FOURPORT
) {
1552 * Enable interrupts on the AST Fourport board
1554 icp
= (up
->port
.iobase
& 0xfe0) | 0x01f;
1560 * And clear the interrupt registers again for luck.
1562 (void) serial_inp(up
, UART_LSR
);
1563 (void) serial_inp(up
, UART_RX
);
1564 (void) serial_inp(up
, UART_IIR
);
1565 (void) serial_inp(up
, UART_MSR
);
1570 static void serial8250_shutdown(struct uart_port
*port
)
1572 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1573 unsigned long flags
;
1576 * Disable interrupts from this port
1579 serial_outp(up
, UART_IER
, 0);
1581 spin_lock_irqsave(&up
->port
.lock
, flags
);
1582 if (up
->port
.flags
& UPF_FOURPORT
) {
1583 /* reset interrupts on the AST Fourport board */
1584 inb((up
->port
.iobase
& 0xfe0) | 0x1f);
1585 up
->port
.mctrl
|= TIOCM_OUT1
;
1587 up
->port
.mctrl
&= ~TIOCM_OUT2
;
1589 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1590 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1593 * Disable break condition and FIFOs
1595 serial_out(up
, UART_LCR
, serial_inp(up
, UART_LCR
) & ~UART_LCR_SBC
);
1596 serial8250_clear_fifos(up
);
1598 #ifdef CONFIG_SERIAL_8250_RSA
1600 * Reset the RSA board back to 115kbps compat mode.
1606 * Read data port to reset things, and then unlink from
1609 (void) serial_in(up
, UART_RX
);
1611 if (!is_real_interrupt(up
->port
.irq
))
1612 del_timer_sync(&up
->timer
);
1614 serial_unlink_irq_chain(up
);
1617 static unsigned int serial8250_get_divisor(struct uart_port
*port
, unsigned int baud
)
1622 * Handle magic divisors for baud rates above baud_base on
1623 * SMSC SuperIO chips.
1625 if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1626 baud
== (port
->uartclk
/4))
1628 else if ((port
->flags
& UPF_MAGIC_MULTIPLIER
) &&
1629 baud
== (port
->uartclk
/8))
1632 quot
= uart_get_divisor(port
, baud
);
1638 serial8250_set_termios(struct uart_port
*port
, struct termios
*termios
,
1639 struct termios
*old
)
1641 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1642 unsigned char cval
, fcr
= 0;
1643 unsigned long flags
;
1644 unsigned int baud
, quot
;
1646 switch (termios
->c_cflag
& CSIZE
) {
1662 if (termios
->c_cflag
& CSTOPB
)
1664 if (termios
->c_cflag
& PARENB
)
1665 cval
|= UART_LCR_PARITY
;
1666 if (!(termios
->c_cflag
& PARODD
))
1667 cval
|= UART_LCR_EPAR
;
1669 if (termios
->c_cflag
& CMSPAR
)
1670 cval
|= UART_LCR_SPAR
;
1674 * Ask the core to calculate the divisor for us.
1676 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
1677 quot
= serial8250_get_divisor(port
, baud
);
1680 * Work around a bug in the Oxford Semiconductor 952 rev B
1681 * chip which causes it to seriously miscalculate baud rates
1684 if ((quot
& 0xff) == 0 && up
->port
.type
== PORT_16C950
&&
1688 if (up
->capabilities
& UART_CAP_FIFO
&& up
->port
.fifosize
> 1) {
1690 fcr
= UART_FCR_ENABLE_FIFO
| UART_FCR_TRIGGER_1
;
1692 fcr
= uart_config
[up
->port
.type
].fcr
;
1696 * MCR-based auto flow control. When AFE is enabled, RTS will be
1697 * deasserted when the receive FIFO contains more characters than
1698 * the trigger, or the MCR RTS bit is cleared. In the case where
1699 * the remote UART is not using CTS auto flow control, we must
1700 * have sufficient FIFO entries for the latency of the remote
1701 * UART to respond. IOW, at least 32 bytes of FIFO.
1703 if (up
->capabilities
& UART_CAP_AFE
&& up
->port
.fifosize
>= 32) {
1704 up
->mcr
&= ~UART_MCR_AFE
;
1705 if (termios
->c_cflag
& CRTSCTS
)
1706 up
->mcr
|= UART_MCR_AFE
;
1710 * Ok, we're now changing the port state. Do it with
1711 * interrupts disabled.
1713 spin_lock_irqsave(&up
->port
.lock
, flags
);
1716 * Update the per-port timeout.
1718 uart_update_timeout(port
, termios
->c_cflag
, baud
);
1720 up
->port
.read_status_mask
= UART_LSR_OE
| UART_LSR_THRE
| UART_LSR_DR
;
1721 if (termios
->c_iflag
& INPCK
)
1722 up
->port
.read_status_mask
|= UART_LSR_FE
| UART_LSR_PE
;
1723 if (termios
->c_iflag
& (BRKINT
| PARMRK
))
1724 up
->port
.read_status_mask
|= UART_LSR_BI
;
1727 * Characteres to ignore
1729 up
->port
.ignore_status_mask
= 0;
1730 if (termios
->c_iflag
& IGNPAR
)
1731 up
->port
.ignore_status_mask
|= UART_LSR_PE
| UART_LSR_FE
;
1732 if (termios
->c_iflag
& IGNBRK
) {
1733 up
->port
.ignore_status_mask
|= UART_LSR_BI
;
1735 * If we're ignoring parity and break indicators,
1736 * ignore overruns too (for real raw support).
1738 if (termios
->c_iflag
& IGNPAR
)
1739 up
->port
.ignore_status_mask
|= UART_LSR_OE
;
1743 * ignore all characters if CREAD is not set
1745 if ((termios
->c_cflag
& CREAD
) == 0)
1746 up
->port
.ignore_status_mask
|= UART_LSR_DR
;
1749 * CTS flow control flag and modem status interrupts
1751 up
->ier
&= ~UART_IER_MSI
;
1752 if (UART_ENABLE_MS(&up
->port
, termios
->c_cflag
))
1753 up
->ier
|= UART_IER_MSI
;
1754 if (up
->capabilities
& UART_CAP_UUE
)
1755 up
->ier
|= UART_IER_UUE
| UART_IER_RTOIE
;
1757 serial_out(up
, UART_IER
, up
->ier
);
1759 if (up
->capabilities
& UART_CAP_EFR
) {
1760 unsigned char efr
= 0;
1762 * TI16C752/Startech hardware flow control. FIXME:
1763 * - TI16C752 requires control thresholds to be set.
1764 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1766 if (termios
->c_cflag
& CRTSCTS
)
1767 efr
|= UART_EFR_CTS
;
1769 serial_outp(up
, UART_LCR
, 0xBF);
1770 serial_outp(up
, UART_EFR
, efr
);
1773 if (up
->capabilities
& UART_NATSEMI
) {
1774 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1775 serial_outp(up
, UART_LCR
, 0xe0);
1777 serial_outp(up
, UART_LCR
, cval
| UART_LCR_DLAB
);/* set DLAB */
1780 serial_outp(up
, UART_DLL
, quot
& 0xff); /* LS of divisor */
1781 serial_outp(up
, UART_DLM
, quot
>> 8); /* MS of divisor */
1784 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1785 * is written without DLAB set, this mode will be disabled.
1787 if (up
->port
.type
== PORT_16750
)
1788 serial_outp(up
, UART_FCR
, fcr
);
1790 serial_outp(up
, UART_LCR
, cval
); /* reset DLAB */
1791 up
->lcr
= cval
; /* Save LCR */
1792 if (up
->port
.type
!= PORT_16750
) {
1793 if (fcr
& UART_FCR_ENABLE_FIFO
) {
1794 /* emulated UARTs (Lucent Venus 167x) need two steps */
1795 serial_outp(up
, UART_FCR
, UART_FCR_ENABLE_FIFO
);
1797 serial_outp(up
, UART_FCR
, fcr
); /* set fcr */
1799 serial8250_set_mctrl(&up
->port
, up
->port
.mctrl
);
1800 spin_unlock_irqrestore(&up
->port
.lock
, flags
);
1804 serial8250_pm(struct uart_port
*port
, unsigned int state
,
1805 unsigned int oldstate
)
1807 struct uart_8250_port
*p
= (struct uart_8250_port
*)port
;
1809 serial8250_set_sleep(p
, state
!= 0);
1812 p
->pm(port
, state
, oldstate
);
1816 * Resource handling.
1818 static int serial8250_request_std_resource(struct uart_8250_port
*up
)
1820 unsigned int size
= 8 << up
->port
.regshift
;
1823 switch (up
->port
.iotype
) {
1825 if (!up
->port
.mapbase
)
1828 if (!request_mem_region(up
->port
.mapbase
, size
, "serial")) {
1833 if (up
->port
.flags
& UPF_IOREMAP
) {
1834 up
->port
.membase
= ioremap(up
->port
.mapbase
, size
);
1835 if (!up
->port
.membase
) {
1836 release_mem_region(up
->port
.mapbase
, size
);
1844 if (!request_region(up
->port
.iobase
, size
, "serial"))
1851 static void serial8250_release_std_resource(struct uart_8250_port
*up
)
1853 unsigned int size
= 8 << up
->port
.regshift
;
1855 switch (up
->port
.iotype
) {
1857 if (!up
->port
.mapbase
)
1860 if (up
->port
.flags
& UPF_IOREMAP
) {
1861 iounmap(up
->port
.membase
);
1862 up
->port
.membase
= NULL
;
1865 release_mem_region(up
->port
.mapbase
, size
);
1870 release_region(up
->port
.iobase
, size
);
1875 static int serial8250_request_rsa_resource(struct uart_8250_port
*up
)
1877 unsigned long start
= UART_RSA_BASE
<< up
->port
.regshift
;
1878 unsigned int size
= 8 << up
->port
.regshift
;
1881 switch (up
->port
.iotype
) {
1888 start
+= up
->port
.iobase
;
1889 if (!request_region(start
, size
, "serial-rsa"))
1897 static void serial8250_release_rsa_resource(struct uart_8250_port
*up
)
1899 unsigned long offset
= UART_RSA_BASE
<< up
->port
.regshift
;
1900 unsigned int size
= 8 << up
->port
.regshift
;
1902 switch (up
->port
.iotype
) {
1908 release_region(up
->port
.iobase
+ offset
, size
);
1913 static void serial8250_release_port(struct uart_port
*port
)
1915 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1917 serial8250_release_std_resource(up
);
1918 if (up
->port
.type
== PORT_RSA
)
1919 serial8250_release_rsa_resource(up
);
1922 static int serial8250_request_port(struct uart_port
*port
)
1924 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1927 ret
= serial8250_request_std_resource(up
);
1928 if (ret
== 0 && up
->port
.type
== PORT_RSA
) {
1929 ret
= serial8250_request_rsa_resource(up
);
1931 serial8250_release_std_resource(up
);
1937 static void serial8250_config_port(struct uart_port
*port
, int flags
)
1939 struct uart_8250_port
*up
= (struct uart_8250_port
*)port
;
1940 int probeflags
= PROBE_ANY
;
1944 * Don't probe for MCA ports on non-MCA machines.
1946 if (up
->port
.flags
& UPF_BOOT_ONLYMCA
&& !MCA_bus
)
1950 * Find the region that we can probe for. This in turn
1951 * tells us whether we can probe for the type of port.
1953 ret
= serial8250_request_std_resource(up
);
1957 ret
= serial8250_request_rsa_resource(up
);
1959 probeflags
&= ~PROBE_RSA
;
1961 if (flags
& UART_CONFIG_TYPE
)
1962 autoconfig(up
, probeflags
);
1963 if (up
->port
.type
!= PORT_UNKNOWN
&& flags
& UART_CONFIG_IRQ
)
1966 if (up
->port
.type
!= PORT_RSA
&& probeflags
& PROBE_RSA
)
1967 serial8250_release_rsa_resource(up
);
1968 if (up
->port
.type
== PORT_UNKNOWN
)
1969 serial8250_release_std_resource(up
);
1973 serial8250_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
1975 if (ser
->irq
>= NR_IRQS
|| ser
->irq
< 0 ||
1976 ser
->baud_base
< 9600 || ser
->type
< PORT_UNKNOWN
||
1977 ser
->type
>= ARRAY_SIZE(uart_config
) || ser
->type
== PORT_CIRRUS
||
1978 ser
->type
== PORT_STARTECH
)
1984 serial8250_type(struct uart_port
*port
)
1986 int type
= port
->type
;
1988 if (type
>= ARRAY_SIZE(uart_config
))
1990 return uart_config
[type
].name
;
1993 static struct uart_ops serial8250_pops
= {
1994 .tx_empty
= serial8250_tx_empty
,
1995 .set_mctrl
= serial8250_set_mctrl
,
1996 .get_mctrl
= serial8250_get_mctrl
,
1997 .stop_tx
= serial8250_stop_tx
,
1998 .start_tx
= serial8250_start_tx
,
1999 .stop_rx
= serial8250_stop_rx
,
2000 .enable_ms
= serial8250_enable_ms
,
2001 .break_ctl
= serial8250_break_ctl
,
2002 .startup
= serial8250_startup
,
2003 .shutdown
= serial8250_shutdown
,
2004 .set_termios
= serial8250_set_termios
,
2005 .pm
= serial8250_pm
,
2006 .type
= serial8250_type
,
2007 .release_port
= serial8250_release_port
,
2008 .request_port
= serial8250_request_port
,
2009 .config_port
= serial8250_config_port
,
2010 .verify_port
= serial8250_verify_port
,
2013 static struct uart_8250_port serial8250_ports
[UART_NR
];
2015 static void __init
serial8250_isa_init_ports(void)
2017 struct uart_8250_port
*up
;
2018 static int first
= 1;
2025 for (i
= 0; i
< UART_NR
; i
++) {
2026 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2029 spin_lock_init(&up
->port
.lock
);
2031 init_timer(&up
->timer
);
2032 up
->timer
.function
= serial8250_timeout
;
2035 * ALPHA_KLUDGE_MCR needs to be killed.
2037 up
->mcr_mask
= ~ALPHA_KLUDGE_MCR
;
2038 up
->mcr_force
= ALPHA_KLUDGE_MCR
;
2040 up
->port
.ops
= &serial8250_pops
;
2043 for (i
= 0, up
= serial8250_ports
; i
< ARRAY_SIZE(old_serial_port
);
2045 up
->port
.iobase
= old_serial_port
[i
].port
;
2046 up
->port
.irq
= irq_canonicalize(old_serial_port
[i
].irq
);
2047 up
->port
.uartclk
= old_serial_port
[i
].baud_base
* 16;
2048 up
->port
.flags
= old_serial_port
[i
].flags
;
2049 up
->port
.hub6
= old_serial_port
[i
].hub6
;
2050 up
->port
.membase
= old_serial_port
[i
].iomem_base
;
2051 up
->port
.iotype
= old_serial_port
[i
].io_type
;
2052 up
->port
.regshift
= old_serial_port
[i
].iomem_reg_shift
;
2054 up
->port
.flags
|= UPF_SHARE_IRQ
;
2059 serial8250_register_ports(struct uart_driver
*drv
, struct device
*dev
)
2063 serial8250_isa_init_ports();
2065 for (i
= 0; i
< UART_NR
; i
++) {
2066 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2069 uart_add_one_port(drv
, &up
->port
);
2073 #ifdef CONFIG_SERIAL_8250_CONSOLE
2075 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2078 * Wait for transmitter & holding register to empty
2080 static inline void wait_for_xmitr(struct uart_8250_port
*up
)
2082 unsigned int status
, tmout
= 10000;
2084 /* Wait up to 10ms for the character(s) to be sent. */
2086 status
= serial_in(up
, UART_LSR
);
2088 if (status
& UART_LSR_BI
)
2089 up
->lsr_break_flag
= UART_LSR_BI
;
2094 } while ((status
& BOTH_EMPTY
) != BOTH_EMPTY
);
2096 /* Wait up to 1s for flow control if necessary */
2097 if (up
->port
.flags
& UPF_CONS_FLOW
) {
2100 ((serial_in(up
, UART_MSR
) & UART_MSR_CTS
) == 0))
2106 * Print a string to the serial port trying not to disturb
2107 * any possible real use of the port...
2109 * The console_lock must be held when we get here.
2112 serial8250_console_write(struct console
*co
, const char *s
, unsigned int count
)
2114 struct uart_8250_port
*up
= &serial8250_ports
[co
->index
];
2119 * First save the UER then disable the interrupts
2121 ier
= serial_in(up
, UART_IER
);
2123 if (up
->capabilities
& UART_CAP_UUE
)
2124 serial_out(up
, UART_IER
, UART_IER_UUE
);
2126 serial_out(up
, UART_IER
, 0);
2129 * Now, do each character
2131 for (i
= 0; i
< count
; i
++, s
++) {
2135 * Send the character out.
2136 * If a LF, also do CR...
2138 serial_out(up
, UART_TX
, *s
);
2141 serial_out(up
, UART_TX
, 13);
2146 * Finally, wait for transmitter to become empty
2147 * and restore the IER
2150 serial_out(up
, UART_IER
, ier
);
2153 static int serial8250_console_setup(struct console
*co
, char *options
)
2155 struct uart_port
*port
;
2162 * Check whether an invalid uart number has been specified, and
2163 * if so, search for the first available port that does have
2166 if (co
->index
>= UART_NR
)
2168 port
= &serial8250_ports
[co
->index
].port
;
2169 if (!port
->iobase
&& !port
->membase
)
2173 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
2175 return uart_set_options(port
, co
, baud
, parity
, bits
, flow
);
2178 static struct uart_driver serial8250_reg
;
2179 static struct console serial8250_console
= {
2181 .write
= serial8250_console_write
,
2182 .device
= uart_console_device
,
2183 .setup
= serial8250_console_setup
,
2184 .flags
= CON_PRINTBUFFER
,
2186 .data
= &serial8250_reg
,
2189 static int __init
serial8250_console_init(void)
2191 serial8250_isa_init_ports();
2192 register_console(&serial8250_console
);
2195 console_initcall(serial8250_console_init
);
2197 static int __init
find_port(struct uart_port
*p
)
2200 struct uart_port
*port
;
2202 for (line
= 0; line
< UART_NR
; line
++) {
2203 port
= &serial8250_ports
[line
].port
;
2204 if (p
->iotype
== port
->iotype
&&
2205 p
->iobase
== port
->iobase
&&
2206 p
->membase
== port
->membase
)
2212 int __init
serial8250_start_console(struct uart_port
*port
, char *options
)
2216 line
= find_port(port
);
2220 add_preferred_console("ttyS", line
, options
);
2221 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2222 line
, port
->iotype
== UPIO_MEM
? "MMIO" : "I/O port",
2223 port
->iotype
== UPIO_MEM
? (unsigned long) port
->mapbase
:
2224 (unsigned long) port
->iobase
, options
);
2225 if (!(serial8250_console
.flags
& CON_ENABLED
)) {
2226 serial8250_console
.flags
&= ~CON_PRINTBUFFER
;
2227 register_console(&serial8250_console
);
2232 #define SERIAL8250_CONSOLE &serial8250_console
2234 #define SERIAL8250_CONSOLE NULL
2237 static struct uart_driver serial8250_reg
= {
2238 .owner
= THIS_MODULE
,
2239 .driver_name
= "serial",
2240 .devfs_name
= "tts/",
2245 .cons
= SERIAL8250_CONSOLE
,
2248 int __init
early_serial_setup(struct uart_port
*port
)
2250 if (port
->line
>= ARRAY_SIZE(serial8250_ports
))
2253 serial8250_isa_init_ports();
2254 serial8250_ports
[port
->line
].port
= *port
;
2255 serial8250_ports
[port
->line
].port
.ops
= &serial8250_pops
;
2260 * serial8250_suspend_port - suspend one serial port
2261 * @line: serial line number
2262 * @level: the level of port suspension, as per uart_suspend_port
2264 * Suspend one serial port.
2266 void serial8250_suspend_port(int line
)
2268 uart_suspend_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2272 * serial8250_resume_port - resume one serial port
2273 * @line: serial line number
2274 * @level: the level of port resumption, as per uart_resume_port
2276 * Resume one serial port.
2278 void serial8250_resume_port(int line
)
2280 uart_resume_port(&serial8250_reg
, &serial8250_ports
[line
].port
);
2284 * Register a set of serial devices attached to a platform device. The
2285 * list is terminated with a zero flags entry, which means we expect
2286 * all entries to have at least UPF_BOOT_AUTOCONF set.
2288 static int __devinit
serial8250_probe(struct device
*dev
)
2290 struct plat_serial8250_port
*p
= dev
->platform_data
;
2291 struct uart_port port
;
2293 memset(&port
, 0, sizeof(struct uart_port
));
2295 for (; p
&& p
->flags
!= 0; p
++) {
2296 port
.iobase
= p
->iobase
;
2297 port
.membase
= p
->membase
;
2299 port
.uartclk
= p
->uartclk
;
2300 port
.regshift
= p
->regshift
;
2301 port
.iotype
= p
->iotype
;
2302 port
.flags
= p
->flags
;
2303 port
.mapbase
= p
->mapbase
;
2306 port
.flags
|= UPF_SHARE_IRQ
;
2307 serial8250_register_port(&port
);
2313 * Remove serial ports registered against a platform device.
2315 static int __devexit
serial8250_remove(struct device
*dev
)
2319 for (i
= 0; i
< UART_NR
; i
++) {
2320 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2322 if (up
->port
.dev
== dev
)
2323 serial8250_unregister_port(i
);
2328 static int serial8250_suspend(struct device
*dev
, pm_message_t state
, u32 level
)
2332 if (level
!= SUSPEND_DISABLE
)
2335 for (i
= 0; i
< UART_NR
; i
++) {
2336 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2338 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== dev
)
2339 uart_suspend_port(&serial8250_reg
, &up
->port
);
2345 static int serial8250_resume(struct device
*dev
, u32 level
)
2349 if (level
!= RESUME_ENABLE
)
2352 for (i
= 0; i
< UART_NR
; i
++) {
2353 struct uart_8250_port
*up
= &serial8250_ports
[i
];
2355 if (up
->port
.type
!= PORT_UNKNOWN
&& up
->port
.dev
== dev
)
2356 uart_resume_port(&serial8250_reg
, &up
->port
);
2362 static struct device_driver serial8250_isa_driver
= {
2363 .name
= "serial8250",
2364 .bus
= &platform_bus_type
,
2365 .probe
= serial8250_probe
,
2366 .remove
= __devexit_p(serial8250_remove
),
2367 .suspend
= serial8250_suspend
,
2368 .resume
= serial8250_resume
,
2372 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2373 * in the table in include/asm/serial.h
2375 static struct platform_device
*serial8250_isa_devs
;
2378 * serial8250_register_port and serial8250_unregister_port allows for
2379 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2380 * modems and PCI multiport cards.
2382 static DECLARE_MUTEX(serial_sem
);
2384 static struct uart_8250_port
*serial8250_find_match_or_unused(struct uart_port
*port
)
2389 * First, find a port entry which matches.
2391 for (i
= 0; i
< UART_NR
; i
++)
2392 if (uart_match_port(&serial8250_ports
[i
].port
, port
))
2393 return &serial8250_ports
[i
];
2396 * We didn't find a matching entry, so look for the first
2397 * free entry. We look for one which hasn't been previously
2398 * used (indicated by zero iobase).
2400 for (i
= 0; i
< UART_NR
; i
++)
2401 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
&&
2402 serial8250_ports
[i
].port
.iobase
== 0)
2403 return &serial8250_ports
[i
];
2406 * That also failed. Last resort is to find any entry which
2407 * doesn't have a real port associated with it.
2409 for (i
= 0; i
< UART_NR
; i
++)
2410 if (serial8250_ports
[i
].port
.type
== PORT_UNKNOWN
)
2411 return &serial8250_ports
[i
];
2417 * serial8250_register_port - register a serial port
2418 * @port: serial port template
2420 * Configure the serial port specified by the request. If the
2421 * port exists and is in use, it is hung up and unregistered
2424 * The port is then probed and if necessary the IRQ is autodetected
2425 * If this fails an error is returned.
2427 * On success the port is ready to use and the line number is returned.
2429 int serial8250_register_port(struct uart_port
*port
)
2431 struct uart_8250_port
*uart
;
2434 if (port
->uartclk
== 0)
2439 uart
= serial8250_find_match_or_unused(port
);
2441 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2443 uart
->port
.iobase
= port
->iobase
;
2444 uart
->port
.membase
= port
->membase
;
2445 uart
->port
.irq
= port
->irq
;
2446 uart
->port
.uartclk
= port
->uartclk
;
2447 uart
->port
.fifosize
= port
->fifosize
;
2448 uart
->port
.regshift
= port
->regshift
;
2449 uart
->port
.iotype
= port
->iotype
;
2450 uart
->port
.flags
= port
->flags
| UPF_BOOT_AUTOCONF
;
2451 uart
->port
.mapbase
= port
->mapbase
;
2453 uart
->port
.dev
= port
->dev
;
2455 ret
= uart_add_one_port(&serial8250_reg
, &uart
->port
);
2457 ret
= uart
->port
.line
;
2463 EXPORT_SYMBOL(serial8250_register_port
);
2466 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2467 * @line: serial line number
2469 * Remove one serial port. This may not be called from interrupt
2470 * context. We hand the port back to the our control.
2472 void serial8250_unregister_port(int line
)
2474 struct uart_8250_port
*uart
= &serial8250_ports
[line
];
2477 uart_remove_one_port(&serial8250_reg
, &uart
->port
);
2478 if (serial8250_isa_devs
) {
2479 uart
->port
.flags
&= ~UPF_BOOT_AUTOCONF
;
2480 uart
->port
.type
= PORT_UNKNOWN
;
2481 uart
->port
.dev
= &serial8250_isa_devs
->dev
;
2482 uart_add_one_port(&serial8250_reg
, &uart
->port
);
2484 uart
->port
.dev
= NULL
;
2488 EXPORT_SYMBOL(serial8250_unregister_port
);
2490 static int __init
serial8250_init(void)
2494 printk(KERN_INFO
"Serial: 8250/16550 driver $Revision: 1.90 $ "
2495 "%d ports, IRQ sharing %sabled\n", (int) UART_NR
,
2496 share_irqs
? "en" : "dis");
2498 for (i
= 0; i
< NR_IRQS
; i
++)
2499 spin_lock_init(&irq_lists
[i
].lock
);
2501 ret
= uart_register_driver(&serial8250_reg
);
2505 serial8250_isa_devs
= platform_device_register_simple("serial8250",
2507 if (IS_ERR(serial8250_isa_devs
)) {
2508 ret
= PTR_ERR(serial8250_isa_devs
);
2512 serial8250_register_ports(&serial8250_reg
, &serial8250_isa_devs
->dev
);
2514 ret
= driver_register(&serial8250_isa_driver
);
2518 platform_device_unregister(serial8250_isa_devs
);
2520 uart_unregister_driver(&serial8250_reg
);
2525 static void __exit
serial8250_exit(void)
2527 struct platform_device
*isa_dev
= serial8250_isa_devs
;
2530 * This tells serial8250_unregister_port() not to re-register
2531 * the ports (thereby making serial8250_isa_driver permanently
2534 serial8250_isa_devs
= NULL
;
2536 driver_unregister(&serial8250_isa_driver
);
2537 platform_device_unregister(isa_dev
);
2539 uart_unregister_driver(&serial8250_reg
);
2542 module_init(serial8250_init
);
2543 module_exit(serial8250_exit
);
2545 EXPORT_SYMBOL(serial8250_suspend_port
);
2546 EXPORT_SYMBOL(serial8250_resume_port
);
2548 MODULE_LICENSE("GPL");
2549 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2551 module_param(share_irqs
, uint
, 0644);
2552 MODULE_PARM_DESC(share_irqs
, "Share IRQs with other non-8250/16x50 devices"
2555 #ifdef CONFIG_SERIAL_8250_RSA
2556 module_param_array(probe_rsa
, ulong
, &probe_rsa_count
, 0444);
2557 MODULE_PARM_DESC(probe_rsa
, "Probe I/O ports for RSA");
2559 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR
);
2562 * register_serial - configure a 16x50 serial port at runtime
2563 * @req: request structure
2565 * Configure the serial port specified by the request. If the
2566 * port exists and is in use an error is returned. If the port
2567 * is not currently in the table it is added.
2569 * The port is then probed and if necessary the IRQ is autodetected
2570 * If this fails an error is returned.
2572 * On success the port is ready to use and the line number is returned.
2574 * Note: this function is deprecated - use serial8250_register_port
2577 int register_serial(struct serial_struct
*req
)
2579 struct uart_port port
;
2581 port
.iobase
= req
->port
;
2582 port
.membase
= req
->iomem_base
;
2583 port
.irq
= req
->irq
;
2584 port
.uartclk
= req
->baud_base
* 16;
2585 port
.fifosize
= req
->xmit_fifo_size
;
2586 port
.regshift
= req
->iomem_reg_shift
;
2587 port
.iotype
= req
->io_type
;
2588 port
.flags
= req
->flags
| UPF_BOOT_AUTOCONF
;
2589 port
.mapbase
= req
->iomap_base
;
2593 port
.flags
|= UPF_SHARE_IRQ
;
2595 if (HIGH_BITS_OFFSET
)
2596 port
.iobase
|= (long) req
->port_high
<< HIGH_BITS_OFFSET
;
2599 * If a clock rate wasn't specified by the low level driver, then
2600 * default to the standard clock rate. This should be 115200 (*16)
2601 * and should not depend on the architecture's BASE_BAUD definition.
2602 * However, since this API will be deprecated, it's probably a
2603 * better idea to convert the drivers to use the new API
2604 * (serial8250_register_port and serial8250_unregister_port).
2606 if (port
.uartclk
== 0) {
2608 "Serial: registering port at [%08x,%08lx,%p] irq %d with zero baud_base\n",
2609 port
.iobase
, port
.mapbase
, port
.membase
, port
.irq
);
2610 printk(KERN_WARNING
"Serial: see %s:%d for more information\n",
2611 __FILE__
, __LINE__
);
2615 * Fix it up for now, but this is only a temporary measure.
2617 port
.uartclk
= BASE_BAUD
* 16;
2620 return serial8250_register_port(&port
);
2622 EXPORT_SYMBOL(register_serial
);
2625 * unregister_serial - remove a 16x50 serial port at runtime
2626 * @line: serial line number
2628 * Remove one serial port. This may not be called from interrupt
2629 * context. We hand the port back to our local PM control.
2631 * Note: this function is deprecated - use serial8250_unregister_port
2634 void unregister_serial(int line
)
2636 serial8250_unregister_port(line
);
2638 EXPORT_SYMBOL(unregister_serial
);